Nitride Stack Research Articles

Optical properties and passivation effects of silicon nitride three layer stacks deposited by plasma enhanced chemical vapor deposition

In this work, we investigate the optical properties and passivation effects of silicon nitride stacks deposited by the plasma enhanced chemical vapor deposition (PECVD) system. A stack of three SiNx:H layers with different refractive indices were deposited at 310 °C using silane (SiH4) and ammonia (NH3) as precursor gases. The chemical composition of the films was modulated by varying the gas flow ratio r = [NH3]/[SiH4]. Details of the optical optimization procedure are presented. Thanks to spectrophotometric and spectroscopic ellipsometry measurements we confirmed the suitability of a three layered SiNx:H stack for antireflective coating. Passivation effects were evaluated by measurements of effective carrier lifetimes. Simulated short‐circuit currents were also calculated for two fixed internal quantum efficiency IQE spectra. It was found that a triple‐layered silicon nitride coating provides lower optical reflection and better passivation for silicon p‐type than those of a single‐layered silicon nitride coating.

Impact of interstitial oxygen trapped in silicon during plasma growth of silicon oxy-nitride films for silicon solar cell passivation

Low temperature oxidation of silicon in plasma ambient is a potential candidate for replacing thermally grown SiO2 films for surface passivation of crystalline silicon solar cells. In this work, we report the growth of silicon oxy-nitride (SiOxNy) film in N2O plasma ambient at 380 °C. However, this process results in trapping of interstitial oxygen within silicon. The impact of this trapped interstitial oxygen on the surface passivation quality is investigated. The interstitial oxygen trapped in silicon was seen to decrease for larger SiOxNy film thickness. Effective minority carrier lifetime (τeff) measurements on n-type float zone silicon wafers passivated by SiOxNy/silicon nitride (SiNv:H) stack showed a decrease in τeff from 347 μs to 68 μs, for larger SiOxNy film thickness due to degradation in interface properties. From high frequency capacitance-voltage measurements, it was concluded that the surface passivation quality was governed by the interface parameters (fixed charge density and interface state density). High temperature firing of the SiOxNy/SiNv:H stack resulted in a severe degradation in τeff due to migration of oxygen across the interface into silicon. However, on using the SiOxNy/SiNv:H stack for emitter surface passivation in screen printed p-type Si solar cells, an improvement in short wavelength response was observed in comparison to the passivation by SiNv:H alone, indicating an improvement in emitter surface passivation quality.

Charge retention analysis of Si implanted and wet oxidized SONOS structures

In this work we examine the high temperature charge retention characteristics of modified SONOS (polySi–oxide–nitride–oxide–Si) capacitors. The modified SONOS structures were synthesized by Si low-energy implantation (1keV) into oxide–nitride (ON) stacks, followed by a wet oxidation step. The retention studies were conducted within the temperature range of 50 to 180°C after setting the capacitor to an excess electron state of ΔVFB of 3V. The reference ONO capacitor exhibits a complex behavior which consists of an initial fast discharge rate of 0.1V/decade which switches to a lower and temperature independent rate of 0.06V/decade when the ΔVFB reaches 2.86V. In turn, the implanted and wet oxidized ONO shows a temperature dependent charge decay rate which varies from 0.07V/decade at 30°C, to 0.18V/decade at 180°C. The retention data have been analytically solved using the Wang–White model. The results showed that the nitride trap distribution of the implanted and wet oxidized sample differs clearly from that of the standard stoichiometric nitride. This is attributed to ion induced structural damage in combination with the wet oxidation which increases the distribution profile at deeper trap energies.

Solar‐grade boron emitters by BF3 plasma doping and role of the co‐implanted fluorine

AbstractWe investigate the electrical properties and dopant profiles of boron emitters performed by plasma immersion ion implantation from boron trifluoride (BF3) gas precursor, thermally annealed and passivated by silicon oxide/silicon nitride stacks. High thermal budgets are required for doses compatible with screen‐printed metal pastes, to reach very good activation rates. However, if good sheet resistances and saturation current densities may be obtained, we met strong limitations of the implied open‐circuit voltage of the n‐type Czochralski silicon substrates, which is incompatible with high‐efficiency solar cells. Such limitations are not encountered with beamline where pure B+ ions are implanted. Efforts on the passivation quality may improve the implied open‐circuit voltage but are not sufficient. We provide experimental comparison between beamline and plasma immersion allowing us to discriminate the causes explaining this observation (implantation technique or ion specie used) and to infer our interpretation: The co‐implantation of fluorine seems to indirectly impact the lifetime of the core substrate after thermal annealing. Copyright © 2015 John Wiley & Sons, Ltd.

Investigation of rapid thermal oxide/ silicon nitride passivation stack of n+ emitter

To anticipate the initial phosphorus diffusion parameters of silicon solar cells process fabrication, we report in this paper an overview of our experiments on silicon n+-emitters passivation by means of rapid thermal silicon oxide/silicon nitride stack. The process-induced changes have been evaluated and explained. We found that 900 °C and 80 s were the appropriate process parameters to grow 10 nm silicon oxide. Investigation of the effect of this oxidation on n+ multicrystalline silicon emitters revealed a large decrease (more than 25%) of the sheet resistance and around 12% increase of the junction depth. The experiments also revealed that the passivation effect of the optimal silicon oxide/silicon nitride stack is efficient only for higher emitter quality. In addition, we found that this stack reduces the surface reflection more than the optimal single silicon nitride layer.

Enhanced photon absorption in spiral nanostructured solar cells using layered 2D materials

Recent investigations of semiconducting two-dimensional (2D) transition metal dichalcogenides have provided evidence for strong light absorption relative to its thickness attributed to high density of states. Stacking a combination of metallic, insulating, and semiconducting 2D materials enables functional devices with atomic thicknesses. While photovoltaic cells based on 2D materials have been demonstrated, the reported absorption is still just a few percent of the incident light due to their sub-wavelength thickness leading to low cell efficiencies. Here we show that taking advantage of the mechanical flexibility of 2D materials by rolling a molybdenum disulfide (MoS2)/graphene (Gr)/hexagonal boron nitride stack to a spiral solar cell allows for optical absorption up to 90%. The optical absorption of a 1 μm long hetero-material spiral cell consisting of the aforementioned hetero stack is about 50% stronger compared to a planar MoS2 cell of the same thickness; although the volumetric absorbing material ratio is only 6%. A core–shell structure exhibits enhanced absorption and pronounced absorption peaks with respect to a spiral structure without metallic contacts. We anticipate these results to provide guidance for photonic structures that take advantage of the unique properties of 2D materials in solar energy conversion applications.

Heterojunction fully depleted SOI-TFET with oxide/source overlap

In this work, a hetero-junction fully depleted (FD) Silicon-on-Insulator (SOI) Tunnel Field Effect Transistor (TFET) nanostructure with oxide overlap on the Germanium-source region is proposed. Investigations using Synopsys Technology Computer Aided Design (TCAD) simulation tools reveal that the simple oxide overlap on the Germanium-source region increases the tunneling area as well as the tunneling current without degrading the band-to-band tunneling (BTBT) and improves the device performance. More importantly, the improvement is independent of gate overlap. Simulation study shows improvement in ON current, subthreshold swing (SS), OFF current, ION/IOFF ration, threshold voltage and transconductance. The proposed device with hafnium oxide (HfO2)/Aluminium Nitride (AlN) stack dielectric material offers an average subthreshold swing of 22mV/decade and high ION/IOFF ratio (∼1010) at VDS=0.4V. Compared to conventional TFET, the Miller capacitance of the device shows the enhanced performance. The impact of the drain voltage variation on different parameters such as threshold voltage, subthreshold swing, transconductance, and ION/IOFF ration are also found to be satisfactory. From fabrication point of view also it is easy to utilize the existing CMOS process flows to fabricate the proposed device.

High-Level Silicon Surface Passivation by Anodically Grown Silicon Dioxide and Silicon Nitride Stacks

We investigate the surface passivation attained by a stack consisting of anodically grown silicon dioxide and silicon nitride. A very low surface saturation current density $J_{{\rm os}}$ of 3 fA/cm2 is attained after the silicon wafers are submersed in nitric acid under a constant bias for >30 min, followed by a silicon nitride deposition and subsequent annealing in forming gas (FG) at 400 °C. We examine $J_{{\rm os}}$ as a function of the anodic SiO2 thickness ( $d_{{\rm ox}}$ ) and show that for $d_{{\rm ox}}$ between 7 and 36 nm, $J_{{\rm os}}$ decreases monotonically from 32 to 3 fA/cm2 , respectively. From capacitance–voltage (CV) and conductance measurements, we show that this reduction in $J_{{\rm os}}$ with an increase in oxide thickness primarily results from a reduction in both the interface defect density ( $D_{{\rm it}}$ ) and the hole capture cross section (σ p ). For the lowest $J_{{\rm os}}$ of 3 fA/cm2, a low $D_{{\rm it}}$ of $\sim 2.0 \times 10^{10}$ cm−2·eV−1 and a low $\sigma _{{\rm p}}$ of $\sim 1\times 10^{-16}$ cm−2 are determined. When the anodic SiO2 films are capped by a silicon nitride film, negligible surface passivation degradation occurs, in comparison with uncapped anodic SiO2 films. Finally, we demonstrate that thermally induced bulk silicon defects can be eliminated by replacing high temperature (1000 °C) oxidations with a room-temperature anodic oxidation technique.

Temperature dependent retention characteristics of ion-beam modified SONOS memories

In this work, we report on the structural and electrical properties of oxide–nitride–oxide (ONO) structures that were formed by low-energy silicon or nitrogen implantation into oxide–nitride stacks. In particular ON stacks (2.5nm/6nm) were formed on n-type Si substrates, further implanted with 1keV Si or N to a fluence of 1016 ions/cm2, and finally wet oxidized at 850°C for 15min. TEM imaging showed that the thickness of the blocking oxide layer, formed during wet oxidation, strongly depends on the implanted species. Charging characteristics revealed that Si implanted stacks can trap either electrons or holes resulting to a memory window as large as 8.5V. In turn N implanted stacks can trap only electrons with a corresponding memory window of 4V. Room-temperature charge retention measurements showed that the electron loss rate is faster in samples implanted with Si (∼0.32V/decade) compared to N-samples (∼0.1V/decade). The 10-year extrapolated memory windows were 1.7 and 2.5V for Si and N-implanted devices, respectively. Retention measurements within the temperature range of 25–150°C indicate that the Si implanted stacks exhibit a thermally activated retention, while N-samples showed a temperature independent behavior. These results are mainly attributed to the different nature of traps generated by ion implantation and wet oxidation processing.

Moisture barrier evaluation of SiOx/SiNx stacks on polyimide substrates using electrical calcium test

Electrical calcium (Ca) test was used to measure water vapor transmission rate (WVTR) through polyimide (PI) substrate with barrier films. The WVTR was obtained by measuring the resistance of the Ca as a function of time. Barrier films consisted of silicon oxide (SiOx)/silicon nitride (SiNx) stacks were consecutively deposited onto the PI substrate at 350°C by plasma-enhanced chemical vapor deposition. SiNx and SiOx films show great moisture impermeability while the SiNx film presented higher moisture resistance than the SiOx film. The sample of PI coated with SiOx/SiNx stacks was kept flat by stress compensation of SiNx film and SiOx film. The WVTR value of the optimum barrier structure (5 pairs of SiOx/SiNx) is 5.58×10−6g/(m2day) under an electrical Ca test (25°C, 40% relative humidity). After 500 times cyclic bending in a compressive mode, WVTR value keeps below 4.32×10−5g/(m2day). The SiOx/SiNx barrier stacks presented on PI have a great potential for flexible electronics applications.

PECVD-AlOx/SiNx passivation stacks on wet chemically oxidized silicon: Constant voltage stress investigations of charge dynamics and interface defect states

The negative charge formation, the charge-trapping mechanisms and the interface defect passivation of aluminum oxide/silicon nitride (AlOx/SiNx) stacks deposited by plasma-enhanced chemical vapor deposition on p-type crystalline silicon (c-Si) are investigated. Constant voltage stress (CVS) investigations combined with capacitance–voltage (C–V) hysteresis analysis indicate the influence of different thermal treatments on the negative charge formation and allow discerning between fixed and trapped charges in the AlOx/SiNx system. The thermal budget during SiNx deposition activates negatively charged traps. An annealing step leads to the formation of a stable, fixed negative charge and reduces the defect state density (Dit) at the c-Si/AlOx interface. A wet-chemical silicon oxidation (SiOx) of the c-Si surface reduces Dit even further, but introduces additional traps at the wet-chemical SiOx/AlOx interface. These traps lead to instabilities of the negative charge density and have a detrimental effect on the passivation quality. However, a firing step leads to the formation of a higher negative charge density due to charged traps. Combined with the enhanced chemical passivation, this results in a higher passivation quality than upon annealing. The trap-related negative charge upon firing is unstable due to electron detrapping. However, a positive CVS can recharge traps in the wet-chemical SiOx/AlOx/SiNx system negatively through electron injection from the c-Si.

High efficiency large area n -type front junction silicon solar cells with boron emitter formed by screen printing technology

In this paper, we report on commercially viable screen printing (SP) technology to form boron emitters. A screen-printed boron emitter and ion-implanted phosphorus back surface field were formed simultaneously by a co-annealing process. Front and back surfaces were passivated by chemically grown oxide capped with plasma-enhanced chemical vapor deposition silicon nitride stack. Front and back contacts were formed by traditional SP and firing processes with silver/aluminum grid on front and local silver back contacts on the rear. This resulted in 19.6% efficient large area (239 cm2) n-type solar cells with an open-circuit voltage Voc of 645 mV, short-circuit current density Jsc of 38.6 mA/cm2, and fill factor of 78.6%. This demonstrates the potential of this novel technology for production of low-cost high-efficiency n-type silicon solar cells. Copyright © 2014 John Wiley & Sons, Ltd.

Characterization of a Novel Radical Nitrogen Plasma Source for Semiconductor Nitridation

Surface nitridation has long been desirable for surface and interface passivation to realize ultra-low equivalent oxide thickness (EOT) dielectric layers on Si and III-V materials. Various nitridation techniques exist, including thermal and plasma nitridation. Thermal processes rely on high temperatures which are difficult to control for very shallow nitridation without any significant diffusion. Thermal budgets become stricter when moving to III-Vs, unless special steps are taken to reduce or eliminate loss of low vapor pressure materials (ie. As, In). Conventional plasma processes allow lower temperatures but can expose the substrate to damaging, high energy ions. Shallow channel devices are particularly vulnerable to substrate damage, degrading mobility.We will report nitridation of Si and GaAs using a novel, remote nitrogen radical generator system. The generator is a custom, atmospheric plasma source capable of generating a large concentration of N radicals without exposing the substrate to plasma. Processes are carried out at low pressures, 1-10 Torr, and the generator is connected to the process chamber by an orifice, precluding direct line of site to the plasma. The system is integrated with an atomic layer deposition (ALD) chamber for both radical enhanced and thermal ALD, allowing in-situdeposition of dielectrics.Growth temperatures range from room temperature to 400 °C. Aluminum oxide, aluminum nitride and zirconium oxide ALD dielectric stacks will be analyzed using ex-situ x-ray photoelectron spectroscopy (XPS) to gauge the surface chemistry and nitridation stability. Metal-oxide-semiconductor capacitors will be measured using capacitance-voltage (C-V) measurements to look at the nitridation contribution to electrical properties. Emphasis will be places on zirconia-alumina-zirconia (ZAZ) stacks, with nitridation at the interface and the dielectric bulk.We would like to thank Samsung Electronics for their financial support and Toshiba Mitsubishi-Electric Industrial Systems Corporation (TMEIC) for providing the nitridation system.

Structural and optical properties of AlxGa1−xN/GaN high electron mobility transistor structures grown on 200 mm diameter Si(111) substrates

The authors report on the study of homogeneity in structural and optical properties of AlxGa1−xN/GaN high electron mobility transistor (HEMT) structures grown on 200 mm diameter Si(111) substrates. The consequence of a variation of buffer layer thicknesses as well as the interface quality has been studied by in-situ growth monitoring. A reasonably good uniformity of crystalline quality in the heterostructures grown with a lower wafer bowing has been observed from the full width at half maxima of symmetric as well as asymmetric high resolution x-ray diffraction scans across the wafer. Furthermore, the thickness and Al content of the AlxGa1−xN barrier layer across the wafer is found to be uniform when the wafer bowing is lower. Optical and electrical measurements across the epiwafer address the strain homogeneity, luminescence, and two-dimensional electron gas properties. Based on these studies of growth optimization, HEMT epiwafers with a total nitride stack thickness of 4.4 μm with a wafer bowing <50 μm on 1.0 mm thick Si substrates are demonstrated.

Effects of high-temperature treatment on the hydrogen distribution in silicon oxynitride/silicon nitride stacks for crystalline silicon surface passivation

This work investigates a double layer stack system that can be used for surface passivation of crystalline silicon. The stack consists of amorphous silicon-rich silicon oxynitride and amorphous silicon nitride on top. Both layers are fabricated by means of plasma-enhanced chemical vapour deposition. We investigate the stack in terms of changes in the hydrogen content and distribution within the different stack layers due to a high temperature treatment. For that purpose the stack is studied by Fourier-transformed infrared spectroscopy and nuclear reaction analysis before and after fast firing at 850 °C. Our results determine the bottom silicon oxynitride layer as very hydrogen-rich. Furthermore, we identify the silicon nitride capping layer as diffusion barrier to atomic hydrogen but still allowing an effusion of molecular hydrogen. We present a qualitative model that explains our findings and distinguishes between atomic and molecular hydrogen.

Conduction mechanisms in 2D and 3D SIS capacitors

In this paper, we present a study of conduction mechanisms observed in high performance SIS capacitors (semiconductor–insulator–semiconductor) fabricated on bulk silicon. The combination of high aspect ratio 3D patterns and thin dielectric layers enables amazing capacitance density values. Electrical measurement and modeling of leakage currents have been associated with structural analysis in order to characterize different oxide–nitride stacks, and thus, to scale the layers and reach even higher capacitance densities. Conduction mechanisms are relevant of Fowler–Nordheim tunneling and Poole–Frenkel emission.

AlGaN/GaN two-dimensional-electron gas heterostructures on 200 mm diameter Si(111)

This Letter reports on the epitaxial growth, characterization, and device characteristics of crack-free AlGaN/GaN heterostructures on a 200 mm diameter Si(111) substrate. The total nitride stack thickness of the sample grown by the metal-organic chemical vapor deposition technique is about 3.3 ± 0.1 μm. The structural and optical properties of these layers are studied by cross-sectional scanning transmission electron microscopy, high-resolution x-ray diffraction, photoluminescence, and micro-Raman spectroscopy techniques. The top AlGaN/GaN heterointerfaces reveal the formation of a two-dimensional electron gas with average Hall mobility values in the range of 1800 to 1900 cm2/Vs across such 200 mm diameter GaN on Si(111) samples. The fabricated 1.5 μm-gate AlGaN/GaN high-electron-mobility transistors exhibited the drain current density of 660 mA/mm and extrinsic transconductance of 210 mS/mm. These experimental results show immense potential of 200-mm diameter GaN-on-silicon technology for electronic device applications.

Chemical etching of boron-rich layer and its impact on high efficiency n-type silicon solar cells

This paper reports on an effective chemical etching treatment to remove a boron-rich layer which has a significant negative impact on n-type silicon (Si) solar cells with boron emitter. A nitric acid-grown oxide/silicon nitride stack passivation on the boron-rich layer-etched boron emitter markedly decreases the emitter saturation current density J0e from 430 to 100 fA/cm2. This led to 1.6% increase in absolute cell efficiency including 22 mV increase in open-circuit voltage Voc and 1.9 mA/cm2 increase in short-circuit current density Jsc. This resulted in screen-printed large area (239 cm2) n-type Si solar cells with efficiency of 19.0%.

Local rear contacts to silicon solar cells by in-line high-rate evaporation of aluminum

We contact p-type wafers and boron-diffused layers by laser ablation of a passivating aluminum oxide and silicon nitride stack and subsequent in-line high-rate evaporation of aluminum. We measure saturation current densities at the base contacts of 2.5×106–1.9×107fA/cm2 for base resistivities of 0.5–3.8Ωcm and 491–905fA/cm2 for the contacts to boron-diffused layers of sheet resistances of 23–86Ω/sq. The contact resistivity of Al layers to p-type silicon with surface doping densities of 4×1015–3×1019cm−3 is in the range of 4–0.1mΩcm2, respectively. The measured contact properties allow for the fabrication of highly efficient ‘passivated emitter and rear cells’ (PERC) and ‘passivated emitter and rear totally diffused cells’ (PERT). Numerical simulations show that evaporated rear contacts in combination with screen printed contacts at the front allow for energy conversion efficiencies of 20.6% and of 21.1%, for PERC and PERT cells, respectively. The simulated free energy losses show that such cells are not limited by the in-line evaporated point contacts on the rear side.

High-Efficiency n-Type Si Solar Cells With Novel Inkjet-Printed Boron Emitters

Formation of a well-passivated boron emitter for mass production of low-cost and high-efficiency n-type silicon solar cells is a major challenge in the photovoltaic industry. In this letter, we report on a novel and commercially viable method, inkjet printing, to create boron emitters. Phosphorus diffusion was used on the rear to form a back-surface held in conjunction with chemically grown oxide/silicon nitride (SiNx) stack on the front and back for surface passivation. Finally, front and back screen-printed contacts were formed through the dielectric stacks to fabricate large-area (239 cm2) n-type cells. This technology resulted in 19.0%-efficient p+-n-n+ cells with a Voc of 644 mV, a Jsc of 38.6 mA/cm2, and a fill factor of 76.3%. This demonstrates for the hrst time the promise of boron-inkjet-printing technology for low-cost and high-performance n-type Si cells.