Next-generation Semiconductor Devices Research Articles

Atomic layer deposition of silicon-based dielectrics for semiconductor manufacturing: Current status and future outlook

The fabrication of next-generation semiconductor devices has created a need for low-temperature (≤400 °C) deposition of highly-conformal (>95%) SiO2, SiNx, and SiC films on high-aspect-ratio nanostructures. To enable the growth of these Si-based dielectric films, semiconductor manufacturers are transitioning from chemical vapor deposition to atomic layer deposition (ALD). Currently, SiO2 films deposited using ALD are already being integrated into semiconductor device manufacturing. However, substantial processing challenges remain for the complete integration of SiNx films deposited by ALD, and there are no known processes for ALD of SiC at temperatures that are compatible with semiconductor device manufacturing. In this focused review, the authors look at the status of thermal and plasma-assisted ALD of these three Si-based dielectric films. For SiO2 ALD, since low-temperature processes that deposit high-quality films are known, the authors focus primarily on the identification of surface reaction mechanisms using chlorosilane and aminosilane precursors, as this provides a foundation for the ALD of SiNx and SiC, two material systems where substantial processing challenges still exist. Using an understanding of the surface reaction mechanisms, the authors describe the underlying reasons for the processing challenges during ALD of SiNx and SiC and suggest methodologies for process improvement. While both thermal and plasma-assisted SiNx ALD processes have been reported in the literature, the thermal NH3-based ALD processes require processing temperatures >500 °C and large NH3 doses. On the other hand, plasma-assisted SiNx ALD processes suffer from nonuniform film properties or low conformality when deposited on high-aspect-ratio nanostructures. In the SiNx section, the authors provide a broad overview of the currently known thermal and plasma-assisted SiNx ALD processes using chlorosilane, trisilylamine, and aminosilane precursors, describe the process shortcomings, and review the literature on precursor reaction pathways. The authors close this section with suggestions for improving the film properties and conformality. In the case of SiC, the authors first outline the limitations of previously reported SiC ALD processes and highlight that unlike SiO2 and SiNx plasma-assisted ALD, no straightforward pathway for low-temperature plasma-assisted growth is currently apparent. The authors speculate that low-temperature ALD of SiC may require the design of completely new precursors. Finally, they summarize the progress made in the ALD of C-containing SiNx and SiO2 films, which may provide many of the benefits of SiC ALD in semiconductor manufacturing. In closing, through this review, the authors hope to provide the readers with a comprehensive knowledge of the surface reactions mechanisms during ALD of Si-based dielectrics, which would provide a foundation for future precursor and process development.

Effect of Excitation Wavelength on Optical Performances of Quantum-Dot-Converted Light-Emitting Diode.

Light-emitting diode (LED) combined with quantum dots (QDs) is an important candidate for next-generation high-quality semiconductor devices. However, the effect of the excitation wavelength on their optical performance has not been fully explored. In this study, green and red QDs are applied to LEDs of different excitation wavelengths from 365 to 455 nm. The blue light is recommended for exciting QDs from the perspective of energy utilization. However, QD LEDs excited at 365 nm have unique advantages in eliminating the original peaks from the LED chip. Moreover, the green or red light excited by ultraviolet light has an advantage in colorimetry. Even for the 455 nm LED with the highest QD concentration at 7.0 wt%, the color quality could not compete with the 365 nm LED with the lowest QD concentration at 0.2 wt%. A 117.5% (NTSC1953) color gamut could be obtained by the 365 nm-excited RGB system, which is 32.6% higher than by the 455 nm-excited solution, and this can help expand the color gamut of LED devices. Consequently, this study provides an understanding of the properties of QD-converted LEDs under different wavelength excitations, and offers a general guide to selecting a pumping source for QDs.

Common-Mode Voltage Attenuation of an Active Common-Mode Filter in a Motor Drive System Fed by a PWM Inverter

The switching speeds of next-generation power semiconductor devices, such as those made of silicon carbide and gallium nitride are roughly ten times those of conventional devices (e.g., silicon insulated-gate bipolar transistors). This increases the frequency range of the electromagnetic noise accompanying the switching operations of pulsewidth modulated (PWM) converters and worsens the influence of radiated noise. The authors have previously proposed an active common-mode filter (ACF) that reduces the radiated noise from the power cables connected to a PWM converter and evaluated its effect in reducing radiated noise by using a function generator as a common-mode (CM) noise source. In this paper, the ACF is applied to a motor drive system fed by a three-phase PWM inverter, and the attenuation characteristics of the CM voltage are evaluated. To avoid saturating the ACF, the combination of an active common-noise canceller and the ACF is discussed. The experimental results show that the system constructed in this paper can suppress the CM voltage produced by the PWM inverter over a wide frequency range from 100 to 100 MHz.

Experimental investigation of boiling regimes in a capillary-fed two-layer evaporator wick

Vapor chambers with transformative evaporator wick designs capable of passively dissipating high heat fluxes over large areas, while maintaining low thermal resistances, can meet the thermal management needs of next-generation power semiconductor devices. Our prior work proposed a two-layer evaporator wick structure to enhance the performance of vapor chambers operating at high heat fluxes. The current study experimentally characterizes the capillary-fed boiling heat transfer behavior in such a two-layer evaporator wick, compared to a homogeneous (single-layer) wick, over a 1 cm2 evaporator area. The two-layer design comprises a thin base wick layer that is fed with liquid from a thick cap wick layer above using an array of vertical posts. The two-layer wick is fabricated using a sequence of sintering and laser-machining steps to form the base wick layer (200 µm), array of liquid-feeding posts, and cap wick layer (800 µm) using 90–106 µm copper particles. A test facility is constructed to replicate the conditions that exist at the evaporator of a vapor chamber; the novel facility design uses a physical restriction to prevent flooding of the wicks during testing. Two-layer wicks having 5 × 5 and 10 × 10 arrays of liquid feeding posts are characterized, along with a 200 µm-thick single-layer evaporator wick. The 10 × 10 array provides a >400% enhancement in the dryout heat flux compared to the single-layer wick. High-speed visualizations are used to identify the characteristic regimes of boiling operations for the wicks. The single-layer wick exhibits a partial dryout mode of operation, where a dry spot formed in the center of the heated evaporator area causes an increase in the thermal resistance with heat flux. In contrast, the distributed feeding provided by the two-layer wicks mitigates the development of this partial dryout regime and maintains a constant low resistance (∼0.1 K/W) during capillary-fed boiling until a complete dryout event occurs. This study demonstrates the significant enhancement in dryout heat flux offered by the liquid-feeding approach realized in the two-layer evaporator wicks characterized here.

Wafer-scale transferred multilayer MoS2 for high performance field effect transistors

Chemical vapor deposition synthesis of semiconducting transition metal dichalcogenides (TMDs) offers a new route to build next-generation semiconductor devices. But realization of continuous and uniform multilayer (ML) TMD films is still limited by their specific growth kinetics, such as the competition between surface and interfacial energy. In this work, a layer-by-layer vacuum stacking transfer method is applied to obtain uniform and non-destructive ML-MoS2 films. Back-gated field effect transistor (FET) arrays of 1L- and 2L-MoS2 are fabricated on the same wafer, and their electrical performances are compared. We observe a significant increase of field-effect mobility for 2L-MoS2 FETs, up to 32.5 cm2 V−1 s−1, which is seven times higher than that of 1L-MoS2 (4.5 cm2 V−1 s−1). Then we also fabricated 1L-, 2L-, 3L-, and 4L-MoS2 FETs to further investigate the thickness-dependent characteristics of transferred ML-MoS2. Measurement results show a higher mobility but a smaller current on/off ratio as the layer number increases, suggesting that a balance between mobility and current on/off ratio can be achieved in 2L- and 3L-MoS2 FETs. Dual-gated structure is also investigated to demonstrate an improved electrostatic control of the ML-MoS2 channel.

Evaluation of Contact Thermal Resistance of Ag Paste under High Heat Flux Conditions

This study describes the evaluation of thermal contact resistance under high heat flux. Next-generation semiconductor devices have advantage, which are high voltage device, and can be used under very high temperature and high heat flux. The contact thermal resistance of TIM (Thermal Interface Material) used at high temperature, thus, should be evaluated. Ag paste is expected as TIM used at high temperature. In this study, the contact thermal resistance is experimentally evaluated by steady state method. The experimental apparatus has heat transfer surface of φ 20.0 mm, and applied contact pressure to the heat transfer surface is 0.09 MPa. The results show that the temperature gap between the heat transfer surfaces show complete different tendency before / after solidification of the Ag paste.

High-Performance Wafer-Scale MoS2 Transistors toward Practical Application.

Atomic thin transition-metal dichalcogenides (TMDs) are considered as an emerging platform to build next-generation semiconductor devices. However, to date most devices are still based on exfoliated TMD sheets on a micrometer scale. Here, a novel chemical vapor deposition synthesis strategy by introducing multilayer (ML) MoS2 islands to improve device performance is proposed. A four-probe method is applied to confirm that the contact resistance decreases by one order of magnitude, which can be attributed to a conformal contact by the extra amount of exposed edges from the ML-MoS2 islands. Based on such continuous MoS2 films synthesized on a 2 in. insulating substrate, a top-gated field effect transistor (FET) array is fabricated to explore key metrics such as threshold voltage (V T ) and field effect mobility (μFE ) for hundreds of MoS2 FETs. The statistical results exhibit a surprisingly low variability of these parameters. An average effective μFE of 70 cm2 V-1 s-1 and subthreshold swing of about 150 mV dec-1 are extracted from these MoS2 FETs, which are comparable to the best top-gated MoS2 FETs achieved by mechanical exfoliation. The result is a key step toward scaling 2D-TMDs into functional systems and paves the way for the future development of 2D-TMDs integrated circuits.

Defect States Control Effective Band Gap and Photochemistry of Graphene Quantum Dots.

Graphene quantum dots (GQDs) have emerged as a new group of quantum-confined semiconductors in recent years, with possible applications as light absorbers, luminescent labels, electrocatalysts, and photoelectrodes for photoelectrochemical water splitting. However, their semiconductor characteristics, such as the effective band gap, majority carrier type, and photochemistry, are obscured by defects in this material. Herein, we use surface photovoltage spectroscopy (SPS) in combination with photoelectrochemical measurements to determine the parameters that are essential to the use of GQDs as next-generation semiconductor devices and photocatalysts. Our results show that ordered GQDs (1-6 nm) behave as p-type semiconductors, based on the positive photovoltage in the SPS measurements on Al, Au, and fluorine-doped tin oxide substrates, and generate mobile charge carriers under excitation of defect states at 1.80 eV and under band gap excitation at 2.62 eV. Chemical reduction with hydrazine removes some defects and increases the effective band gap to 2.92 eV. SPS measurements in the presence of sacrificial electron donor and acceptors show that photochemical charge carriers can be extracted and promote redox reactions. A reduced GQDs photocathode supports an unprecedented photocurrent of 50 μA cm-2 using K3Fe(CN)6 as sacrificial electron acceptor. Additionally, while pristine GQDs do not photoreduce protons under visible light, hydrazine-treated GQDs generate H2 from aqueous methanol under visible and UV light (0.04% quantum efficiency at 375 nm) without added co-catalysts. These findings are relevant to the use of GQDs in photochemical and photovoltaic energy-conversion systems.

Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors.

Atomically thin two-dimensional (2D) materials belonging to transition metal dichalcogenides, due to their physical and electrical properties, are an exceptional vector for the exploration of next-generation semiconductor devices. Among them, due to the possibility of ambipolar conduction, tungsten diselenide (WSe2) provides a platform for the efficient implementation of polarity-controllable transistors. These transistors use an additional gate, named polarity gate, that, due to the electrostatic doping of the Schottky junctions, provides a device-level dynamic control of their polarity, that is, n- or p-type. Here, we experimentally demonstrate a complete doping-free standard cell library realized on WSe2 without the use of either chemical or physical doping. We show a functionally complete family of complementary logic gates (INV, NAND, NOR, 2-input XOR, 3-input XOR, and MAJ) and, due to the reconfigurable capabilities of the single devices, achieve the realization of highly expressive logic gates, such as exclusive-OR (XOR) and majority (MAJ), with fewer transistors than possible in conventional complementary metal-oxide-semiconductor logic. Our work shows a path to enable doping-free low-power electronics on 2D semiconductors, going beyond the concept of unipolar physically doped devices, while suggesting a road to achieve higher computational densities in two-dimensional electronics.

Band offset and electronic properties at semipolar plane AlN()/diamond heterointerface**Project supported by the Scholarship Council of China (Grant No. 201508340047), the Postdoctoral Science Foundation of China (Grant No. 2016M601993), the Postdoctoral Science Foundation of Anhui Province, China (Grant No. 2017B215), and the Anhui Province University Outstanding Talent Cultivation Program, China (Grant No. gxfxZD2016077).

Tailoring the electronic states of the AlN/diamond interface is critical to the development of the next-generation semiconductor devices such as the deep-ultraviolet light-emitting diode, photodetector, and high-power high-frequency field-effect transistor. In this work, we investigate the electronic properties of the semipolar plane AlN()/diamond heterointerfaces by using the first-principles method with regard to different terminated planes of AlN and surface structures of diamond (100) plane. A large number of gap states exist at semi-polar plane AlN()/diamond heterointerface, which results from the N 2p and C 2s2p orbital states. Besides, the charge transfer at the interface strongly depends on the surface termination of diamond, on which hydrogen suppresses the charge exchange at the interface. The band alignments of semi-polar plane AlN()/diamond show a typical electronic character of the type-II staggered band configuration. The hydrogen-termination of diamond markedly increases the band offset with a maximum valence band offset of 2.0 eV and a conduction band offset of 1.3 eV for the semi-polar plane N–AlN()/hydrogenated diamond surface. The unique band alignment of this Type-II staggered system with the higher CBO and VBO of the semi-polar AlN/HC(100) heterostructure provides an avenue to the development of robust high-power high-frequency power devices.

Analyzing the channel dopant profile in next-generation FinFETs via atom probe tomography

Dopant analysis in next-generation semiconductor devices has become increasingly difficult for traditionally used analytical techniques. Atom probe tomography has been viewed by some as a possible solution to these challenges because of its three-dimensional capabilities, forcing the atom probe to mature at a rapid pace in this particular field. This work presents a well-rounded analysis of how APT can be used to examine B dopant diffusion into the channel of a next-generation FinFET, where the channel dimensions and the number of dopants atoms are significantly smaller than any devices measured by APT to date. Complimentary EELS analysis of the gate and channel provides a better understanding of how distortions and artifacts in the APT reconstruction affect the overall integrity of the dataset. Dopant measurements in the channel are confirmed through in-depth mass spectrum analysis and compared with values proposed by TCAD modeling.

Dynamics of Radical Ions of Hydroxyhexafluoroisopropyl-Substituted Benzenes.

Fluorination of resist materials is an effective method used to enhance the energy deposition of extreme ultraviolet (EUV) light in the fabrication of next-generation semiconductor devices. The dynamics of radical ions are important to understand when considering the radiation-chemistry of the resist materials using EUV and electron beam lithography. Here, the dynamics of the radical anions and cations of benzenes with one or two 2-hydroxyhexafluoroisopropyl groups (HFABs) were studied using radiolysis techniques. The formation of dimer radical cations was observed only in the monosubstituted benzene solutions of 1,2-dichloroethane. If the compound contained more than two substituents, it was found to hinder the necessary π-π overlapping. Pulse radiolysis of HFABs in tetrahydrofuran showed a characteristic spectral shift of the radical anion within the region of several hundred nanoseconds. From the results of low-temperature spectroscopy and density functional calculations, it is suggested that excess electrons of the 2-hydroxyhexafluoroisopropyl group of the radical anions cause dissociation into neutral radicals.

Iron Loss Characteristics Evaluation Using a High-Frequency GaN Inverter Excitation

Recently, novel magnetic materials have been developed for high-efficiency and high power density electric motors. In addition, next-generation semiconductor devices, like silicon carbide (SiC) or gallium nitride (GaN), have been introduced for power converters due to their high-frequency operation. Therefore, high-frequency operation of new magnetic materials is possible when they are driven by GaN or SiC inverters. Nevertheless, iron loss characterization of magnetic materials when they are excited by high-frequency signals have not been conducted yet. This paper introduces the iron losses characterization of a magnetic material at high carrier frequency excitation using a GANFET inverter. This characterization was carried out by the experimental evaluation of iron losses at carrier frequencies from 5 to 500 kHz at different deadtimes. As a result of the measurements, iron losses seem to have a trend to increase at high carrier frequencies and large deadtimes. In addition, filtering is introduced and it seems to be an effective technique for reducing iron losses.

Atomic-scale finishing of carbon face of single crystal SiC by combination of thermal oxidation pretreatment and slurry polishing

Single-crystal silicon carbide (4H-SiC) has a range of useful physical, mechanical and electronic properties that make it a promising material for fabrication of next-generation semiconductor devices. In this work, we report a hybrid polishing process combining thermal oxidation pretreatment and soft abrasive polishing to realize the damage-free and atomic-scale smooth finishing of the carbon face of 4H-SiC. By thermal oxidation pretreatment, the hardness of the carbon face has been reduced from 4.6GPa to 1.7GPa, which enables highly efficient polishing using CeO2 slurry. For conventional CeO2 slurry polishing without pretreatment, scratches still existed after a long polishing duration for 16h. The probable scratch removal mechanism in CeO2 slurry polishing has been proposed based on surface morphology changes during polishing. Whereas a scratch-free surface with well-ordered SiC atomic steps was obtained within a short polishing duration of only 3h when polishing was conducted on a thermally oxidized surface. Our results demonstrate that hybrid polishing combining surface pretreatment and soft abrasive polishing is a promising approach to realize the damage-free and atomic-scale smooth finishing of the carbon face of 4H-SiC.

Exact location of dopants below the Si(001):H surface from scanning tunneling microscopy and density functional theory

Control of dopants in silicon remains the most important approach to tailoring the properties of electronic materials for integrated circuits, with Group V impurities the most important n-type dopants. At the same time, silicon is finding new applications in coherent quantum devices, thanks to the magnetically quiet environment it provides for the impurity orbitals. The ionization energies and the shape of the dopant orbitals depend on the surfaces and interfaces with which they interact. The location of the dopant and local environment effects will therefore determine the functionality of both future quantum information processors and next-generation semiconductor devices. Here we match observed dopant wavefunctions from low-temperature scanning tunnelling microscopy (STM) to images simulated from first-principles density functional theory (DFT) calculations. By this combination of experiment and theory we precisely determine the substitutional sites of neutral As dopants between 5 and 15A below the Si(001):H surface. In the process we gain a full understanding of the interaction of the donor-electron state with the surface, and hence of the transition between the bulk dopant (with its delocalised hydrogenic orbital) and the previously studied dopants in the surface layer.

Cu–Sn and Ni–Sn transient liquid phase bonding for die-attach technology applications in high-temperature power electronics packaging

Power electronics modules in electric vehicles and hybrid electric vehicles, particularly those containing next-generation power semiconductor devices such as silicon carbide and gallium nitride are operated at high temperatures exceeding 200 °C. Consequently, the reliability requirements for such modules have become highly stringent and new packaging materials and technologies are required to meet the demands of power electronic modules. Some good candidates for high temperature applications include high-temperature solders such as Au–20Sn, Ag or Cu sinter pastes, and transient liquid phase (TLP) bonding materials. In particular, the TLP bonding technology is suitable for use in high temperature environments owing to its low cost and simplicity of the bonding process. In this study, the feasibility of Cu–Sn and Ni–Sn TLP bonding technologies as die-attach methods for power electronics packaging applications is examined. The results of the study indicate that the Cu–Sn and Ni–Sn TLP bonding processes transform the joints fully into Cu6Sn5/Cu3Sn and Ni3Sn4 intermetallic compounds (IMCs), respectively. Further, the mechanical strength and reliability of the two TLP bonding joints are reduced owing to the formation of brittle IMCs.

Smart Polishing of Hard-to-Machine Materials with an Innovative Dilatancy Pad under High-Pressure, High-Speed, Immersed Condition

An innovative dilatancy polishing pad of which characteristics are controlled with processing conditions is proposed to establish high-efficiency, high-quality polishing of hard-to-machine materials for next-generation high-power devices. To make the best use of the property of the dilatancy pad, a highly durable polishing machine which enables high-pressure, high-speed, and immersed polishing was developed. Dilatancy properties were evaluated for various viscoelastic materials to select appropriate materials for a pad. The selected viscoelastic material was mixed with a special filler and abrasive particles, and integrated into a conventional polishing pad to form a dilatancy pad. Application of the dilatancy pad to polishing of SiC realized a smart polishing which achieves both high efficiency and high quality in any processing conditions. In addition, it was demonstrated that the processing conditions could be selected for the purpose of each polishing step, i.e. mid- to high-speed conditions for high-efficiency polishing and low-speed condition for high-quality finishing. A newly developed highly durable polishing machine is capable of achieving wide range of processing conditions. To avoid overheating under high load conditions, the machine can polish a work piece in slurry fluid. The material removal rate using the dilatancy pad showed superlinear dependence on the rotation speed, which outperforms the conventional polishing following the Preston's law. This innovative process can significantly reduce the polishing time of hard-to-machine materials for next-generation semiconductor devices.

Effect of Viscoelasticity of PVA Brush on Friction during Post-CMP Cleaning: A Guideline for Nodule Configuration

The application of new materials and three-dimensional structures are being used to achieve next-generation semiconductor devices. Hence, the role of the chemical-mechanical planarization (CMP) process has gained importance. Polyvinyl acetal (PVA) brushes are widely used as scrubbers during post-CMP cleaning. However, the mechanisms of brush scrubber cleaning are still a matter of debate because direct observation is difficult. Many researchers have proposed the removal mechanisms that operate during brush cleaning based on investigations of the forces acting on particles, friction, and the lubrication characteristics. Hydrodynamic drag forces and direct contact between the brush and the particles have been proposed as cleaning mechanisms [1–5]. Philipossian et al. [6] and Sun et al. [7] focused on the brush design and suggested that the existence of nodules or eccentricity of the roller brush had a significant effect on the friction. The friction system between the roller brush and the surface is complex because of the collision of nodules with the surface. Hence, the shapes of the nodules have been designed through trial and error. In this study, we focus on the friction of a single nodule to investigate the role of nodules in roller brush cleaning. The normal and friction forces are measured during brush sliding. In particular, we focus on the viscoelastic properties of a PVA brush and discuss its effects on friction.

Thermal Modeling of Ultraviolet Nanoimprint Lithography

Nanoimprint lithography (NIL) is a promising nanomanufacturing technology that offers an alternative to traditional photolithography for manufacturing next-generation semiconductor devices. This technology involves coating an ultraviolet (UV)-curable monomer layer on the substrate and then imprinting it with a template containing topography corresponding to the desired substrate features. While the template is close to contact with the substrate, the monomer is cured by UV exposure. This results in definition of desired features on the substrate. While NIL has the potential of defining very small feature sizes, thermal management of this process is critical for ensuring accuracy. Heat generation in the monomer layer due to UV absorption needs to be managed and dissipated in order to avoid thermal expansion mismatch and consequent misalignment between the template and wafer. In addition, thermal dissipation must occur in a timeframe that does not adversely affect the required lithography throughout. This paper develops a numerical simulation model of the nanoimprinting process and utilizes the model to study the effect of various geometrical parameters on the accuracy and throughput of the process. The effect of the UV power characteristics on heat dissipation and consequently on misalignment due to thermal expansion is studied. Results indicate that the thermal expansion mismatch due to commonly used UV exposure parameters may be minimized by utilizing a lower exposure power for longer time. A transient model enables a study of the effect of die imprint sequencing on the overall temperature rise during the process. Results indicate a critical trade-off between minimizing temperature rise on one hand, and maximizing system-level throughput on the other. By identifying and quantifying this trade-off, this work contributes to development of error-free nanoimprint lithography for future technology nodes.

Focus on software and semiconductors

Focus on software and semiconductors