N-type 4H-SiC Epitaxial Layers Research Articles

Fabrication and characterization of high-resolution 4H-SiC epitaxial radiation detectors for challenging reactor dosimetry environments

Reactor dosimetry environments require radiation detectors that are capable of operating at high temperatures in extremely high neutron and gamma-ray dose rates. Silicon carbide (SiC) is one of the most promising wide bandgap semiconductors (3.27 eV) for harsh environment applications due to its radiation hardness, high breakdown voltage, high electron saturation velocity, and high thermal conductivity. In this paper, we summarize the prospect of Schottky barrier radiation detectors, fabricated on highly crystalline low-defect detector-grade n-type 4H-SiC epitaxial layers with thickness ranging from 20 to 250 lm, for harsh environment applications. A comprehensive discussion on the characterization of the parameters that influence the energy resolution has been included. The usage of electrical and radiation spectroscopic measurements for characterizing the junction and rectification properties, minority carrier diffusion lengths, and energy resolution has been elaborated. Characterization of crucial factors that limit the energy resolution of the detectors such as charge trap centers using thermally stimulated transient techniques is summarized. Finally, the effect of neutron fluence on the performance of the 4H-SiC detectors is discussed.

Nitrogen Annealing As a Sustainable Method for Interface Trap Passivation in 4H-SiC Mosfets

Silicon Carbide (4H-SiC) has emerged as a leading wide band gap semiconductor for high-power, high-temperature applications1. 4H-SiC metal-oxide semiconductor-field-effect transistors (MOSFETs) have lower power dissipation compared to silicon, allowing for low-noise and high-efficiency all-electric vehicle drives, fast-charging stations, solar inverters, and more. While these devices provide substantial advancements for next-generation energy efficient power systems, 4H-SiC may also offer additional functionality in the form of integrated circuits (ICs) at high temperatures (>300 °C). Because of its high noise immunity and low static power consumption, lateral complementary-metal-oxide-semiconductor (CMOS) IC technology in 4H-SiC is desirable for large-scale integration2. This technology necessitates the use of both n- and p-channel MOSFETs that can operate at high temperatures.Despite the advances of 4H-SiC MOSFETs, the high density of interface states (Dit) at the 4H-SiC/SiO2 interface prevents reaching full potential resulting in high channel resistance and low mobility. Alternatives to nitric oxide (NO) annealing, the most common method adopted to reduce Dit in 4H-SiC3,4, are actively sought due to its toxicity and relatively expensive cost. Annealing in pure nitrogen (N2)5,6 at high temperatures (1400 °C-1600 °C) has been recently demonstrated promising results for 4H-SiC MOSFET processing. In this work, we report Dit measurements consistent with [6] and attempt to correlate the nitrogen areal densities of the near interfacial regions with the Dit for high temperature N2 annealing processes compared to NO. In our study, metal oxide semiconductor capacitors were fabricated on p- and n-type 4H-SiC epitaxial layers. Gate oxides were thermally grown at 1150 °C for 10 h in dry O2 resulting in a ~ 60 nm thick oxide layer. Selected samples are then annealed in flowing N2 at high temperatures (1400 °C, 1 h; 1450 °C, 1 h; and 1500 °C, 30 minutes or 1 h) or NO (1175 °C, 2 h). X-ray photoelectron spectroscopy (XPS), carried out after etching the oxide, indicates that the amount of nitrogen at the interface due to high temperature N2 annealing is ~ 4 × higher than NO annealed devices. Simultaneous high frequency (100 kHz)- low frequency CV was performed to extract interface trap densities (Dit) for each process and compared at room temperature (27 °C) with reference 1175 °C, 2 h NO annealed samples. The comparison reveals that, N2 annealing at 1500 °C for 30 minutes with a flow rate of 3 LPM results in Dit values comparable to NO annealing across the bandgap. Moreover, nitrogen annealing is more effective in reducing Dit near the valence band than NO annealing, while the opposite is true close to the conduction band-edge, consistent with previous reports [6] and observed in atomistic models of these interfaces using the density functional theory7. Nitrogen annealing also decreases the positive fixed charges at the interface of p-type 4H-SiC and SiO2, as evidenced from the flat band voltage comparison. The oxide breakdown voltage for the devices made with 1500 °C N2 annealing was similar to that of NO annealed devices. XPS analysis of the N2 annealed devices, their behavior under high temperature and bias, and their potential to substitute NO will be further discussed.The authors gratefully acknowledge the support from the National Renewable Energy Laboratory/ US Department of Energy sub-contract NREL-AHL-9-92362-01.

Performance-Improved Vertical Ni/SiO₂/4H-SiC Metal–Oxide–Semiconductor Capacitors for High-Resolution Radiation Detection

We report the fabrication of vertical metal–oxide–semiconductor (MOS) detectors with the highest energy resolution ever reported. The MOS detectors have been fabricated on 50- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> -thick n-type 4H-SiC epitaxial layers by growing a silicon dioxide (SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) layer thermally prior to contact deposition. The MOS detectors exhibited leakage currents two orders of magnitude lower than that observed in a Schottky barrier detector (SBD) fabricated on similar 4H-SiC epilayers. The MOS detectors exhibited a much higher energy resolution of 0.4% compared to 0.8% observed in an SBD for 5486-keV alpha particles although both the devices showed a high charge collection efficiency (CCE) of 96% when exposed to the alpha particles. Capacitance mode deep-level transient spectroscopy (C-DLTS) revealed the presence of “lifetime killer” <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{Z}_{\mathrm {1/2}}$ </tex-math></inline-formula> defects in similar concentrations in both the devices, and however, the corresponding capture cross section in the SBD has been observed to be one order of magnitude higher compared to the MOS detector, and instead of EH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6/7</sub> center seen in the SBD, the MOS device showed the presence of EH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> center. The higher resolution of the MOS device is attributed to the lower leakage current and difference in defect configurations observed between the two devices. The MOS detector showed a positive polarity C-DLTS peak with an activation energy of 1.22 eV, which is likely due to the nonnegligible impedance of the back contact because of the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layer. The present study opens the great potential of other wide bandgap semiconductor-based vertical MOS detectors, which can be fully depleted for high-resolution X-/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\gamma $ </tex-math></inline-formula> -ray detection.

Enhancement of radiation detection performance with reduction of EH6/7 deep levels in n-type 4H–SiC through thermal oxidation

We report the effect of EH6/7 electron trap centers alone on the performance of high-resolution radiation detectors fabricated on n-type 4H–SiC epitaxial layers. A Schottky barrier detector (SBD) and a metal-oxide-semiconductor (MOS) capacitor detector fabricated using two sister samples derived from the same 50 μm 4H–SiC parent wafer exhibited widely different energy resolutions of 0.4% and 0.9% for 5486 keV alpha particles. An equivalent noise charge model analysis ruled out the effect of the detector capacitance and the leakage current on the resolution of the detectors. Deep level transient spectroscopic studies revealed the presence of two trapping centers in each detector within the temperature scan range 240–800 K. The Z1/2 center, a potential electron trap, was detected in both the detectors in equal concentration, which suggested that the observed difference in the energy resolution is due to the presence of the other defect, the EH6/7 center, in the SBD. The capture cross section of the EH6/7 center was calculated to be three orders of magnitude higher than the second defect [a carbon antisite vacancy (CAV) center] observed in the MOS detector with an activation energy of 1.10 eV, which accounted for the enhanced electronic trapping in the SBD leading to its poor energy resolution. It has been proposed that the EH6/7 centers in the SBD have likely been reconfigured to CAV pairs during the thermal growth of the silicon dioxide layer in the MOS detector. The proposed formation mechanism of CAV, a stable qubit state for quantum information processing, addresses the outstanding questions related to the role of defect dynamics in their formation.

Influence of carrier trapping on radiation detection properties in CVD grown 4H-SiC epitaxial layers with varying thickness up to 250 µm

Low doped n-type 4H-SiC epitaxial layers of thickness 50, 150, and 250 µm grown by hot wall chemical vapor deposition were used to fabricate Ni/4H-SiC Schottky radiation detectors. The epitaxial layers were grown on the (0001) face of highly conductive bulk 4H-SiC substrates 8° offcut towards the 〈112¯0〉 direction. The 50, 150, and 250 µm thick epilayer detectors, under optimized settings, showed energy resolutions of 2.0%, 0.78%, and 0.63%, respectively for 5.48 MeV alpha particles. Deep level transient spectroscopy studies showed that the observed variation in the detector resolution is linked to the defect parameters in the devices. Least-squares fitting of the bias dependence of the charge collection efficiency according to a drift-diffusion model, revealed minority carrier diffusion lengths of 16, 10, and 9.2 µm, respectively, implying that the detectors are not limited by minority carrier trapping. The detector performance was observed to be primarily dependent on the concentration and capture cross-sections of the lifetime killing electron traps Z1/2 and EH6/7.

Defect characterization and charge transport measurements in high-resolution Ni/n-4H-SiC Schottky barrier radiation detectors fabricated on 250 μm epitaxial layers

Advances in the growth processes of 4H-SiC epitaxial layers have led to the continued expansion of epilayer thickness, allowing for the detection of more penetrative radioactive particles. We report the fabrication and characterization of high-resolution Schottky barrier radiation detectors on 250 μm thick n-type 4H-SiC epitaxial layers, the highest reported thickness to date. Several 8 × 8 mm2 detectors were fabricated from a diced 100 mm diameter 4H-SiC epitaxial wafer grown on a conductive 4H-SiC substrate with a mean micropipe density of 0.11 cm−2. From the Mott–Schottky plots, the effective doping concentration was found to be in the range (0.95–1.85) × 1014 cm−3, implying that full depletion could be achieved at ∼5.7 kV (0.5 MV/cm at the interface). The current-voltage characteristics demonstrated consistently low leakage current densities of 1–3 nA/cm2 at a reverse bias of −800 V. This resulted in the pulse-height spectra generated using a 241Am alpha source (5486 keV) manifesting an energy resolution of less than 0.5% full width at half maximum (FWHM) for all the detectors at −200 V. The charge collection efficiencies (CCEs) were measured to be 98–99% with no discernable correlation to the energy resolution. A drift-diffusion model fit to the variation of CCE as a function of bias voltage, revealed a minority carrier diffusion length of ∼10 μm. Deep level transient spectroscopy measurements on the best resolution detector revealed that the excellent performance was the result of having ultralow concentrations of the order of 1011 cm−3 lifetime limiting defects—Z1/2 and EH6/7.

Radiation detection using fully depleted 50 μm thick Ni/n-4H-SiC epitaxial layer Schottky diodes with ultra-low concentration of Z1/2 and EH6/7 deep defects

Recent advances in the development of thick 4H-SiC epitaxial layers for the fabrication of surface barrier radiation detectors have been paving the way for their use in highly penetrating radiation detection. Challenges still exist to achieve full depletion all the way to the epilayer width, while maintaining a low leakage current at high reverse bias conditions. We report the fabrication of high-resolution and low leakage current Schottky barrier alpha particle detectors with a large active area of 11 mm2 on 50 μm thick n-type 4H-SiC epitaxial layers, which can be fully depleted. The detectors were cut out of large substrates of 100 mm diameter with a micropipe density &amp;lt;1 cm−2 in the epilayers. Mott–Schottky plots obtained from the capacitance–voltage measurements revealed an effective doping concentration of 1.9×1014cm−3. A parallel plate capacitor model implied that a reverse bias of ∼440 V was needed to achieve a full-depletion width (50 μm). The current–voltage characteristics demonstrated a very low leakage current of 0.45 nA at a reverse bias of −450 V, which is low enough for the detector to be operated at full-depletion bias. In fact, pulse height spectroscopy using a 241Am alpha source, with the detector biased at −120 V, exhibited a well-resolved alpha spectrum with an energy resolution of 0.8% for the alpha peak corresponding to 5486 keV. This energy resolution was maintained consistently up to a full-depletion bias of −440 V. The ultra-stable performance of the detector has been attributed to the remarkably low concentration of carrier lifetime affecting deep-level defects like Z1/2 and EH6/7, which were found to be of the order of 1012cm−3 or less using capacitance mode deep-level transient spectroscopy measurements.

Ti/4H-SiC Schottky diode with breakdown voltage up to 3 kV

In this study the breakdown voltage for Ti/4H-SiC type Schottky diode with six guard rings and JTE layer has been calculated by mean of numerical simulations. It is established that increase of the n-type 4H-SiC epitaxial layer from 14 up to 20 μm and addition of JTE layer lead to increase of breakdown voltage value on ∼900 V in contrast to the same diode without JTE. The above-mentioned diode’s structure gives the possibility for designing and production of diode with higher breakdown voltage value up to 3 kV.

Investigation of the distribution of deep levels in 4H-SiC epitaxial wafer by DLTS with the method of decussate sampling

• Z 1/2 defect typically exist in n-type 4H-SiC epitaxial layer. • Defect concentration uniformity of the epilayer is 5.74%. • Z 1/2 defect is uniformly distributed in 4-inch n-type 4H-SiC epitaxial layer. • Ti center did not appear at the temperature range from 80 K to 500 K. In this paper, Schottky structures were fabricated on the epitaxial wafers and the deep levels of the wafers were measured by deep level transient spectroscopy (DLTS). The thickness of the commercial n-type 4°off-axis 4H-SiC (0 0 0 1) epitaxial wafers was 100 μm, with a doping concentration of 2 × 10 14 cm −3 . Nine sample points were selected along with the direction of [1–100] and [11–20] on the wafer. Through the peak fitting analysis of the test results, the detailed information of deep level defects in the epitaxial layer was obtained. The typical deep level defect Z 1/2 was found, but Ti center did not appear, which indicates that Ti center was not introduced in our technological process. Defect concentration uniformity of the 4-inch 4H-SiC epitaxial wafer is 5.74%. The results demonstrate that although the concentration of Z 1/2 defect differs in different locations, but the difference is so small that Z 1/2 defect concentration can be considered to be evenly distributed across the wafer.

Ti/4H-SiC Schottky diode breakdown voltage with different thickness of 4H-SiC epitaxial layer

Breakdown voltage for Ti/4H-SiC type Schottky diode with six guard rings have been calculated theoretically and by mean of numerical simulations. It is shown that the breakdown voltage can be increase at the minimum on 100 V in case when thickness of the n-type 4H-SiC epitaxial layer increase from 18 up to 22 μm. It is established that the breakdown voltage value for Ti/4H-SiC type Schottky diode with guard rings calculated by mean simulation in ATLAS program and theoretically have good approximation. Thus, above approach gives the possibility for projection of diode structure with different 4H-SiC epitaxial layer thickness with higher breakdown voltage value.

Analysis of Compensation Effects in Aluminum-Implanted 4H-SiC Devices

In this work, we analyze compensating defects which are formed after implantation of aluminum (Al) into n-type 4H-SiC epitaxial layers and subsequent thermal annealing. These defects reduce the expected free charge carrier density by 84% for a low doped layer with [Al]impl ≈ 9ž·1016 cm-3 and by 27 % for a high doped layer with [Al]impl ≈ 2·ž1019 cm-3. Furthermore, an electrical activation ratio of implanted aluminum ions of 100 % is calculated. The ionization energy of implanted aluminum as measured by Hall effect and admittance spectroscopy ranges from 101 meV to 305 meV depending on the doping concentration.

Kinetics Modeling of the Carbon Vacancy Thermal Equilibration in 4H-SiC

The carbon vacancy (VC) is a major limiting-defect of minority carrier lifetime in n-type 4H-SiC epitaxial layers and it is readily formed during high temperature processing. In this study, a kinetics model is put forward to address the thermodynamic equilibration of VC, elucidating the possible atomistic mechanisms that control the VC equilibration under C-rich conditions. Frenkel pair generation, injection of carbon interstitials (Ci’s) from the C-rich surface, followed by recombination with VC’s, and diffusion of VC’s towards the surface appear to be the major mechanisms involved. The modelling results show a close agreement with experimental deep-level transient spectroscopy (DLTS) depth profiles of VC after annealing at different temperatures.

Radiation Hardness for Silicon Oxide and Aluminum Oxide on 4H-SiC

The radiation hardness of two dielectrics, SiO2 and Al2O3, deposited on low doped, n-type 4H-SiC epitaxial layers has been investigated by exposing MOS structures involving these materials to MeV proton irradiation. The samples are examined by capacitance voltage (CV) measurements and, from the flat band voltage shift, it is concluded that positive charge is induced in the exposed structures detectable for fluence above 1×1011 cm-2. The positive charge increases with proton fluence, but the SiO2/4H-SiC structures are slightly more sensitive, showing that Al2O3 can provide a more radiation hard passivation, or gate dielectric for 4H-SiC devices.

Improving the quality of Al2O3/4H-SiC interface for device applications

The present paper focuses on the investigation of Al2O3/4H-SiC dielectric interface upon annealing, its consequent structural modifications, and the link to electrical properties. For this purpose, the test structures are prepared by depositing Al2O3, using atomic layer deposition (ALD), on low doped n-type 4H-SiC epitaxial layers. The structures are annealed from 300 °C to 1100 °C for different time duration (from 5 to 60 mins) and ambient such as, low vacuum (10−1 Torr), N2, and N2O. The structural studies on these samples are conducted using synchrotron-based high resolution x-ray photoelectron spectroscopy (HR-XPS), lab-based XPS, time of flight elastic recoil detection analysis (ToF-ERDA), and time of flight medium energy ion scattering (ToF-MEIS). The electrical response of capacitive structures is monitored through capacitance voltage (CV) measurements for as-deposited and annealed structures. It is found that the annealing at high temperatures, such as 1100 °C, and in N2 or N2O environment, improves the dielectric properties due to the introduction of a thin layer of about 1 nm stable SiO2 between the Al2O3 and 4H-SiC.

Deep level defects in 4H-SiC introduced by ion implantation: the role of single ion regime

We characterized intrinsic deep level defects created in ion collision cascades which were produced by patterned implantation of single accelerated 2.0 MeV He and 600 keV H ions into n-type 4H-SiC epitaxial layers using a fast-scanning reduced-rate ion microbeam. The initial deep level transient spectroscopy measurement performed on as-grown material in the temperature range 150–700 K revealed the presence of only two electron traps, Z1/2 (0.64 eV) and EH6/7 (1.84 eV) assigned to the two different charge state transitions of the isolated carbon vacancy, VC (=/0) and (0/+). C–V measurements of as-implanted samples revealed the increasing free carrier removal with larger ion fluence values, in particular at depth corresponding to a vicinity of the end of an ion range. The first DLTS measurement of as-implanted samples revealed formation of additional deep level defects labelled as ET1 (0.35 eV), ET2 (0.65 eV) and EH3 (1.06 eV) which were clearly distinguished from the presence of isolated carbon vacancies (Z1/2 and EH6/7 defects) in increased concentrations after implantations either by He or H ions. Repeated C–V measurements showed that a partial net free-carrier recovery occurred in as-implanted samples upon the low-temperature annealing following the first DLTS measurement. The second DLTS measurement revealed the almost complete removal of ET2 defect and the partial removal of EH3 defect, while the concentrations of Z1/2 and EH6/7 defects increased, due to the low temperature annealing up to 700 K accomplished during the first temperature scan. We concluded that the ET2 and EH3 defects: (i) act as majority carrier removal traps, (ii) exhibit a low thermal stability and (iii) can be related to the simple point-like defects introduced by light ion implantation, namely interstitials and/or complex of interstitials and vacancies in both carbon and silicon sub-lattices.

(Invited) Thermal Stability of 1×1020 cm-3 Al+ Implanted 4H-SiC after Electrical Activation at Temperature ≥ 1850°C

In 4H-SiC electronic devices, Al+ ion implantation is often used to obtain selected regions of desired p-type conductivity in n-type epitaxial layers. A mandatory high temperature annealing is necessary after the implantation process for the electrical activation of the implanted Al. The temperature of the former and the density of the latter vary in the range 1600-1950°C and 1017-1020 cm-3, respectively. The switching properties of the so obtained bipolar junctions depend on carrier life-time in the n-type 4H-SiC epitaxial layers after processing. In the literature, it has been shown that carbon vacancy VC in n-type 4H-SiC epi-layers is a carrier life-time killer defect and that its concentration, after high temperature treatments in the range 1500-1950°C, saturates on values that are higher the higher are the applied temperature and cooling rate [1]. It has been also shown that, in the case the thermally treated 4H-SiC epi-layers were ion implanted, and whatever is the implanted ion species, VC annihilation took place from 1000°C till 1500°C, while at 1600°C the phenomena of VC annihilation and VC formation seem to compete [2], suggesting that up to 1500°C, a carbon interstitial IC’s injection from the implanted near-surface layer into the epi-layer can be sufficient to make dominant VCannihilation, but this is not the case at 1600°C. Our previous studies on carrier life-time in Al+ implanted p+-n-n+ diodes, with 6×1019 cm-3 and 2×1020 cm-3 Al+ implanted emitters after 1600 °C/20 min without carbon-cap (C-cap) and 1950 °C/5 min with C-cap post implantation annealing, respectively, have shown longer carrier life-time for diodes annealed at the lower temperature, about 700 ns against 170 ns [3], as measured by open circuit voltage decay (OCVD). The diodes annealed at the higher temperature have shown, by DLTS spectroscopy, a VC concentration lower by a factor ~ 3 relative to that in as-grown epi-layers subjected to almost the same thermal annealing (1950 °C /3 min) [1]. If the ion dose is sufficiently high, it is reasonable that injection of IC’s from the implanted layer into the epi-layer bulk takes place even at temperatures as high as 1950 °C but thermal generation of VCstill remains the prevailing process. Taking into account the above results, it sounds reasonable to deserve efforts to the investigation of an ion implantation technology for bipolar junction in 4H-SiC where the electrical activation of the implanted species is achieved by a high temperature treatment and the degradation of the carrier life-time in the device drift layer is rescued by a subsequent low temperature treatment. The first step towards such a technology is to verify that during the thermal treatment for carrier life-time rescue, none or negligible deactivation of the electrically activated dopant takes place. This is the purpose of this study. 4H-SiC materials, both high-purity-semi-insulating (HPSI) and low doped n-type, have been implanted with Al+ ions so to obtain a homogenous doped layer next of the wafer surface. Post implantation annealing has been performed at 1950°C for different times in the range 5-40 min. Some samples have been also thermally treated at 1500°C for 40 min or for 240 min. During every annealing, the sample were protected by a pyrolyzed resist film (C-cap), that was removed after the last thermal treatment. The implanted Al concentration was 1×1020 cm-3, that is lower than Al solubility in 4H-SiC at 1950°C, and higher than the expected, but never measured, Al solubility in 4H-SiC at 1500°C [4]. Van der Pauw devices were used for Hall effect and sheet resistance measurements in the temperature range 180-680 K. The temperature dependences of these data show that the 1500°C treatment has an effect ranging from “neutral” to “beneficial” on the electrical transport of the Al+implanted 4H-SiC layer submitted to a 1950°C annealing immediately after implantation. This result opens the way towards the fabrication of bipolar diodes with p-type emitters of almost identical hole density but different thermal treatments after implantation, thus with drift layers that might have very different current transport properties. [1] H. M. Ayedh, V. Bobal, R. Nipoti, A. Hallén, B. G. Svensson, J. Appl. Phys. 115, 012005 (2014) [2] H. M. Ayedh, A. Hallén, B. G. Svensson, J. Appl. Phys. 118, 175701 (2015). [3] H. M. Ayedh, M. Puzzanghera, B. G. Svensson, R. Nipoti, Mater. Sci. Forum 897, 279-282 (2017) [4] M. K. Linnarson, U. Zimmermann, J. Wong-Leung, A. Shoener, M.S. Janson, C. Jagadish, B. G. Svensson, Appl. Surf. Sci. 203-204, 427-432 (2003).

(Invited) Study of Minority Carrier Lifetime Killer by Synchrotron X-Ray Topography

The lifetime of minority carrier is an important property of a semiconductor material that controls the performance of high voltage/ high power and frequency devices. For instance, in high power device applications, a longer carrier lifetime is desirable to mitigate power loss under forward bias. By comparison, a shorter lifetime is more suitable in high frequency devices as it help reduce power loss during switching cycles. Despite recent studies linking structural defects, growth parameters and material thickness to variation in carrier lifetime in silicon carbide epitaxial layers [1-3], little is known about these lifetime limiting defects/parameters and their influence on carrier recombination because of variability in measurement. Therefore, systematically identifying these factors will shed light into ways to mitigate/annihilate their effects. In this paper, we first report on the influence of structural defects on minority carrier lifetime in n-type 4H-SiC epitaxial layers. The lifetime maps for a 2” quarter wafer (sample 1) and a 4” diameter half wafer (sample 2) were recorded using microwave photoconductive decay (μPCD) measurements and correlated with the synchrotron X-ray topography (SXRT) map of structural defects. The lifetime map of sample 1 revealed a drastic reduction in carrier lifetime along the edges and inside one of its facets (facet 1), which was correlated with the presence of microcracks, BPD loops, overlapping triangular defects, high density of multi-layer Shockley stacking faults (SFs) and low angle grain boundaries (LAGBs). Like sample 1, sample 2 showed a reduced carrier lifetime along the edges, which corresponded to regions of high density of overlapping triangular defects, microcracks and BPD loops in the SXRT map. Furthermore, a shorter lifetime was observed in the middle region of sample 2. Synchrotron X-ray topography map correlated this shorter lifetime to networks of interfacial dislocations (IDs) and half loop arrays (HLAs) originating from 3C inclusions that were generated during epilayers growth. Following further analysis of the SXRT maps, it was observed that the stacking faults in facet 1 of sample 1 were double Shockley stacking faults (DSSFs) that have likely nucleated from scratches present on the substrate surface and LAGBs present in that region, which propagated during epilayer growth. The mechanism of formation of these DSSFs is discussed in light of an electronic model proposed by Kuhr [4] and observed by Pirouz [5]. The mechanism of formation of the IDs and HLAs is also discussed. We discuss the mitigated influence of numerous morphological defects observed on the surface of both epilayer samples. Finally, the implication of these observations on the selection and processing of silicon carbide substrates for epilayer growth is addressed in light of the lifetime maps. 1. J. Hassan and J. P. Bergman, J. Appl. Phys. 105 (12), 2009 2. Louisa Lija, J. Hassan, I. Booker, P. Bergman and E. Janzen, Mat. Sci. Forum 740-742, 2013 3. B. Kallinger, P. Berwian, J. Friedrich, M. Rommel, M. Azizi, C. Hecht and P. Friedrichs, Mat. Sci. Forum 740-742, 2013 [4] P. Pirouz, et al., Phil. Mag. 86, 2006. [5] T. A. Kuhr et al., J. Appl. Phys. 92, 2002.

Deep Levels in n-Type 4H-Silicon Carbide Epitaxial Layers Investigated by Deep-Level Transient Spectroscopy and Isochronal Annealing Studies

Deep levels were investigated by the capacitance mode deep-level transient spectroscopy (C-DLTS) on 4H-SiC Schottky barrier diodes fabricated on $50\;\mu\text{m}$ -thick n-type 4H-SiC epitaxial layers. C-DLTS scans from 80 K to 800 K revealed the presence of Ti(c), ${{\rm Z}_{1/2}}$ , ${\rm EH}_{5}$ , and ${\rm EH}_{6/7}$ defect levels in the energy range from 0.17 to 1.6 eV below the conduction band edge. The annealing out of primary defects and generation of secondary defects were investigated by systematic and thorough C-DLTS studies from prior and subsequent isochronal annealing in the temperature range from 100 °C to 800 °C. The capture cross-section of Ti(c) was observed to decrease up to 400 °C and remained unchanged at higher annealing temperatures. Defect densities were shown to decrease up to 200 °C and gradually increase at higher temperatures. The ${{\rm Z}_{1/2}}$ and ${\rm EH}_{6/7}$ defect parameters showed similar variation for the temperature range studied. The thermal evolutions of these deep levels in n-type 4H-SiC epitaxial layers are analyzed and discussed for the first time.

-ray detector based on n-type 4H-SiC Schottky barrier diode

Silicon carbide (SiC) is a wide band-gap, high-temperature-resistant, and radiation-resistant semiconducting material, which can be used as a radiation detector material in harsh environments such as high radiation background and high temperatures. Schottky barrier diode radiation detectors are fabricated using 100 upm-thick n-type 4H-SiC epitaxial layers for low energy -ray detection. The spectrum responses of 4H-SiC Schottky barrier detectors are investigated by irradiation of -ray from 241Am source. Schottky diodes are prepared by magnetron-sputtering 100 nm-thick nickel on epitaxial surface (Si face) to obtain Schottky contact and Ni/Au on substrate surface (C face) to obtain Ohmic back contact, respectively. Room temperature current-voltage (I-V) and capacitance-voltage (C-V) curves are measured to study the properties of Schottky diodes. Ohmic characteristic measurement shows that the Ohmic contact is formed after annealing in a temperature range of 900-1050℃, and the lowest specific contact resistivity of 2.5510-5 cm2 is obtained after annealing at 1050℃. The forward I-V curve reveals that the Schottky barrier height and the ideality factor are 1.617 eV and 1.127, respectively, indicating that the main current transportation process is the thermal electron emission. From the C-V curve, besides the net dopant concentration being inferred to be 2.9031014 cm-3, the profile of the free carrier concentration in epitaxial layer is also studied. A comparision of the reverse I-V curves of SiC Schottky diodes with different epitaxial layer thickness shows that the diode with 100 upm-thick epitaxial layer has a constant reverse leakage current when the bias voltage is less than 400 V, showing good rectification characteristics. By applying a reverse bias of 500 V, the diode has a leakage current of 2.11 nA, exhibiting a relatively high breakdown voltage. The depletion layer width of SiC detector is calculated to be 94.4 m at 500 V, indicating that the epitaxial layer is almost fully depleted. The signal of SiC detector through preamplifier displays a relatively low amplitude pulse (15 mV). A typical -ray spectrum response from SiC detector shows 9.49% (5.65 keV) energy resolution for 59.5 keV with a reverse bias of 300 V. The potential causes of poor count rate and energy resolution of fabricated detectors are analyzed in this article. The lower count rate is mainly caused by the narrow depletion layer, resulting in fewer photons deposited in sensitive region which can generate carriers. The poor energy resolution of SiC detector can be attributed to the electronic noise of read-out circuit, the pre-match amplifier circuit for detector needs to be improved, in addition, the extra defects existing in detector caused by increasing thickness of epitaxial layer can also deteriorate the detector performance.

Ru-Induced Deep Levels in Ru/4H-SiC Epilayer Schottky Diodes by Deep Level Transient Spectroscopy

Ru-induced deep levels in 50 μm n-type 4H-SiC epitaxial layers were investigated by Deep Level Transient Spectroscopy (DLTS). Schottky diodes were fabricated by radio frequency (RF) sputtering thin layers of Ru metal on the epilayer surface and graphite paste for back Ohmic contact. Current-Voltage measurements (I-V) revealed a high barrier height of 1.70 eV and a diode ideality factor of 1.2 at room temperature (300 K). An effective carrier concentration of 4.34 × 1014 cm−3 was determined from a Mott-Schottky plot of the Capacitance-Voltage (C-V) measurements. DLTS studies revealed seven prominent defect levels at 0.12 ± 0.02, 0.17 ± 0.01, 0.65 ± 0.01, 0.89 ± 0.03, 1.26 ± 0.04, 1.53 ± 0.06, and 1.98 ± 0.03 eV below the conduction band edge. Defect data reported in the literature suggests the new defect level of EC – (0.89 ± 0.03) eV may be correlated to Ru-induced defect formation in 4H-SiC epitaxial layer. The defect level observed at EC – (1.98 ± 0.03) eV has been observed for the first time in 50 μm 4H-SiC epilayer following Ru Schottky barrier formation and subsequent rapid thermal annealing (RTA) and this deep level has not been reported elsewhere.