Multithreaded Applications Research Articles

Implementation of concurrency control mechanisms to enhance the performance of multi-threaded applications

Concurrency control is a crucial aspect of multi-threaded application development, directly impacting performance and resource utilization.This research project investigates the impact of various concurrency control mechanisms on the performance of multi-threaded applications, specifically focusing on mutexes, semaphores, and lock-free data structures implemented using queues. Conducted in a Python environment within Google Colab, the study aims to assess performance metrics such as execution time, cpu usage, and memory usage. Each mechanism’s performance was evaluated through repeated trials, and the results were aggregated and averaged to ensure reliability. By systematically evaluating these concurrency control mechanisms, the project seeks to understand how each approach affects the efficiency of applications in a multi-threaded context. The findings reveal that the queue mechanism provides the fastest execution time, the semaphore mechanism, on the other hand, exhibited the lowest CPU usage, and the mutex mechanism offered a balanced performance in both speed and CPU efficiency. Memory usage was similar in mutex and semaphore, but queue differed significantly from the other two. These results show that the choice of concurrency control mechanism should be guided by the specific requirements of the application, considering factors such as workload nature and system architecture.

Making Sense of Multi-threaded Application Performance at Scale with NonSequitur

Modern multi-threaded systems are highly complex. This makes their behavior difficult to understand. Developers frequently capture behavior in the form of program traces and then manually inspect these traces. Existing tools, however, fail to scale to traces larger than a million events. In this paper we present an approach to compress multi-threaded traces in order to allow developers to visually explore these traces at scale. Our approach is able to compress traces that contain millions of events down to a few hundred events. We use this approach to design and implement a tool called NonSequitur. We present three case studies which demonstrate how we used NonSequitur to analyze real-world performance issues with Meta's storage engine RocksDB and MongoDB's storage engine WiredTiger, two complex database backends. We also evaluate NonSequitur with 42 participants on traces from RocksDB and WiredTiger. We demonstrate that, in some cases, participants on average scored 11 times higher when performing performance analysis tasks on large execution traces. Additionally, for some performance analysis tasks, the participants spent on average three times longer with other tools than with NonSequitur.

Development of lock-free approach for shared memory organisation in real-time multi-threading applications

Development of lock-free approach for shared memory organisation in real-time multi-threading applications

Application of multithreading for protection programs

A method for identifying a program copy by means of digital watermark is presented in this article. Previously known analogues for constructing a watermark used modification of program's control flow graph, and reading was made via complex analysis of the program's trace. It is known that applying a protector or packer can neutralize such a watermark. In this paper, it is proposed to use a multi-threaded application that generates numbers with a normal distribution law. The embedding of the digital watermark is carried out by changing the dispersion of distributions. Such random variable can be found via a signature in the process memory and is used both within the program itself and by a third-party when reading the watermark. An experimental selection of the optimal parameters of the algorithm has been carried out. Overhead expenses associated with the creation of a large number of threads are estimated.

Удаленная работа с комплектом тягового электрооборудования карьерного самосвала

The electromechanical transmission of a mine dump truck is an electrical equipment complex with a set of parameters for setting and status monitoring. To improve the quality and to reduce the time and cost of service maintenance of mine dump trucks, a data transmission system is organized that provides remote work with control system units. Such systems significantly increase the efficiency of operation of mine dump trucks with the integrated use of a standard approach to maintenance and repair of mining equipment and mobile technologies. They allow to identify most of the faults due to the use of a real-time parameter monitoring system during the routine operation of mine truck. The authors have used the methods of design and software architecture, methods of object-oriented programming and development of multi-threaded applications using the high-level programming language C/C++. The paper proposes a functional diagram of data transmission for remote operation with electrical equipment blocks. The description of the instrumental software for monitoring and configuring the parameters of the dump trucks electric transmission is given. A procedure for remote work with a set of traction electrical equipment has been developed. The developed system has been tested at the stages of testing and adjustment. It is used in real operating conditions and allows organizing service maintenance of domestic-made dump trucks at a level that is not inferior to their best imported counterparts. The use of an integrated approach and the extended list of diagnostic parameters of the electric transmission when it is singled out as a separate element of the diagnostic system significantly improves the quality-of-service maintenance of traction electrical equipment.

Timing and Performance Metrics for TWR-K70F120M Device

Currently, single-board computers (SBCs) are sufficiently powerful to run real-time operating systems (RTOSs) and applications. The purpose of this research was to investigate the timing performance of an NXP TWR-K70F120M device with μClinux OS on concurrently running tasks with real-time features and constraints, and provide new and distinct technical data not yet available in the literature. Towards this goal, a custom-built multithreaded application with specific compute-intensive sorting and matrix operations was developed and applied to obtain measurements in specific timing metrics, including task execution time, thread waiting time, and response time. In this way, this research extends the literature by documenting performance results on specific timing metrics. The performance of this device was additionally benchmarked and validated against commonly used platforms, a Raspberry Pi4 and BeagleBone AI SBCs. The experimental results showed that this device stands well both in terms of timing and efficiency metrics. Execution times were lower than with the other platforms, by approximately 56% in the case of two threads, and by 29% in the case of 32-thread configurations. The outcomes could be of practical value to companies which intend to use such low-cost embedded devices in the development of reliable real-time industrial applications.

The Application of an Inverse Methodology to Predict Nonlinear Thermal Properties in Laser Beam Welding

Modern engineering applications use processes that submit materials to high-temperature gradients. However, the traditional experimentation methods applied to determine thermal properties often do not provide reliable data when working temperatures are up to extreme conditions. Hence, the present work demonstrates the use of an inverse heat conduction problem methodology for estimating the thermal properties of a laser beam welding (LBW) process. The applied technique is the quadrilateral optimization method (QOM), which consists of a multivariable estimation approach developed to calculate the function’s parameters. Additionally, the future time regularization scheme was implemented in the objective function to regularize the results. The applied numerical process solved the energy equation using the finite volume method implemented in an in-house CUDA-C language code. The software is a multi-thread application run in a graphics processing unit for enhanced computational time efficiency. A validation study compared the estimated results with LBW simulated data. The QOM estimates the parameters of a function representing the range of thermal conductivity values. The proposed method is expected to lower experimental costs for obtaining thermal properties at high temperatures by eliminating the need for sophisticated technical equipment and skilled labor required by traditional direct measurements.

WHAT IS A DEADLOCK IN JAVA AND HOW TO AVOID IT

During the development of multithreaded applications, there is often a dilemma: what is more important, reliability or program efficiency. For example, we use synchronization for thread safety, but incorrect synchronization can lead to deadlock [1]. We also use thread pools and semaphores to limit resource usage, but an error in such a design can result in deadlock due to resource shortage.

Anthropomorphic diagnosis of runtime hidden behaviors in OpenMP multi-threaded applications

Extreme-scale computing involves hundreds of millions of threads with multi-level parallelism running on large-scale hierarchical and heterogeneous hardware. Some OpenMP multi-threaded applications increasingly suffer from runtime hidden behaviors owning to shared resource contention as well as software- and hardware-related problems. Such hidden behaviors can result in failure and inefficiencies and are among the main challenges in system resiliency. To minimize the impact of hidden behaviors, one must quickly and accurately detect and diagnose the hidden behaviors that cause the failures. However, it is difficult to identify hidden behaviors in the dynamic and noisy data collected by OpenMP multi-threaded monitoring infrastructures. This paper presents an anthropomorphic diagnosis framework for hidden behaviors of OpenMP multi-threaded applications. In the framework, we first design injected heartbeat functions for OpenMP multi-threaded applications. Then, we leverage the heartbeat sequences to extract features of hidden behaviors. Finally, we develop a feature learning-based algorithm using heartbeat analysis, namely HSA, to diagnose hidden behaviors. To evaluate our framework, the NAS Parallel NPB benchmark, EPCC OpenMP micro-benchmark suite, and Jacobi benchmark are used to test the performance of our proposed framework. The experimental results demonstrate that our framework successfully identifies 90.3% of the injected hidden behaviors of OpenMP multi-threaded applications while acquiring low overhead.

Optimizing the performance of a server-based classification for a large business document flow

The document categorization problem in the case of a large business document flow is considered. Textual and visual embeddings were employed for classification. Textual embeddings were extracted via OCR Tesseract. The Viola and Jones method was applied to generate visual embeddings. This paper describes the performance optimization technology for the implemented classification algorithm. Servers with Intel CPUs were used for the algorithm execution. For single-threaded implementation, high-level and low-level optimizations were performed. High-level optimization was based on the parametrization of the recognition algorithms and the employment of intermediate data. Low-level optimization was carried out via compiler tools allowing for an extended set of SIMD instructions. The implementation of parallelization with several multithreaded applications on multiple servers was also described. The proposed solution was tested using own test data sets of business documents. The proposed method can be applied in modern information systems to analyze the content of a large flow of digital document images.

Approximate execution and grouping of critical sections for performance‐accuracy tradeoff

SummaryApproximate computing enhances the performance and energy efficiency of applications, while still achieving acceptable accuracy. Some of the multithreaded applications can tolerate the accuracy loss when critical sections are approximately executed, which in turn will eliminate the synchronization overhead of these applications and increase their performance. In this study, our objective is to explore the behavior of the critical sections and selectively skip the ones yielding performance improvements with an acceptable accuracy loss. We have observed the behavior of 62 critical sections of 4 selected applications. We have grouped them depending on their effects on program execution and skipped or approximated them accordingly. Our experimental study indicates that skipping 76% of the critical sections offers 2.5 performance gain with 16% accuracy loss for Raytrace whereas 1.4 performance improvement with 17% accuracy loss is obtained for Radiosity on average when 36% of the critical sections are skipped. For Water_NSquared the performance gain is 1.1 with 9% accuracy loss on average with 79% of critical sections skipped. For the Ocean_CP application we see a performance improvement of 1.6 with accuracy loss 1% when we skip 38% of critical sections.

Simulation modeling of an analog impulse neural network based on a memristor crossbar using parallel computing technologies

The work is devoted to the issues of simulation modeling of an analog impulse neural network based on memristive elements within the framework of the problem of pattern recognition. Simulation modeling allows you to configure the network at the level of a mathematical model, and subsequently use the obtained parameters directly in the process of operation. The network model is given as a dynamic system, which can consist of tens and hundreds of thousands of ordinary differential equations. Naturally, there is a need for an efficient and parallel implementation of an appropriate simulation model. OpenMP (Open Multi-Processing) is used as a technology for parallelizing calculations, since it allows you to easily create multi-threaded applications in various programming languages. The efficiency of parallelization is evaluated on the problem of modeling the process of learning the network to recognize a set of five images of size 128 by 128 pixels, which leads to the solution of about 80 thousand differential equations. On this problem, more than a sixfold acceleration of calculations was obtained.According to experimental data, the character of memristor operation is stochastic, as evidenced by the spread in the current-voltage characteristics during switching between high-resistance and low-resistance states. To take this feature into account, a memristor model with interval parameters is used, which gives upper and lower limits on the quantities of interest, and encloses the experimental curves in corridors. When modeling the operation of the entire analog self-learning impulse neural network, each epoch of training, the parameters of the memristors are set randomly from the selected intervals. This approach makes it possible to do without the use of a stochastic mathematical apparatus, thereby further reducing computational costs.

Symbiotic Organisms Search Optimization to Predict Optimal Thread Count for Multi-threaded Applications

Multicore systems have emerged as a cost-effective option for the growing demands for high-performance, low-energy computing. Thread management has long been a source of concern for developers, as overheads associated with it reduce the overall throughput of the multicore processor systems. One of the most complex problems with multicore processors is determining the optimal number of threads for the execution of multithreaded programs. To address this issue, this paper proposes a novel solution based on a modified symbiotic organism search (MSOS) algorithm which is a bio-inspired algorithm used for optimization in various engineering domains. This technique uses mutualism, commensalism and parasitism behaviours seen in organisms for searching the optimal solutions in the available search space. The algorithm is simulated on the NVIDIA DGX Intel-Xeon E5-2698-v4 server with PARSEC 3.0 benchmark suit. The results show that keeping the thread count equal to the number of processors available in the system is not necessarily the best strategy to get maximum speedup when running multithreaded programs. It was also observed that when programs are run with the optimal thread count, the execution time is substantially decreased, resulting in energy savings due to the use of fewer processors than are available in the system.

Comparison of Client-Server Solutions in the Development of Massively Multiplayer Online Games on Unity

This paper presents a critique of the traditional approach used to create a multiplayer game in the Unity real-time interactive application development system, especially in the case of a large number of concurrent users. As a hypothesis, an alternative option, which is not common, but which solves many of the problems of the previous approach, is proposed. Two client-server solutions have been compared for developing multiplayer online games in Unity, and the advantages of both approaches have been described for different cases. A game development architecture using a more up-to-date method is proposed: instead of the Mirror library, a standard toolkit for Unity development, microservices written in Golang are used. We present solid proofs of the preference of the alternative approach, the main advantage of which is the support of modern architecture providing high-speed communication between microservices, supported tests on messaging on different platforms.
 The test results confirm the hypothesis put forth, and we can conclude that the Unity bundle with Golang is more effective for multiplayer video games.
 The article also contains basic methods for debugging multi-threaded application in Golang bundled with Unity game development system and suggests a technological method that allows to get a fast way of data transfer between the client and the server.

Multi-Interval DomLock: Toward Improving Concurrency in Hierarchies

Locking has been a predominant technique depended upon for achieving thread synchronization and ensuring correctness in multi-threaded applications. It has been established that the concurrent applications working with hierarchical data witness significant benefits due to multi-granularity locking (MGL) techniques compared to either fine- or coarse-grained locking. The de facto MGL technique used in hierarchical databases is intention locks , which uses a traversal-based protocol for hierarchical locking. A recent MGL implementation, dominator-based locking (DomLock), exploits interval numbering to balance the locking cost and concurrency and outperforms intention locks for non-tree-structured hierarchies. We observe, however, that depending upon the hierarchy structure and the interval numbering, DomLock pessimistically declares subhierarchies to be locked when in reality they are not. This increases the waiting time of locks and, in turn, reduces concurrency. To address this issue, we present Multi-Interval DomLock (MID), a new technique to improve the degree of concurrency of interval-based hierarchical locking. By adding additional intervals for each node, MID helps in reducing the unnecessary lock rejections due to false-positive lock status of sub-hierarchies. Unleashing the hidden opportunities to exploit more concurrency allows the parallel threads to finish their operations quickly, leading to notable performance improvement. We also show that with sufficient number of intervals, MID can avoid all the lock rejections due to false-positive lock status of nodes. MID is general and can be applied to any arbitrary hierarchy of trees, Directed Acyclic Graphs (DAGs) , and cycles. It also works with dynamic hierarchies wherein the hierarchical structure undergoes updates. We illustrate the effectiveness of MID using STMBench7 and, with extensive experimental evaluation, show that it leads to significant throughput improvement (up to 141%, average 106%) over DomLock.

Improvement and comparison the performance of fuzzing testing algorithms for applications in Google Thread Sanitizer

It is difficult to imagine modern information systems without the use of multithreading. The use of multithreading can both improve the performance of the system as in whole so as slow down the execution of multithreaded applications due to the occurrence of multithreaded programming errors. To find such errors in C/C++ languages, there exists a Google Thread Sanitizer compiler module. The order of execution of threads can change every time the program is started for execution and can affect the appearance of such errors. To repeatedly change the order of execution of threads during the execution of the program, Google Thread Sanitizer has a fuzzing testing module that allows you to increase the probability of finding errors. But all the thread scheduling algorithms in this module are presented in the form of sequential execution of threads which can lead to a significant slowdown in Google Thread Sanitizer as well as can affect the testing of applications that depends on timers (waiting for network events, deadline for operations, ...). To speed up the work of fuzzing schedulers, a method for parallelizing independent transitions is proposed. From the point of view of multithreaded programming errors, it is only important to change the shared state between threads, and local calculations do not affect the reproduction of multithreaded errors. The changes of shared states themselves occur at synchronization points (places in the code where threads are switched according to the principle of cooperative multitasking). The method suggests ordering only the change of shared states at synchronization points, and performing local calculations in parallel, due to which parallelization is achieved. For the analysis of theoretical complexity of the algorithm, the method of combinatorial counting is used. A new approach to the organization of fuzzing testing based on the method of parallelization of independent transitions is proposed the implementation of which, according to theoretical and practical estimates, shows a noticeable acceleration of the work of fuzzing schedulers. According to the results of the experiment, it was revealed that for the algorithm of iterating through all execution variants, the acceleration of execution reaches 1.25 times for two threads. For an arbitrary number of threads, an estimate is presented in the form of a formula. The proposed approach allows fuzzing tests to cover multithreaded applications for which execution time is important — applications with reference to timers which improve the quality of the software.

BiRD: Race Detection in Software Binaries under Relaxed Memory Models

Instruction reordering and interleavings in program execution under relaxed memory semantics result in non-intuitive behaviors, making it difficult to provide assurances about program correctness. Studies have shown that up to 90% of the concurrency bugs reported by state-of-the-art static analyzers are false alarms. As a result, filtering false alarms and detecting real concurrency bugs is a challenging problem. Unsurprisingly, this problem has attracted the interest of the research community over the past few decades. Nonetheless, many of the existing techniques rely on analyzing source code, rarely consider the effects introduced by compilers, and assume a sequentially consistent memory model. In a practical setting, however, developers often do not have access to the source code, and even commodity architectures such as x86 and ARM are not sequentially consistent. In this work, we present B i rd , a prototype tool, to dynamically detect harmful data races in x86 binaries under relaxed memory models, TSO and PSO. B i rd employs source-DPOR to explore all distinct feasible interleavings for a multithreaded application. Our evaluation of B i rd on 42 publicly available benchmarks and its comparison with the state-of-the-art tools indicate B i rd ’s potential in effectively detecting data races in software binaries.

Feedback-based resource management for multi-threaded applications

Reconciling the constraint of guaranteeing to always meet deadlines with the optimization objective of reducing waste of computing capacity lies at the heart of a large body of research on real-time systems. Most approaches to doing so require the application designer to specify a deeper characterization of the workload (and perhaps extensive profiling of its run-time behavior), which then enables shaping the resource assignment to the application. In practice, such approaches are weak as they load the designer with the heavy duty of a detailed workload characterization. We seek approaches for reducing the waste of computing resources for recurrent real-time workloads in the absence of such additional characterization, by monitoring the minimal information that needs to be observable about the run-time behavior of a real-time system: its response time. We propose two resource control strategies to assign resources: one based on binary-exponential search and the other, on principles of control. Both approaches are compared against the clairvoyant scenario in which the average/typical behavior is known. Via an extensive simulation, we show that both techniques are useful approaches to reducing resource computation while meeting hard deadlines.

A Pressure-Aware Policy for Contention Minimization on Multicore Systems

Modern Chip Multiprocessors (CMPs) are integrating an increasing amount of cores to address the continually growing demand for high-application performance. The cores of a CMP share several components of the memory hierarchy, such as Last-Level Cache (LLC) and main memory. This allows for considerable gains in multithreaded applications while also helping to maintain architectural simplicity. However, sharing resources can also result in performance bottleneck due to contention among concurrently executing applications. In this work, we formulate a fine-grained application characterization methodology that leverages Performance Monitoring Counters (PMCs) and Cache Monitoring Technology (CMT) in Intel processors. We utilize this characterization methodology to develop two contention-aware scheduling policies, one static and one dynamic , that co-schedule applications based on their resource-interference profiles. Our approach focuses on minimizing contention on both the main-memory bandwidth and the LLC by monitoring the pressure that each application inflicts on these resources. We achieve performance benefits for diverse workloads, outperforming Linux and three state-of-the-art contention-aware schedulers in terms of system throughput and fairness for both single and multithreaded workloads. Compared with Linux, our policy achieves up to 16% greater throughput for single-threaded and up to 40% greater throughput for multithreaded applications. Additionally, the policies increase fairness by up to 65% for single-threaded and up to 130% for multithreaded ones.

Parallelised Multithreaded Applications on a 4-core Field Programmable Gate Array (FPGA) Architecture

Abstract:The challenges in real-time multithreading, particularly in the efficiency of multithreaded applications running concurrently on multiple cores, have evolved significantly due to the increase in IoT, cloud and edge computing applications. The continuous increase in cores depth adds further research issues related to the efficiency of such multicore systems and their applications. Therefore, further research is still required.Background:Multicore systems can achieve higher performance running in parallel multiple multithreaded applications. However, efficient parallelisation of multiple threads among many cores is not an easy task. Field Programmable Gate Arrays (FPGAs) is a preferred technology for the rapid design and experimentation with such architectures, based primarily on softcore processors.Objective:The purpose of this research is to investigate the efficiency of running in parallel and concurrently multithreaded applications on a 4-core FPGA multicore architecture.Methods:The design of a 4-core FPGA architecture is implemented with Nios II/f soft processors on a Cyclone IV series chip, having real-time Linux operating system (OS) support. A multithreaded application with specific compute-intensive tasks is developed in C, and is used to obtain measurements in specific efficiency metrics under different core configurations.Results:The reliability of the proposed 4-core FPGA architecture is validated against 4-core and 2- core development platforms, respectively, on Raspberry Pi4 and BeagleBone AI single board computers. The results have been analysed and evaluated upon performance metrics, including execution time, response time, speedup, and cores usage. The experimental tests demonstrate the validity and efficiency of the approach to using FPGA for experimentations with multithreaded applications.Conclusion:The obtained results show that the proposed FPGA architecture stands well both in terms of timing and efficiency metrics. Execution times are about 50% lower, and the average speedup at 21% is fairly close to that of 33% for the Raspberry Pi4, and higher than BeagleBone AI (10%). The proposed measurements approach and evaluation methodology could benefit the design and development of real-time systems utilizing operating systems with real-time support in emerging areas, such as embedded devices in real-time control.