Multiple Hardware Research Articles

Circuit Activity Fingerprinting Using Electromagnetic Side-Channel Sensing and Digital Circuit Simulations

This paper introduces a novel circuit identification method based on “fingerprints” of periodic circuit activity that does not rely on any circuit-specific reference measurements. We capture these “fingerprints”, consisting of fifty harmonics of the circuit activity, using digital circuit simulations and near-field measurements of the EM backscattering side-channel. Utilizing a novel technique and algorithm, we augment our measurements, removing sources of noise and other irregularities not present in the simulation, in order to relate an unknown circuit measurement with a known circuit simulation. A matching threshold of less than 1 dB difference between the simulated and measured fingerprints is set, and the matching performance is evaluated across multiple hardware instances exhibiting a strong resistance to false positives. Using various match statistics, decisions on the circuit identity can be made based on the simulated and measured fingerprint pair with the best matching performance. The results show that we can identify fingerprints of digital circuits with up to 95% accuracy using the proposed method.

SPEED: Separable Pyramidal Pooling EncodEr-Decoder for Real-Time Monocular Depth Estimation on Low-Resource Settings

The monocular depth estimation (MDE) is the task of estimating depth from a single frame. This information is an essential knowledge in many computer vision tasks such as scene understanding and visual odometry, which are key components in autonomous and robotic systems. Approaches based on the state of the art vision transformer architectures are extremely deep and complex not suitable for real-time inference operations on edge and autonomous systems equipped with low resources (i.e. robot indoor navigation and surveillance). This paper presents SPEED, a Separable Pyramidal pooling EncodEr-Decoder architecture designed to achieve real-time frequency performances on multiple hardware platforms. The proposed model is a fast-throughput deep architecture for MDE able to obtain depth estimations with high accuracy from low resolution images using minimum hardware resources (i.e. edge devices). Our encoder-decoder model exploits two depthwise separable pyramidal pooling layers, which allow to increase the inference frequency while reducing the overall computational complexity. The proposed method performs better than other fast-throughput architectures in terms of both accuracy and frame rates, achieving real-time performances over cloud CPU, TPU and the NVIDIA Jetson TX1 on two indoor benchmarks: the NYU Depth v2 and the DIML Kinect v2 datasets.

Low Complexity Joint Impairment Mitigation of I/Q Modulator and PA Using Neural Networks

neural networks (NNs) for multiple hardware impairments mitigation of a realistic direct conversion transmitter are impractical due to high computational complexity. We propose two methods to reduce the complexity without significant performance penalty. First, propose a novel NN with shortcut connections, referred to as shortcut real-valued time-delay neural network (SVDEN), where trainable neuron-wise shortcut connections are added between the input and output layers. Second, we implement a NN pruning algorithm that gradually removes connections corresponding to minimal weight magnitudes in each layer. Simulation and experimental results show that SVDEN with pruning achieves better performance for compensating frequency-dependent quadrature imbalance and power amplifier nonlinearity than other NN-based and Volterra-based models, while requiring less or similar complexity.

A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration

Computing platforms for next-generation cyber–physical systems are evolving towards heterogeneous architectures comprising different processing elements and hardware accelerators. In particular, SoC-FPGA platforms, including multiple general-purpose processing cores tightly coupled with an FPGA fabric, represent an attractive solution due to their flexibility, efficiency, and timing predictability. On these platforms, dedicated hardware accelerators implemented on the FPGA fabric can offload computationally intensive activities from general-purpose processing cores. Furthermore, dynamic partial reconfiguration allows virtualizing the FPGA resources by sharing them among multiple hardware accelerators over time.Although very promising, FPGA-based hardware acceleration also introduces new challenges, such as managing and scheduling multiple concurrent acceleration and reconfiguration requests. The FRED framework has been proposed to address these challenges while preserving the predictability required by real-time systems. FRED is based on a device model that matches the capabilities of contemporary SoC-FPGA platforms and comes with an ad-hoc scheduling infrastructure designed to guarantee bounded response times for DPR-enabled accelerated tasks. This paper presents Fred-Linux, the reference implementation of the FRED framework for GNU/Linux. Fred-Linux allows developing rich applications while leveraging predictable FPGA-based hardware acceleration for performing heavy computations. Fred-Linux has been developed using the Zynq-7000 and Zynq-UltraScale＋ by Xilinx as reference platforms, and it can be easily ported and extended on other platforms thanks to its modular design.

Use of Reduced Gravity Simulators for Plant Biological Studies.

Simulated microgravity and partial gravity research on Earth is a necessary complement to space research in real microgravity due to limitations of access to spaceflight. However, the use of ground-based facilities for reduced gravity simulation is far from simple. Microgravity simulation usually results in the need to consider secondary effects that appear in the generation of altered gravity. These secondary effects may interfere with gravity alteration in the changes observed in the biological processes under study. In addition to microgravity simulation, ground-based facilities are also capable of generating hypergravity or fractional gravity conditions whose effects on biological systems are worth being tested and compared with the results of microgravity exposure. Multiple technologies (2D clinorotation, random positioning machines, magnetic levitators, or centrifuges) and experimental hardware (different containers and substrates for seedlings or cell cultures) are available for these studies. Experimental requirements should be collectively and carefully considered in defining the optimal experimental design, taking into account that some environmental parameters, or life-support conditions, could be difficult to be provided in certain facilities. Using simulation facilities will allow us to anticipate, modify, or redefine the findings provided by the scarce available spaceflight opportunities.

Proposed Abelian ACM Method Optimizing

This proposed UFS ACM is the best preventive control around the world for heterogeneous applications on multiple hardware and software. The subject and object can be able to map, integrate, synchronize, and communicate through reading, writing, and executing over a UFS on the complex web infrastructure. We have to investigate the basic concepts behind access control design and enforcement and point out different security requirements that may need to be taken into consideration as per business, resources, and technology available to us. This paper has to formulate and implement several access control mechanisms, methods, and models on normalizing them step by step, which has been highlighted in the proposed model for present and future requirements. This research paper contributes to the development of an optimization model that aims to determine the optimal cost, time, and maximize the quality of services to be invested into security model and mechanisms deciding on the measure components of UFS.

Design and characterization of radiometer system for electron cyclotron measurements at Aditya-Upgrade tokamak

Instrumentation and characterization techniques have been developed for a 16-channel radiometer system to obtain localized electron cyclotron emission (ECE) measurements at Aditya-Upgrade tokamak. Inverse dependence of the EC radiation on the toroidal magnetic field constrains the hardware for measurements at a fixed radial location. This results in having costly and complex sweep systems or use of multiple receiver units dedicated to a specific toroidal magnetic field. A simple, cost effective solution to this issue could be using a fixed frequency wideband intermediate frequency (IF) receiver. This multiple channel hardware unit can do localized measurements at fixed as well as different magnetic fields thereby improving the measurement range. Designed system provides a spatial resolution of 1.2 cm and a temporal resolution of 10 μs.Noise figure of the system varies from 15–22 dB while the sensitivity is 0.1 × 106 V/W. The manuscript provides an insight over the characterization techniques followed for the design of the radiometer system. A brief overview of the calibration technique is discussed. First measurements obtained from the system are also presented.

On the development of flexible mobile multi-sensor units based on open-source hardware platforms and a reference framework

For some IoT applications, mobile entities are considered as the main source of sensed data, requiring the attachment of sensor modules on them. The endowing of sensing capabilities to such mobile entities can be performed in different ways, but the adoption of a reference hardware framework can bring a series of advantages, specially in dynamic complex scenarios. This article exploits the MSensorMob2 multi-sensor hardware framework for monitoring in areas with disconnection periods, comprising sensing, transmission and reconfiguration functions. Comprehensive analyses on multiple open-source hardware platforms are conducted, assessing their costs, deployment constraints and performance issues when implementing this development framework.

Python-Microscope - a new open-source Python library for the control of microscopes.

ABSTRACTCustom-built microscopes often require control of multiple hardware devices and precise hardware coordination. It is also desirable to have a solution that is scalable to complex systems and that is translatable between components from different manufacturers. Here we report Python-Microscope, a free and open-source Python library for high-performance control of arbitrarily complex and scalable custom microscope systems. Python-Microscope offers simple to use Python-based tools, abstracting differences between physical devices by providing a defined interface for different device types. Concrete implementations are provided for a range of specific hardware, and a framework exists for further expansion. Python-Microscope supports the distribution of devices over multiple computers while maintaining synchronisation via highly precise hardware triggers. We discuss the architectural features of Python-Microscope that overcome the performance problems often raised against Python and demonstrate the different use cases that drove its design: integration with user-facing projects, namely the Microscope-Cockpit project; control of complex microscopes at high speed while using the Python programming language; and use as a microscope simulation tool for software development.

Towards an Integrated Vehicle Management System in DriveOS

Modern automotive systems feature dozens of electronic control units (ECUs) for chassis, body and powertrain functions. These systems are costly and inflexible to upgrade, requiring ever increasing numbers of ECUs to support new features such as advanced driver assistance (ADAS), autonomous technologies, and infotainment. To counter these challenges, we propose DriveOS, a safe, secure, extensible, and timing-predictable system for modern vehicle management in a centralized platform. DriveOS is based on a separation kernel, where timing and safety-critical ECU functions are implemented in a real-time OS (RTOS) alongside non-critical software in Linux or Android. The system enforces the separation, or partitioning, of both software and hardware among different OSes. DriveOS runs on a relatively low-cost embedded PC-class platform, supporting multiple cores and hardware virtualization capabilities. Instrument cluster, in-vehicle infotainment and advanced driver assistance system services are implemented in a Yocto Linux guest, which communicates with critical real-time services via secure shared memory. The RTOS manages a real-time controller area network (CAN) interface that is inaccessible to Linux services except via well-defined and legitimate communication channels. In this work, we integrate three Qt-based services written for Yocto Linux, running in parallel with a real-time longitudinal controller task and multiple CAN bus concentrators, for vehicular sensor data processing and actuation. We demonstrate the benefits and performance of DriveOS with a hardware-in-the-loop CARLA simulation using a real car dataset.

SwingNet

Sports analytics in the wild (i.e., ubiquitously) is a thriving industry. Swing tracking is a key feature in sports analytics. Therefore, a centimeter-level tracking resolution solution is required. Recent research has explored deep neural networks for sensor fusion to produce consistent swing-tracking performance. This is achieved by combining the advantages of two sensor modalities (IMUs and depth sensors) for golf swing tracking. Here, the IMUs are not affected by occlusion and can support high sampling rates. Meanwhile, depth sensors produce significantly more accurate motion measurements than those produced by IMUs. Nevertheless, this method can be further improved in terms of accuracy and lacking information for different domains (e.g., subjects, sports, and devices). Unfortunately, designing a deep neural network with good performance is time consuming and labor intensive, which is challenging when a network model is deployed to be used in new settings. To this end, we propose a network based on Neural Architecture Search (NAS), called SwingNet, which is a regression-based automatic generated deep neural network via stochastic neural network search. The proposed network aims to learn the swing tracking feature for better prediction automatically. Furthermore, SwingNet features a domain discriminator by using unsupervised learning and adversarial learning to ensure that it can be adaptive to unobserved domains. We implemented SwingNet prototypes with a smart wristband (IMU) and smartphone (depth sensor), which are ubiquitously available. They enable accurate sports analytics (e.g., coaching, tracking, analysis and assessment) in the wild. Our comprehensive experiment shows that SwingNet achieves less than 10 cm errors of swing tracking with a subject-independent model covering multiple sports (e.g., golf and tennis) and depth sensor hardware, which outperforms state-of-the-art approaches.

Automated CNN back-propagation pipeline generation for FPGA online training

Training of convolutional neural networks (CNNs) on embedded platforms to support on-device learning has become essential for the future deployment of CNNs on autonomous systems. In this work, we present an automated CNN training pipeline compilation tool for Xilinx FPGAs. We automatically generate multiple hardware designs from high-level CNN descriptions using a multi-objective optimization algorithm that explores the design space by exploiting CNN parallelism. These designs that trade-off resources for throughput allow users to tailor implementations to their hardware and applications. The training pipeline is generated based on the backpropagation (BP) equations of convolution which highlight an overlap in computation. We translate the overlap into hardware by reusing most of the forward pass (FP) pipeline reducing the resources overhead. The implementation uses a streaming interface that lends itself well to data streams and live feeds instead of static data reads from memory. Meaning, we do not use the standard array of processing elements (PEs) approach, which is efficient for offline inference, instead we translate the architecture into a pipeline where data is streamed through allowing for new samples to be read as they become available. We validate the results using the Zynq-7100 on three datasets and varying size architectures against CPU and GPU implementations. GPUs consistently outperform FPGAs in training times in batch processing scenarios, but in data stream scenarios, FPGA designs achieve a significant speedup compared to GPU and CPU when enough resources are dedicated to the learning task. A 2.8×, 5.8×, and 3× speed up over GPU was achieved on three architectures trained on MNIST, SVHN, and CIFAR-10 respectively.

Benchmarking geospatial database on Kubernetes cluster

Kubernetes is an open-source container orchestration system for automating container application operations and has been considered to deploy various kinds of container workloads. Traditional geo-databases face frequent scalability issues while dealing with dense and complex spatial data. Despite plenty of research work in the comparison of relational and NoSQL databases in handling geospatial data, there is a shortage of existing knowledge about the performance of geo-database in a clustered environment like Kubernetes. This paper presents benchmarking of PostgreSQL/PostGIS geospatial databases operating on a clustered environment against non-clustered environments. The benchmarking process considers the average execution times of geospatial structured query language (SQL) queries on multiple hardware configurations to compare the environments based on handling computationally expensive queries involving SQL operations and PostGIS functions. The geospatial queries operate on data imported from OpenStreetMap into PostgreSQL/PostGIS. The clustered environment powered by Kubernetes demonstrated promising improvements in the average execution times of computationally expensive geospatial SQL queries on all considered hardware configurations compared to their average execution times in non-clustered environments.

Artificial Intelligence and Data Fusion at the Edge

Artificial intelligence (AI), owing to recent breakthroughs in deep learning, has revolutionized applications and services in almost all technology domains including aerospace. AI and deep learning rely on huge amounts of training data that are mostly generated at the network edge by Internet of Things (IoT) devices and sensors. Bringing the sensed data from the edge of a distributed network to a centralized cloud is often infeasible because of the massive data volume, limited network bandwidth, and real-time application constraints. Consequently, there is a desire to push AI frontiers to the network edge toward utilizing the enormous amount of data generated by IoT devices near the data source. The merger of edge computing and AI has engendered a new discipline, that is, AI at the edge or edge intelligence. To help AI make sense of gigantic data at the network edge, data fusion is of paramount significance and goes hand in hand with AI. This article focuses on data fusion and AI at the edge. In this article, we propose a framework for data fusion and AI processing at the edge. We then provide a comparative discussion of different data fusion and AI models and architectures. We discuss multiple levels of fusion and different types of AI, and how different types of AI align with different levels of fusion. We then highlight the benefits of combining data fusion with AI at the edge. The methods of AI and data fusion at the edge detailed in this article are applicable to many application domains including aerospace systems. We evaluate the effectiveness of combined data fusion and AI at the edge using convolutional neural network models and multiple hardware platforms suitable for edge computing. Experimental results reveal that combining AI with data fusion can impart a speedup of 9.8× while reducing energy consumption up to 88.5% over AI without data fusion. Furthermore, results demonstrate that data fusion either maintains or improves the accuracy of AI in most cases. For our experiments, data fusion imparts a maximum improvement of 15.8% in accuracy to AI.

GSM Based Automatic Irrigation System

Agriculture plays a significant part in India's food production development. Agriculture in our nation is reliant on the monsoons, which provide little water. As a result, irrigation is utilised in agriculture. Water is given to plants in an irrigation system based on the soil type. An automated irrigation system based on ARMs and a GSM module is presented in this article. The proposed system is a machine-based system that automates land irrigation by integrating multiple software and hardware techniques to locate precise field information and offer instantaneous watering across the area. Sensors, an LCD display, GSM, and an ARM7LPC2148 CPU are all included. The LCD will be used for field display. A Subscriber Identity Module (SIM) will be included in the GSM module, and users will be able to interact using this SIM number. When the user activates or gives a command, the appropriate sensor activates and reads the current reading, sending the data to the same user's mobile phone and displaying them on the field's LCD panel. If necessary, the user will immediately take the appropriate action. We're utilising sensors to keep track of the field's condition. Temperature and level sensors are what those are. The ARM CPU is linked to all of these devices. GSM is utilised for communication, and we may communicate with the components via AT (attention) commands. We use motors for level sensing applications.

Guest Editors’ Introduction: Special Issue on Latest Developments for Security Management of Networks and Services

As the backbone of communications amongst objects, humans, companies, and administrations, the Internet has become a great integration platform capable of efficiently interconnecting billions of entities, from RFID chips to data centers. This platform provides access to multiple hardware and virtualized resources (servers, networking, storage, applications, connected objects) coming from cloud computing and Internet-of-Things (IoT) infrastructures. From these resources that may be hosted and distributed amongst different providers and tenants, the building and operation of complex and value-added networked systems is enabled.

Piloting an adaptive skills virtual reality intervention for adults with autism: findings from user-centered formative design and evaluation

Purpose The purpose of this paper is to present evaluation findings from a proof-of-concept virtual reality adaptive skills intervention called Virtuoso, designed for adults with autism spectrum disorders. Design/methodology/approach A user-centric usage test was conducted to investigate the acceptability, feasibility, ease-of-use and relevance of Virtuoso to the unique needs of participants, as well as the nature of participants’ user experiences. Findings are presented from the perspectives of expert testers and participant testers with autism. Findings This paper offers findings that suggest Virtuoso is feasible and relevant to the unique needs of the target population, and that user experience was largely positive. Anecdotal evidence of skills transfer is also discussed. Research limitations/implications The research was conducted in limited settings and with a small number of participants. Multiple VR hardware systems were used, and some experienced instability. This could be accounted for in future research by deploying across multiple settings and with a larger number of participants. Some evidence of cybersickness was observed. Future research must carefully consider the trade-offs between VR-based training and cybersickness for this vulnerable population. Originality/value This paper reports on cutting-edge design and development in areas that are under-represented and poorly understood in the literature on virtual reality for individuals with autism.

Design principles for music technology education support: Just-in-time learning in the recording studio using mobile technologies

Popular music education involves engaging students with using a range of music technologies found in recording studios, through utilization of multiple hardware and software devices to enable the recording process. Student users can struggle to keep up with the volume of knowledge required to operate these environments to their full potential. Providing just-in-time learning resources to support these students could improve student learning through augmenting gaps in their knowledge. Just-in-time learning is the provision of active learning opportunities that engage learners with skill development as part of the working process. This approach to supporting music technology education was trialled within a programme teaching popular music. The research found that students welcomed the provision of just-in-time learning opportunities delivered through a mobile phone application and that this suited their learning approach in the recording studio. This article suggests that mobile learning resources can benefit the curriculum of programmes working with music technology. The study was conducted using a design-based research methodology with students within a conservatorium teaching popular music. This popular music programme heavily utilized the recording studio as a learning and teaching tool, requiring students to engage with music technology routinely. Thirty students from all year levels of the undergraduate programme participated in the research project through surveys and focus groups. The research involved iterative cycles of mobile application design and testing over an eighteen-month period. Previously, a pilot study identified that students felt that on-demand learning opportunities delivered through mobile devices would be beneficial to their learning. The research from the design and testing of the mobile application evolved a series of design principles, which could be used as a guide for developing just-in-time resources to support music technology education.

Cross-Layer Approximate Hardware Synthesis for Runtime Configurable Accuracy

Approximate computing trades off computation accuracy against energy efficiency. The extent of approximation tolerance, however, significantly varies with a change in input characteristics and applications. We propose a novel cross-layer approach for the synthesis of runtime accuracy-configurable hardware that minimizes energy consumption at area expense. To that end, first, we explore instantiating multiple hardware blocks in the architecture with different fixed approximation levels. These blocks can be selected dynamically and thus allow to configure the accuracy during runtime. They benefit from having fewer transistors and also synthesis relaxations in contrast to state-of-the-art gating mechanisms that only switch off a group of paths of the circuit. Our cross-layer approach combines instantiating such blocks in the architecture with area-efficient gating mechanisms that reduce toggling activity, creating a fine-grained design-time knob on energy versus area. We present a systematic methodology to explore this joint design space and find energy-area optimal solutions as a function of required accuracies, their utilization in the workload, together with hardware parameters: dynamic power savings, area of the hardware block, and leakage of the technology. Examining total energy savings for a range of circuits under different workloads and accuracy tolerances shows that our method finds Pareto-optimal solutions providing up to 32% and 60% energy savings compared to state-of-the-art accuracy-configurable gating mechanism and an exact hardware block, respectively, at 2× area cost.

Архитектура программного обеспечения для задач взаимодействия контроллера вывода на экран и операционной системы

Article describes solutions for developing programs that provide interaction between Linux operating system and multiple display controller hardware blocks (outputs), that use one clock generation IP-block with phase-locked loop (PLL). There is no API for such devices in Linux, thus new software model was developed. This model is based on official Linux GPU developer driver model, but was modified to cover case described earlier. Article describes three models for display controller driver development – monolithic, component and semi-monolithic. These models cannot cover case described earlier, because they assume that one clock generator should be attached to one output. A new model was developed, that is based on component model, but has additional mechanics to prevent race condition that can happen while using one clock generator with multiple outputs. Article also presents modified model for bootloaders graphics drivers. This model has been simplified over developed Linux model, but also has component nature (with less components) and race prevention mechanics (but with weaker conditions). Hardware interaction driver components that are developed using provided software models are interchangeable between Linux and bootloader.