Multi-frequency Capacitance-voltage Research Articles

Reduction of interface defects in gate-recessed GaN HEMTs by neutral beam etching

This study investigates and compares the impact of different etching techniques on the fabrication of GaN high electron mobility transistors (HEMTs) between the inductively coupled plasma reactive ion etching (ICP-RIE) and the neutral beam etching (NBE) for the gate recess. By conducting direct current analysis, it was found that devices manufactured using the NBE exhibited superior electrical performance as compared with those produced using the ICP-RIE. These enhanced electrical characteristics include a transconductance of up to 100.4 mS/mm, a threshold voltage (Vth) of −2.3 V, an on/off current ratio of 1.1 × 109, a subthreshold swing (S.S.) of 99.63 mV/dec, and a remarkably low gate leakage current. Additionally, we noted varying degrees of hysteresis in the I–V characteristics were related to process disparities possibly leading to interface defects. Multi-frequency capacitance-voltage (C–V) measurements were used to identify the interface defects at the oxide/AlGaN interface of the gate. The results revealed that devices fabricated using the NBE exhibited a lower interface defect density as compared with those fabricated using the ICP-RIE, thereby elucidating the reduced hysteresis observed in the I–V characteristics. These findings indicated the significant advantages of the NBE process in the fabrication of GaN HEMTs.

Investigation and Modeling of Multifrequency CV characteristics for 10-nm Bulk FinFETs at Cryogenic Temperatures

In this work, multifrequency capacitance–voltage characteristics have been investigated from 300K to 10K for high-k HfO2-based 10-nm bulk n-channel FinFETs. The dispersion observed in the accumulation region for the multifrequency capacitance characteristics with respect to temperature is explored taking into consideration the temperature dependence of border traps, series resistance, tunneling current, and the substrate time constant. It was found that the temperature-dependent dispersion arises due to the increase in the substrate time constant with temperature reduction. Multifrequency conductance measurements were performed from 300K to 10K to experimentally investigate the variation of substrate time constant with temperature. Furthermore, the temperature dependence of the accumulation region surface potential quotient is also explored in order to examine the direct tunneling current. Finally, modifications to existing accumulation region BSIM-CMG 110.0.0 compact model equations are proposed to include the low-temperature dispersion effects.

Characterization of AlXGa1−XN/GaN High Electron Mobility Transistor Structures with Mercury Probe Capacitance–Voltage and Current–Voltage

Characterization of high electron mobility transistor (HEMT) structures is important for predicting device behavior, monitoring and developing processes, and improving performance. Multifrequency capacitance–voltage (CV) and direct current–voltage (IV) methods are applied with a mercury probe to assess the HEMT with and without capping layers to monitor critical parameters such as pinch‐off voltage, two‐dimensional electron gas (2DEG) sheet charge, GaN carrier density profile, AlGaN thickness, and dielectric constant and properties of the top capping layer.

Suppression of current dispersion in AlGaN/GaN MISHFETs with in-situ AlN passivation layer

We demonstrate effective reduction of interface states and current collapse in AlGaN/GaN metal insulator semiconductor heterostructure field effect transistor (MISHFETs) with Al2O3 and in-situ AlN passivation layer. Here, first, a 3 nm-thick in-situ AlN layer is grown on AlGaN/GaN structure by using MOCVD at 1070 °C, and second a 7 nm-thick atomic layer deposition (ALD) Al2O3 layer is immediately deposited on the AlN layer. The X-ray photoelectron spectroscopy (XPS) analyses for the Ga 3d core level and multi-frequency capacitance–voltage (C–V) measurement show that the density of interface states originated from the Ga-O bonds, which is dramatically reduced with the in-situ AlN passivation layer. The AlGaN/GaN-based MISHFET with the Al2O3/in-situ AlN layers exhibits the low gate-lag effect (8%), remarkably less than that of the device with the typical GaN capping layer (21.5%). These results indicate that the Al2O3/in-situ AlN double passivation layer is very effective in suppressing the current collapse, and hence, it is found to be the promising method for the fabrication of AlGaN/GaN MISHFETs with enhanced performance.

Characterization of Electrical Traps Formed in Al2O3 under Various ALD Conditions.

Frequency dispersion in the accumulation region seen in multifrequency capacitance–voltage characterization, which is believed to be caused mainly by border traps, is a concerning issue in present-day devices. Because these traps are a fundamental property of oxides, their formation is expected to be affected to some extent by the parameters of oxide growth caused by atomic layer deposition (ALD). In this study, the effects of variation in two ALD conditions, deposition temperature and purge time, on the formation of near-interfacial oxide traps in the Al2O3 dielectric are examined. In addition to the evaluation of these border traps, the most commonly examined electrical traps—i.e., interface traps—are also investigated along with the hysteresis, permittivity, reliability, and leakage current. The results reveal that a higher deposition temperature helps to minimize the formation of border traps and suppress leakage current but adversely affects the oxide/semiconductor interface and the permittivity of the deposited film. In contrast, a longer purge time provides a high-quality atomic-layer-deposited film which has fewer electrical traps and reasonable values of permittivity and breakdown voltage. These findings indicate that a moderate ALD temperature along with a sufficiently long purge time will provide an oxide film with fewer electrical traps, a reasonable permittivity, and a low leakage current.

Surface Preconditioning and Postmetallization Anneal Improving Interface Properties and Vth Stability under Positive Gate Bias Stress in AlGaN/GaN MIS‐HEMTs

Trap states at the dielectric/GaN interface of AlGaN/GaN‐based metal–insulator–semiconductor high electron mobility transistors (MIS‐HEMTs) can cause threshold voltage (Vth) instability especially under positive gate bias stress. Herein, the influence of O2 plasma surface preconditioning (SPC) before the atomic layer deposition of the Al2O3 gate dielectric and of N2 postmetallization anneal (PMA) after gate metallization on the Al2O3/GaN interface quality is investigated. The interface is characterized by multifrequency capacitance–voltage measurements which show a smaller frequency dispersion after the employment of SPC and PMA treatments with a reduction of the interface trap density Dit to a value in the order of 2 × 1012 cm−2 eV−1 near the conduction band edge. The effectiveness of SPC and PMA is demonstrated in Al2O3/AlGaN/GaN MIS‐HEMTs by pulsed current–voltage measurements which reveal improved Vth stability.

Unique Constant Phase Element Behavior of the Electrolyte-Graphene Interface.

We report a unique constant phase element (CPE) behavior () of the electrolyte–graphene interface with both and showing dependence on the gate voltage. The frequency response of the electrolyte–graphene interface was studied using electrochemical impedance spectroscopy (EIS). The result suggests that (1) the electrolyte–graphene interface should be characterized as a CPE ( < 1), rather than an ideal capacitor; and (2) both and show ambipolar dependence on the applied voltage. We speculate that the CPE behavior of the electrolyte–graphene interface arises from the charged impurities on the substrate and the defects in the graphene lattice, which could introduce inhomogeneity of local density of states (DOS). The low density of states of graphene makes sensitive to these local DOS near the Dirac point, and thus showing dependence on the gate voltage. Measurement of the electrolyte–graphene interface capacitance based on multi-frequency capacitance-voltage (CV) profiling was demonstrated, and the extraction of the carrier mobility was performed. The study could lead to a more accurate understanding of the capacitive behavior of the electrolyte–graphene interface, which is instructive for the design and analysis of devices involving the electrolyte–graphene interface for nanoelectronics and bioelectronics applications.

(Invited) Liquid Electrolyte Contacts to Semiconductor Nanostructures: Probing and Programming Local Defect Behavior

Replacing the metal top electrode of a metal-insulator-semiconductor (MIS) or –metal (MIM) junction with a liquid electrolyte contact can be used 1) to study the capacitance and conductance response of semiconductor nanostructures with a conformal liquid contact, and 2) to program, at higher voltages, populations of point defects in an insulator layer, as a means of investigating local resistance switching. This presentation will summarize recent results on both of these topics, beginning with a discussion of electrochemical spectroscopy (EIS) applied to semiconductor-liquid junctions as a means of performing quantitative interface state characterization on micro- and nano-structured samples. Using aqueous KCl solution as a blocking contact to a semiconductor electrode, electrochemical impedance spectroscopy measures the multifrequency capacitance-voltage and conductance-voltage characteristics of planar p-Si (100), planar p-Si0.55Ge0.45 (100), and p-Si crystals with surfaces that are textured to create nanoscale features.1 These substrates are coated with thin atomic layer deposited Al2O3 dielectrics. Analysis of impedance data obtained from the planar samples produces results that are in good agreement with solid-state multi-frequency C-V and g-V data from the same sample, including similar extracted values for density of interface states. Impedance data and the extracted interface trap properties of ALD-Al2O3 passivated silicon microwire arrays for application in solar cells will also be described. Liquid electrolyte contacts have also been used to study resistance switching and its relation to local oxygen deficiency in an initially insulating metal oxide layer.2 Local variations in electrical conductivity in amorphous TiO2 films prepared by atomic layer deposition (ALD) are examined using conductive atomic force microscopy. The local TiO2 conductivity is correlated with changes in oxygen stoichiometry revealed by electron energy loss spectroscopy performed in the electron microscope and by oxygen isotope tracer exchange. Both highly resistive ionic liquids and highly conductive electrolyte solutions are used as liquid top contacts to the TiO2 layers. In this way, the effects of field-driven migration of oxygen ions in and out of the TiO2 film can be distinguished from local accumulation of oxygen vacancies via Joule heating at high programming currents. We find that gating using a resistive ionic liquid contact at room temperature and positive gate bias produces an oxygen deficient ALD-TiO2 film with enhanced electronic conductivity, demonstrating the ease with which field-driven oxygen vacancy formation occurs at low temperature in these thin amorphous layers. However, conductive filaments were formed only when the TiO2 is programmed using a lower-resistivity electrolyte top contact. This indicates the decisive importance of programming current in localization of the point defects required for filamentary conduction. C. Meng, K. Tang, M. Braun, L. Zhang, and P.C. McIntyre, “Electrochemical Impedance Spectroscopy for Quantitative Interface State Characterization of Planar and Nanostructured Semiconductor-Dielectric Interfaces,” Nanotechnol. 28, 415704 (2017). Tang, A.C. Meng, F. Hui, Y. Shi, T. Petach, C. Hitzman, A.L. Koh, D. Goldhaber-Gordon, M. Lanza, and P.C. McIntyre, “Distinguishing Oxygen Vacancy Electromigration and Conductive Filament Formation in TiO2 Resistance Switching Using Liquid Electrolyte Contacts,” Nano Lett. 17, 4390–99 (2017).

Probing Interface Defects in Top-Gated MoS2 Transistors with Impedance Spectroscopy.

The electronic properties of the HfO2/MoS2 interface were investigated using multifrequency capacitance-voltage (C-V) and current-voltage characterization of top-gated MoS2 metal-oxide-semiconductor field effect transistors (MOSFETs). The analysis was performed on few layer (5-10) MoS2 MOSFETs fabricated using photolithographic patterning with 13 and 8 nm HfO2 gate oxide layers formed by atomic layer deposition after in-situ UV-O3 surface functionalization. The impedance response of the HfO2/MoS2 gate stack indicates the existence of specific defects at the interface, which exhibited either a frequency-dependent distortion similar to conventional Si MOSFETs with unpassivated silicon dangling bonds or a frequency dispersion over the entire voltage range corresponding to depletion of the HfO2/MoS2 surface, consistent with interface traps distributed over a range of energy levels. The interface defects density (Dit) was extracted from the C-V responses by the high-low frequency and the multiple-frequency extraction methods, where a Dit peak value of 1.2 × 1013 cm-2 eV-1 was extracted for a device (7-layer MoS2 and 13 nm HfO2) exhibiting a behavior approximating to a single trap response. The MoS2 MOSFET with 4-layer MoS2 and 8 nm HfO2 gave Dit values ranging from 2 × 1011 to 2 × 1013 cm-2 eV-1 across the energy range corresponding to depletion near the HfO2/MoS2 interface. The gate current was below 10-7 A/cm2 across the full bias sweep for both samples indicating continuous HfO2 films resulting from the combined UV ozone and HfO2 deposition process. The results demonstrated that impedance spectroscopy applied to relatively simple top-gated transistor test structures provides an approach to investigate electrically active defects at the HfO2/MoS2 interface and should be applicable to alternative TMD materials, surface treatments, and gate oxides as an interface defect metrology tool in the development of TMD-based MOSFETs.

Extraction of the sub-band gap density of states of Nb doped ZnO thin film transistors using C-V measurements

The sub-band gap density of states (DOS) of Nb doped ZnO thin film transistors were extracted using a multi-frequency capacitance-voltage (C-V) method. The results can be represented by a two-term exponential DOS, representing the tail and deep states. The parameters for the tail and deep states are Ntail=1.6×1019cm−3, Ttail=540K, Ndeep=6.5×1016cm−3 and Tdeep=4058K respectively. Furthermore, the DOS from C-V provides a good fit with current-voltage characteristics, using the multiple trap and release model.

Extraction of density of localized states in indium zinc oxide thin film transistor

Density of localized states (DOS) over the band-gap determines the electrical and instability characteristics in the indium zinc oxide thin film transistor (IZO TFT). In order to propose an accurate extraction method for DOS in the bulk region, low frequency noise and multi-frequency capacitance voltage characteristics are measured and analyzed in this paper. Firstly, the relationship between surface potential and gate voltage is extracted based on subthreshold I-V characteristics. The extraction results show that the surface potential increases with the increase of gate voltage in the sub-threshold region. When the Fermi level is close to the bottom of conduction band, the increase of surface potential should be saturated. Secondly, drain current noise power spectral densities in the IZO TFTs under different operation modes are measured. Based on carrier number fluctuation mechanism, the flat-band voltage noise power spectral density is extracted and localized state near IZO/SiO2 interface is then calculated. By considering the emission and trapping processes of carriers between localized states, the distribution of bulk trap density in the band-gap is extracted based on low frequency noise measurement results. The experimental results show an exponential tail state distribution in the band-gap while NTA is about 3.421020 cm-3eV-1 and TTA is about 135 K. Subsequently, contact resistances are then extracted by combining capacitance-voltage characteristics with I-V characteristics in the linear region. The extrinsic parasitic resistances at gate, source, drain are separated. By considering charges trapped in the localized states and free carriers, the distributions of deep states and tail states in the active layer of IZO TFT are extracted through multi-frequency capacitance-voltage characteristics. The experimental results also show an exponential deep state and tail state distribution in the band-gap while NDA is about 5.41015 cm-3eV-1, TDA is about 711 K, NTA is about 1.991020 cm-3eV-1, and TTA is about 183 K. The above two proposed extraction methods are compared and analyzed. The deviation between two extraction results may relate to the existence of neutral trap in the gate dielectric which is also an important source of low frequency noise in the IZO TFT.

Effect of forming gas annealing on the inversion response and minority carrier generation lifetime of n and p-In0.53Ga0.47As MOS capacitors

In0.53Ga0.47As MOS capacitors with a range of Al2O3 oxide thickness values were examined using multi-frequency capacitance–voltage and conductance–voltage characterization for n and p-type In0.53Ga0.47As epitaxial layers. The samples exhibited a minority carrier response consistent with surface inversion for both n and p-type In0.53Ga0.47As MOS structures. An equality between the peak magnitude of the frequency scaled conductance, G/ω, and the derivative of capacitance with frequency, −ωdC/dω in strong inversion allows estimation of accurate Cox values for the varying thickness MOS devices. Minority carrier generation lifetimes, τg, were extracted from the experimentally measured transition frequencies, ωm, through physics based a.c. simulations. It was observed that τg was reduced following a post-metallization 275°C forming gas anneal treatment over both n and p-In0.53Ga0.47As. This is indicative of an improvement in the In0.53Ga0.47As quality by means of hydrogen passivation of the mid-gap bulk defects responsible for the observed minority carrier response.

Oxygen flow effects on electrical properties, stability, and density of states of amorphous In–Ga–Zn–O thin-film transistors

To investigate the origin of threshold voltage (Vth) shift of amorphous In–Ga–Zn–O (a-IGZO) thin-film transistors (TFTs), a combination of bias-temperature stress (BTS) and multi-frequency capacitance–voltage (C–V) measurements were used to evaluate the impact of oxygen partial pressure (PO2) during a-IGZO deposition on TFT electrical properties, electrical stability, and density of states (DOS). The extracted sub-gap DOS was decomposed into exponential bandtail states and Gaussian-like deep-gap states. The peak density of Gaussian-like states is larger for higher PO2. We conclude that the Gaussian-like states are excess/weakly-bonded oxygen in the form of O0 or O1− ions acting as acceptor-like states and are at the origin of TFT threshold voltage shift during positive BTS.

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{InGaAs}$ MOS System

In this paper, we present a review of experimental results examining charged defect components in the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As metal-oxide-semiconductor (MOS) system. For the analysis of fixed oxide charge and interface state density, an approach is described where the flatband voltage for n- and p-type Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As MOS structures is used to separate and quantify the contributions of fixed oxide charge and interface state density. Based on an Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> thickness series (10-20 nm) for the n- and p-type In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As layers, the analysis reveals a positive fixed charge density ( ~ 9 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> ) distributed throughout the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> and a negative sheet charge density (- 8 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> ) located near the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As interface. The interface state density integrated across the energy gap is ~1 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> and is a donor-type (+/0) defect. The density of the fixed oxide charge components is significantly reduced by forming gas (5 % H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> / 95% N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ambient at 350 °C for 30 minutes) annealing. The interface state distribution obtained from multi-frequency capacitance-voltage and conductance-voltage measurements on either MOS structures or MOSFETs indicates a peak density located around the In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As midgap energy, with a sharp increase in the interface state density toward the valance band and evidence of interface states aligned with the In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As conduction band. The integrated interface state density obtained from multi-frequency capacitance-voltage and conductance-voltage analysis is in good agreement with the approach of comparing the flatband voltages in n- and p -type Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As MOS structures. Finally, this paper reviews recent work based on an optimization of the In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As surface preparation using (NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> ) <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> S, combined with minimizing the transfer time to the atomic layer deposition reactor for Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , which indicates interface state reduction and genuine surface inversion for both n- and p -type Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As MOS structures.

Electrical Characteristics of ${\rm Al}_{2}{\rm O}_{3}/{\rm InSb}$ MOSCAPs and the Effect of Postdeposition Annealing Temperatures

The characteristics of Al2O3/InSb MOSCAPs processed with different postdeposition annealing (PDA) temperatures are investigated. X-ray photoelectron spectroscopy analysis shows a significant reduction of InSb-oxides after HCl plus trimethyl aluminum treatment and oxide deposition. Multifrequency capacitance-voltage (C-V) characteristics exhibit low-frequency and asymmetrical C-V behaviors, in which capacitance in the InSb conduction band side is lower than in the valence band side. The electrical properties of the MOSCAPs are sensitive to PDA temperature and degraded significantly at PDA temperature >300 °C. This degradation is closely related to the diffusion of In, Sb into Al2O3 as indicated by transmission electron microscopy analyses.

Trimethylaluminum-based Atomic Layer Deposition of MO2 (M=Zr, Hf): Gate Dielectrics on In0.53Ga0.47As(001) Substrates

As post-Si era for digital device is incipient, In0.53Ga0.47As is good candidate among n-type active channels with high electron mobility but - unlike Si - it lacks a well-established technology for dielectric gating which may bear aggressive device scaling. Here we propose a viable route for the atomic layer deposition (ALD) of high-κ dielectrics taking advantage from the well-known self-cleaning effect of the trimethylaluminum (TMA) precursor on the III-V compound surfaces. In this respect, the incorporation of Al2O3 cycles both as pre-conditioning surface treatment and inside the ALD growth of a MO2 host matrix (M=Zr, Hf) is here investigated. Al:MO2/In0.53Ga0.47As heterojunctions have been scrutinized by in situ spectroscopic ellipsometry and ex situ chemical depth-profiling analysis which validate a good physical quality of the oxide and elucidate the effect of the pre-conditioning cycles at the interface level. The resulting MOS capacitors have been characterized by means of multifrequency capacitance-voltage measurements and conductance analysis therein yielding a permittivity of 19{plus minus}1 both for Al:HfO2 and Al:ZrO2 and similar electrical quality of the interfaces. On the other hand, Al:HfO2 appears to be electrically more robust against leakage and endowed with a lower frequency dispersion in accumulation.

Interface-State Modeling of $\hbox{Al}_{2}\hbox{O}_{3}$ –InGaAs MOS From Depletion to Inversion

This paper presents a detailed analysis of the multifrequency capacitance–voltage and conductance–voltage data of $\hbox{Al}_{2}\hbox{O}_{3}/\hbox{n-InGaAs}$ MOS capacitors. It is shown that the widely varied frequency dependence of the data from depletion to inversion can be fitted to various regional equivalent circuits derived from the full interface-state model. In certain regions, incorporating bulk-oxide traps in the interface-state model enables better fitting of data. By calibrating the model with experimental data, the interface-state density and the trap time constants are extracted as functions of energy in the bandgap, from which the stretch-out of gate voltage is determined. It is concluded that the commonly observed decrease of the 1-kHz capacitance toward stronger inversion is due to the increasing time constant for traps to capture majority carriers at the inverted surface.

Extraction of the Channel Mobility in InGaZnO TFTs Using Multifrequency Capacitance–Voltage Method

In this letter, we propose a mobility-extraction method using the frequency-independent capacitances extracted from the multifrequency capacitance-voltage method in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). This method does not use the long-channel metal-oxide-semiconductor field-effect transistor (MOSFET) current-voltage ( I-V) model and can include the effect of subgap states on the calculation of the mobility. Considering that the I-V characteristics of the disordered semiconductor transistor do not exactly follow those of the long-channel MOSFET model and the subgap states significantly affect the electrical behavior of the disordered semiconductor transistors, the proposed method is expected to be useful in the extraction of the exact values of the mobilities in disordered semiconductor transistors including a-IGZO TFTs.

Al2O3/GeO2 stacked gate dielectrics formed by post-deposition oxidation of ultrathin metal Al layer directly grown on Ge substrates

A simple and effective method for fabricating high-quality Al2O3/GeO2 gate dielectrics is proposed. Direct deposition of ultrathin Al layers several angstroms thick on cleaned Ge surfaces followed by conventional dry oxidation was shown to form Al2O3/GeO2 stacked structures. Precise control of interface GeO2 growth was achieved due to low oxygen diffusivity in the Al2O3 layer. Experimental results demonstrated that, in addition to post-oxidation conditions, Al thickness is a crucial parameter for creating high-quality Ge-MOS interfaces and equivalent oxide thickness (EOT) scaling of the gate dielectrics. A correlation between electrical properties and atomic bonding features at the oxide interface was identified by multi-frequency capacitance–voltage (C–V) measurements and x-ray photoelectron spectroscopy observation. An EOT scaled down to 1.2 nm and an interface state density (Dit) in the lower half of the 1011 cm−2 eV−1 were achieved under the optimized fabrication conditions.

Extraction of the sub-bandgap density-of-states in polymer thin-film transistors with the multi-frequency capacitance-voltage spectroscopy

The multi-frequency capacitance-voltage (C-V) spectroscopy is proposed for extracting the sub-bandgap density-of-states (DOS) of polymer semiconductors and demonstrated in three different thiophene-based organic thin-film transistors including poly(3-hexylthiophene), poly(3,3′′′-didodecylquaterthiophene), and poly(didodecylquaterthiophene-alt-didodecylbithiazole). The density of exponential tail and exponential deep states are extracted to be in the range of 3.0 × 1018 ∼ 1.5 × 1019 cm−3 eV−1 and 3.0 × 1016 ∼ 3.0 × 1017 cm−3 eV−1, respectively. The extracted DOS correspond to the polymer semiconductor-dependence of the measured crystallinity and mobility. In addition, the extracted DOS values are verified by comparing the measured I-V characteristics with the simulated results through a technology computer-aided design tool.