Multichip Module Packaging Research Articles

A methodology for laser-based thermal diffusivity measurement of advanced multichip module ceramic materials

Alumina derivative ceramics and low temperature co-fired ceramic (LTCC) electronic multichip module (MCM) packaging substrates have been characterized using single- and double-sided inspection laser flash thermal diffusivity measurement techniques. The paper highlights problems associated with both the measurement system and associated data analysis for the single-sided measurement, and these data are evaluated with reference to that measured by an existing (double sided inspection) standard laser flash method. Finally, a preliminary single-sided measurement methodology is proposed.

OPTIMAL ALGORITHMS FOR SUBSTRATE TESTING IN MULTI-CHIP MODULES

Multi-chip module (MCM) packaging techniques present several new technical challenges, notably substrate testing. We formulate MCM substrate testing as a problem of connectivity verification in trees via k-probes, and present a linear-time algorithm which computes a minimum set of probes achieving complete open fault coverage. Since actual substrate testing also involves scheduling probe operations, we formulate efficient probe scheduling as a special type of metric traveling salesman optimization and give a provably-good heuristic. Empirical results using both random and industry benchmarks demonstrate reductions in testing costs of up to 21% over previous methods. We conclude with generalizations to alternate probe technologies and several open problems.

Application of CFD technology to electronic thermal management

Application of a computational fluid dynamics (CFD) tool to the thermal modeling of free convection cooled handheld/portable products and component level products is assessed. The results of two case studies are reviewed. The first case focuses on a sealed, system level enclosure typical of portable consumer products; while the second case looks at a component level analysis of a sealed multichip module (MCM) package possessing an internal cavity. Temperatures predicted by the simulations are compared to available experimental data as a means of assessing the software's ability to adequately solve the coupled fluid dynamics/heat transfer problem. All simulation results were within 10% of experimental results for these two cases, indicating that the software is readily capable of providing good thermal performance predictions. For typical handheld portable products housed in a sealed case, the dominate mode of heat transfer from the components/circuit board to the outer case is via gaseous conduction. Convection typically fails to develop in such designs due to the dominance of viscous forces within the air confined between the circuit board and outer case. >

Efficient network folding techniques for routing permutations in VLSI

Network folding is a technique for realizing permutations on N elements using interconnection networks with M input (and output) terminals, where M<N. A major motivation for network folding is the severely limited number of I/O pins in microelectronic packages, such as VLSI chips or multichip module (MCM) packages. Cost overhead and performance degradation due to off-chip communication as well as long on-chip wires may render implementing otherwise good designs infeasible or inefficient. In this paper, an efficient and systematic methodology is proposed for designing folded permutation networks that can route the class of bit-permute-complement (BPC) permutations. In particular, it is shown that any folded BPC permutation network can be constructed using only two stages of uniform-size transpose networks. This results in highly modular structures for BPC networks. The methodology trades off speed (time), with I/O and chip-area.<<ETX>>

Integrated Circuit Hybrid, and Multichip Module Package Design Guidelines [Books and Reports

Integrated Circuit Hybrid, and Multichip Module Package Design Guidelines [Books and Reports

Integrated circuit, hybrid, and multichip module package design guidelines A focus on reliability

Integrated circuit, hybrid, and multichip module package design guidelines A focus on reliability

Laser system for fine pitch Tape Automated Bonding

A system has been developed for implementing a solderless fine pitch Tape Automated Bonding (TAB) process. The process was applied to multichip module (MCM) packages with lead pitch of 100 μm. The technology can be extended to ultrafine pitch as low as 25 μm and can be used for both inner lead bonding and outer lead bonding. The technology is based on metal to metal diffusion at the lead to pad interface using a ‘‘hot’’ tip energized by a laser. A closed end flat tip was used to comply with safety requirements and provide uniform temperature distribution across the footprint of the tip. The tip has shown no degradation during the initial testing of 25 000 bonds. The technology is much simpler compared to the solder based TAB process. It is easily controlled, does not require any pretreatment of the pads and is less sensitive to pad contamination and surface nonplanarity. It can be applied to various sets of pad-lead metallurgies such as Au–Au, Au–Sn, Cu–Au, and Ni–Au. The study shows that the process can be designed to be reworkable which makes it suitable for MCM applications.

Exploring the design space for a shared-cache multiprocessor

In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichip-module (MCM). In this paper we investigate the architecture and partitioning of resources between processors and cache memory for single chip and MCM-based multiprocessors. We study the performance of a cluster-based multiprocessor architecture in which processors within a cluster are tightly coupled via a shared cluster cache for various processor-cache configurations. Our results show that for parallel applications, clustering via shared caches provides an effective mechanism for increasing the total number of processors in a system, without increasing the number of invalidations. Combining these results with cost estimates for shared cluster cache implementations leads to two conclusions: 1) For a four cluster multiprocessor with single chip clusters, two processors per cluster with a smaller cache provides higher performance and better cost/performance than a single processor with a larger cache and 2) this four cluster configuration can be scaled linearly in performance by adding processors to each cluster using MCM packaging techniques.

The Technology of Molded Multichip Modules

In the past several years, multichip modules (MCMs) have become cost effective in many high-volume applications, including wireless technologies, telecommunications, workstations, and consumer products. One reason for this success is the development of low-cost and highly reliable packaging techniques. We discuss a packaging technique that permits us to offer customers multichip-module packages that are identical in outline to single-chip semiconductors, and conform to the standards of board assembly manufacturers. Molded MCM packages externally appear to be identical to single-chip packages, but they have a quite different internal structure, which can be ceramic, silicon, or organic laminate-based. MCMs consist of multiple-mounted and interconnected devices that offer integration advantages not available in other packaging technologies. This paper describes the characteristics of AT&Ts MCMs, and the technology of molding these structures. This molding technology offers higher reliability, higher yield, and lower cost to manufacture.

Low-temperature fabrication of amorphous BaTiO/sub 3/ thin-film bypass capacitors

Amorphous BaTiO/sub 3/ thin-film capacitors suitable for integration into a multichip module packaging process were fabricated. The multilayer capacitor structure consisted of an adhesion layer (TiO/sub x/N/sub y/ or Ti), a bottom electrode (Cu), a dielectric (amorphous BaTiO/sub 3/), and a top electrode (Cu). A 3000-AA amorphous BaTiO/sub 3/ film was deposited onto the electrode by the reactive partially ionized beam (RPIB) technique at near room temperature. After a 300 degrees C postdeposition anneal, the capacitors had the following properties: epsilon /sub r/=17-18 and tan delta >

Excimer Laser Structuring of Epoxy Resin Layers for MCM‐L Applications

Multichip module packaging enables a significant increase of interconnect densities and performance of electronic systems. Multichip module technology based on laminate materials (MCM‐L) is attractive due to low cost and use of the standard equipment used by PCB manufacturers. The most limiting factor for higher wiring densities in PCB technology is the mechanical drilling of plated‐through holes. Using 0.3 mm drill diameters, 0.5 mm land diameters are required, which limit the area for routing of tracks. Therefore, alternative dielectric materials, which can be structured photolithograpically, by plasma etching or laser drilling, are very attractive for MCM‐L technology. In this paper an epoxy resin layer, commercially available as a solder mask, is investigated as an interdielectric layer. Via hole drilling is investigated using an excimer laser. To show process feasibility, a two‐layer wiring system is fabricated using the excimer laser structured epoxy resin as an interdielectric layer on conventional epoxy board (FR‐4).

Development of a multichip module DSP

The signal processor packaging design (SPPD) general-purpose digital signal processor (DSP) architecture is discussed. SPPD is a highly modular processor architecture that is based on off-the-shelf components and that supports a multichip module (MCM) design implementation that delivers 400 million floating-point operations per second in a 75-g package. The interconnect-substrate design, MCM package assembly, MCM testing, and tradeoffs in size, weight, and cost of the SPPD packaging are described. >

Application of diamond substrates for advanced high density packaging

The increased speed of integrated circuits (ICs) is accompanied by increased power levels and the need to package the IC chips very close together in order to realize that speed at the system level. Combined, these spell very high power densities and severe thermal problems at the package level, which are difficult to deal with satisfactorily using conventional packaging materials. Recently, the promise of major reductions in the price of synthetic diamond has allowed its consideration for use in electronic thermal management applications, such as multichip module (MCM) substrates, requiring many tens of grams of material ( e.g. substrates 100 mm square and 1 mm thick). Because of the combination of extremely high thermal conductivity and an electrically insulating nature, diamond is an ideal IC packaging or MCM substrate material, not only for reducing chip temperatures in conventional 2D MCM configurations but also in making it practical to implement advanced 2D package configurations and ultrahigh performance, three-dimensionally interconnected MCM packaging approaches. These advanced packaging concepts are made possible because diamond can cool, through lateral thermal conduction to board edges alone, MCMs with many hundreds of watts of power dissipation and at the same time allow for a high density of vertical via interconnects through the diamond substrate.

Decoupling capacitor effects on switching noise

The experimental procedures and test vehicles used for the characterization of the decoupling capacitor efficiency in reducing the power supply differential switching noise of the multichip-module (MCM) package structure employed in the IBM ES/9000 system are described. The experimental results are summarized for various switching elements. It is demonstrated that careful design of the test vehicles, tester systems, and probes makes the accurate measurement of Delta-1 noise feasible. Experimental results on the BOBCAT tester show that the decoupling capacitor efficiency in reducing the peak of the differential Delta-1 noise is 50-67%. This efficiency can be increased by reducing the effective inductance in the decoupling capacitor current return path. >

Micro-ATR-IR as a Probe of BCB Layers for MCM-D/L Applications

AbstractTo lower the cost of multichip module packaging, hybridized substrate technologies have recently been reported which blend the desirable aspects of D and L fabrication (MCM-D/L). High performance dielectrics such as Cyclotene™3022 and photosensitive BCB have been shown to be compatible with laminate substrates used in MCM-DIL, however the cure levels of the dielectric on the laminates must be known for optimum processing.In this paper, the capability of attenuated reflection IR microscopy (micro-ATR-IR) to probe thin films of BCB polymers is demonstrated. This technique enables the polymer layer to be probed regardless of the characteristics of the substrate. Cure levels of both Cyclotene™ 3022 and photodefinable BCB polymer films are obtained with micro-ATR-IR on both silicon and laminate substrate. Micro-ATR-IR is also used to probe a rapid thermal cure of Cyclotene Tm 3022 and photodefinable BCB layers on copper-clad polyimide laminate; these measurements cannot be made with transmission IR due to the high reflectivity of the substrate.

Materials issues in the multichip module packaging of electronics

Materials issues in the multichip module packaging of electronics

Electronic Materials and Structures for Multichip Modules

Multichip modules are rapidly becoming a major thrust in electronic packaging technology. Because of the high density and high performance nature of the electronic devices packaged in multichip modules, stringent new demands are being placed on materials, interconnect, and packaging structures. A systematic review of the materials and material structures for multichip modules is presented along with their associated physical and electronic properties. Particular emphasis is placed on new materials and their potential impact on multichip module packaging. Examples of their use in the fabrication of multichip modules and advanced chip-on-board systems are described.

The single chip versus multichip packaging option for digital CMOS in the 1990s

The level of functional density achievable in digital CMOS logic chips is so high that in the past systems implementations by multichip module (MCM) packaging appear to have been unnecessary, because the system was usually made up of only a few chips. However, rapidly increasing system sizes anticipated in the future will require many VLSI/ULSI CMOS chips per system, operating at near 100 MHz clock frequency. The authors have, therefore, reexamined the single-chip versus MCM packaging option for digital CMOS for the 1990s. They conclude that, for large-scale CMOS logic systems constructed by the use of many state-of-the-art VLSI/ULSI chips, the MCM packaging approach gives a manyfold improvement in packing density (3-8*), performance (up to 1.4*), and cost (1.2*) over the SCM packaging approach. >

X-Ray Determination of Residual Stresses of Encapsulated Thin Aluminum Lines

AbstractDifferences in thermal expansion coefficients between the dielectric layers, the substrate, the metallizations, and the circuit chips generate complex residual stress fields within multichip module (MCM) packages. For example, encapsulated interconnect lines in a typical MCM are under triaxial stress. Quantifying the triaxial stress is needed to understand critical issues such as stress relaxation, stress-induced voiding, as well as providing benchmarks for finite element calculations. Employing a novel sample design, triaxial residual stresses have been determined in thin aluminum lines encapsulated in benzocyclobutene dielectric layers by x-ray diffraction techniques. Significant differences are observed in the stresses if the lines are deposited on the Si substrate or on intervening polymer layers. The stress level is constant with intervening polymer layer thickness. The results suggest a fundamental difference between the strain transfer across the silicon oxide-aluminum interface relative to the silicon oxide-polymer interface.

Compact liquid cooling system for small, moveable electronic equipment

A compact liquid cooling system has been evaluated in a benchmark of self-contained heat exchanger units that fit within small movable electronic equipment, such as PCs and workstations. The compact cooling system connects to a multichip module package via a pair of flexible stainless steel hoses. The system contains a fluid expansion chamber, a liquid-to-air heat exchanger core, a fan, and a pump and can operate entirely sealed. Pressures, package power dissipation, flow rate, and temperatures were recorded. The coolant liquid chosen for use in this system was 3M Fluorinert type FC-72, a chemically inert dielectric liquid. The 5.5 liter prototype system delivers 1.1 liter/min of FC-72. Test results showed the unit can remove up to 274 W of power dissipated with a 52 degrees C temperature difference between inlet liquid and air with a thermal resistance of 0.19 degrees C/W. Design improvements for a second generation system are proposed. >