Multicarrier Pulse Width Modulation Research Articles

Multicarrier PWM techniques for three phase modular multilevel converter application in MRI systems

This research paper presents about the performance analysis of three phase modular multilevel converter with level shifted (phase disposition pulse width modulation) and phase shifted pulse width modulation (PWM) method. This research not only discusses the significance of different modulation procedures in the context of modular multilevel converters but also carefully evaluates each of their unique performance characteristics. This research is based on the fundamental creation of pulses and patterns that can only be acquired by comparing sinusoidal reference signals with triangular carrier signal. Both levels shifted (phase disposition) and phase shifted PWM procedures are used to calculate the phase output voltage of a converter at 2N+1 level. The output waveform is crucially shaped by these modulation techniques, which also ensure effective energy conversion and lower harmonic content. On the basis of the output voltage waveform's quality, the comparative research is conducted and simulated results were presented.

Harmonizing power systems with a 13-level modified Packed U-Cells multi-level inverter: Design and implementation

Traditional multilevel inverter designs often face complexity challenges, prompting the need for a simplified solution. This study introduces and evaluates the performance of a Modified Packed U-Cells (MPUC) inverter in the realm of multilevel inverter technology. The study addresses challenges associated with conventional multilevel inverters and proposes the MPUC inverter as a solution to simplify the design complexity. The MPUC inverter, utilizing three DC sources and eight switches, presents a groundbreaking thirteen-level output waveform. The primary focus lies in assessing the inverter's performance in terms of Total Harmonic Distortion (THD) and output voltage. Utilizing MATLAB/Simulink, the inverter's performance is evaluated with and without Pulse Width Modulation (PWM) strategies. The results reveal a notable reduction in THD, from 26.25% to 9.91% post-filtering when PWM is not employed. Various multi-carrier Level-Shifted PWM strategies, including PDPWM, PODPWM, APODPWM, and COPWM, are explored to enhance output waveform smoothness and efficiency. Unequal Carrier strategies, specifically UEAPDPWM and UEAPODPWM, emerge as superior in THD management at different frequency ranges. The study further incorporates real-time hardware implementation of the proposed 13-level MPUC topology, highlighting the success of the UEAPD-PWM strategy in improving waveform quality. The research aims to establish a multilevel inverter design protocol meeting international standards and emphasizes the pivotal role of PWM techniques in enhancing waveform quality. This comprehensive evaluation contributes to advancing the field of multilevel inverter technology and sets a benchmark for future research in this domain.

A New Design of UPQC-Based Hybrid Multi-Carrier Modulation for Transformer Less Grid Connected PV-Based Active Power Filter

In recent times, there has been a growing concern over the augmented power consumption, leading to a pressing need for compensating devices to maintain power quality in grid-connected systems. One extensively employed solution is the Unified Power Quality Conditioner (UPQC), which incorporates both shunt and series active power filters (APFs) connected through a DC-link capacitor. However, traditional systems using compensating devices can be costly and cumbersome, often relying on transformers to interface with the grid. To address these drawbacks, this report proposes a transformer-less networking approach using a multi-level inverter (MLI) that reduces the number of switches in the shunt and series APF. To enable the efficient operation of the MLI in UPQC, the report utilizes Synchronous Reference Frame Theory and Hybrid Multi-Carrier Pulse Width Modulation (H-MCPWM) techniques for reference signal generation and gate control, respectively. MATLAB/Simulink simulation version 2019a is employed to validate the performance of the proposed system, along with a hardware prototype featuring a motor load. A key aspect of the investigation involves conducting harmonic analysis for various modulation indices with a non-linear load. The resulting data is then compared to the outcomes of the conventional model. By exploring this approach, the report aims to showcase the viability of the transformer-less networking of MLI in UPQC, thereby paving the way for more cost-effective and efficient grid-connected systems with improved power quality.

A New Asymmetric H-6 Structured Multilevel Inverter with Reduced Power Components

Multilevel inverters play a key role in improving the power quality for industrial, domestic, and renewable energy sectors due to sinusoidal output voltage through small voltage steps, lesser THD (total harmonic distortion), and EMI (electromagnetic interference). There are several variants in MLI structures to generate a stepped voltage with their own operating characteristics, which flaws in switching devices with gate drivers, current conducting switches varied with varied voltage levels, and switches with different abilities in blocking voltagesto overcome increases in implementation costs and restrict its usage in high-power applications. Therefore, this article paves a solution for the above problem, which orients a new structure for asymmetric operation to propel large voltage levels with small values of switches in parallel with conventional topologies. The subtlety of the proposed topology is governed by a multicarrier pulse width modulation scheme, and ten different voltage magnitude algorithms are developed and compared foreffectiveness.Hitherto, many existing MLI topologies with reduced power switches have beendeveloped; among these, the H6 structure attempts to curtail the reduced conduction path. The operation of the suggested topology is confirmed in a Matlab/Simulink environment, and real-time performance is investigated using a laboratory prototype to accord the simulated results.

Impact of Converter Topology on the Shunt Active Power Filter Systems Efficiency

This paper presents the performance of shunt active power filters (Shunt APFs) which can compensate harmonic currents generated by no-linear load based on five and seven-level neural point clamped (NPC) inverters. Multilevel inverters are currently being investigated and used in several industrial applications. Their advantages include the capability to reduce the harmonic content and decrease the voltage or current ratings of the semiconductors. On the other side, fuzzy techniques are successfully employed in various industrial applications; they represent a good alternative to traditional control systems. To benefit of all these advantages an efficient control scheme for five and seven-level Shunt APF based on multi-carrier pulse width modulation (MC-PWM) and fuzzy control approaches are adopted in this work. The fuzzy controller is designed to improve compensation capability of shunt APF by adjusting the error using a fuzzy rule. The control strategy to identify the current reference uses synchronous detection method (SMD), this technique is easy to implement and achieves good performances. The numerical simulation results carried with MATLAB-Simulink and SimPowerSystems Toolbox show the effectiveness of the proposed systems and confirm the superiority of the seven-level shunt APF compared to five-level configuration system.

Trapezoidal reference-based single carrier pulse width modulation method for multilevel converters with novel FPGA implementation

Recent attention has focused on trapezoidal reference-based pulse width modulation (PWM) schemes in multilevel converters (MLCs) with easier implementation and better harmonic performance. Nevertheless, these studies utilize trapezoidal reference only for multi carrier PWM methods and details of FPGA implementation are not provided. This paper proposes a trapezoidal reference-based single carrier PWM (TSC-PWM) with its novel FPGA implementation. Design parameters of TSC-PWM is determined such that harmonic performance is maximized and architectural details of FPGA implementation of TSC-PWM are provided. Results reveal that TSC-PWM significantly reduces the resource utilization compared to other methods. Single-phase three-module cascaded H-bridge MLC (CHB-MLC) is established in both simulation and experimental platforms. Results indicate that the TSC-PWM provides better harmonic performance along with higher DC utilization ratio compared to other methods. Moreover, both half-wave and quarter-wave symmetries are ensured with TSC-PWM.

A New Topology and Modulation Strategy to Suppress the Leakage Current in Transformerless Cascaded H-Bridge Inverters in PV Application

The use of transformerless inverters is common due to the lower cost, lighter weight, and higher efficiency. The lack of the transformer leads to the leakage current circulation through the parasitic capacitors, which increases the power losses, electromagnetic interferences, and safety issues. In this article, first, the proposed cascaded H-bridge (CHB) -based inverter’s equivalent common-mode (CM) model is determined. Then, a new multicarrier pulsewidth modulation strategy is proposed to suppress the leakage current. In the presented method, new redundancy states are provided due to the use of just one blocking switch. These extra redundancy states and the proposed modulation strategy help to keep the CM voltage (CMV) constant and suppress the leakage current. The validity of the proposed solution is verified by simulation in the MATLAB/Simulink environment. In addition, a universal prototype with a power rating of 600 W is built and tested, and the experimental results are presented to confirm the theoretical and simulation results. The experimental results show a maximum efficiency of 98.5% and a European efficiency of 98.3%. The proposed topology is also compared to the existing transformerless topologies to show its effectiveness.

A Sensor-less Surface Mounted PMSM for Electronic Speed Control in Multilevel Inverter

Recent advancements in power electronics technology evolves inverter fed electric motors. Speed signals and rotor position are essential for controlling an electric motor accurately. In this paper, the sensorless speed control of surface-mounted permanent magnet synchronous motor (SPMSM) has been attempted. SPMSM wants a digital inverter for its precise working. Hence, this study incorporates fifteen level inverter to the SPMSM. A sliding mode observer (SMO) based sensorless speed control scheme is projected to determine rotor spot and speed of the multilevel inverter (MLI) fed SPMSM. MLI has been operated using a multi carrier pulse width modulation (MCPWM) strategy for generation of fifteen level voltages. The simulation works are executed with MATLAB/SIMULINK software. The steadiness and the heftiness of the projected model have been investigated under no loaded and loaded situations of SPMSM. Furthermore, the projected method can be adapted for electric vehicles.

Optimized Multi-Carrier PWM Strategy and Topology Review for Multi-Cell Series-Parallel Medium-Voltage Rectifier

Solid-state transformer (SST) acting as a medium-voltage (MV) rectifier is a viable solution to supply low-voltage DC (LVDC) loads directly from the MV ac grid. Different from a classical boost-derived power-factor-correction (PFC) topology, the multicell series-parallel (MCSP) converter steps down and distributes the input ac voltage by multiple switching cells while providing the PFC function. We propose an optimized multicarrier pulsewidth modulation (PWM) strategy to avoid unwanted modes by modified multicarrier waveforms for ensuring frequent parallel connectivity to improve balancing effect while preserving simple current control implementation. Compared with conventional phase-shifted (PS) PWM and other modified multilevel carrier methods, the proposed method has no adverse effect on the input current distortion and optimizes the balancing effect on the capacitor voltages resulting suppressed circulating currents. Effectively reduced current stresses on the switch devices could lead a reduction of conduction loss on the device. Topology discussion, circulating currents, digital implementation, and loss analysis are provided. Finally, the superiority of the proposed PWM method is validated by thermal-based simulation presenting a power loss breakdown and comparing with other PWM methods. A full-scale prototype is developed, and the experimental outcomes verify the remarkable performance of proposed PWM scheme in balanced and even suppressed switch currents with improved system efficiency.

Cone-structured seven-level boost inverter topology for improvising power quality using online monitoring controller scheme for DSTATCOM application

In this article, a seven-level triple-time voltage-boosting topology (8S7L-TTB) is proposed, which has eight switches as the minimum. This topology is used as DSTATCOM to eliminate power-quality issues. In a three-phase four-wire distribution system, specific unpredictable issues have emerged through the increase of unbalanced linear and non-linear loads, which has caused various drawbacks such as voltage imbalance, poor voltage regulation, increased reactive components, and harmonics generation, through which the life period of the system has been minimized, undesirable heating has been produced, and the RMS voltage has been reduced. Hence, it is highly essential to eliminate the issues as mentioned earlier. In this research, a PV-based DSTATCOM is introduced for online-monitoring adaptive Chebyshev neural network controller with triple-boost inverter topology. The three-phase system’s D-Q components, which have been continuously extracted under instant-loading conditions, and the reference magnitude, have been compared through the proposed controller. The error signal is received from the adaptive Chebyshev neural network controller, through which the proposed inverter-switching devices are triggered with multi-carrier pulse width-modulation technique are used to compute the THD of 2.79%. Furthermore, this proposed seven-level inverter and controller have solved the aforementioned problems and maintained the floating capacitor’s voltage nearly as similar as the source voltage in different loading conditions to ensure the efficiency of the system is at 96.82%. To ensure its suitability in real-time, the proposed controller is simulated with MATLAB software and validated through the downscale experimental setup and the results are observed.

Low and High Frequency Control Strategy for Asymmetrically Switched Cascaded Multilevel Inverter

This paper proposes low and high frequency control techniques for asymmetrically switched cascaded multilevel inverters (MLI). Initially, Low frequency-based switching angle calculation methods are proposed for the suggested topology. Then high frequency-based Multi-carrier pulse width modulation (MCPWM) techniques are used to control the switching states of multilevel inverters for asymmetrical sources. The proposed multilevel inverter is a reduced switch topology with a modular version realized. From the modular version of the topology, three asymmetrically switched (7, 13 & 21) levels are simulated by MATLAB/Simulink environment and comparisons among themselves are also considered according to method of switching techniques and power quality, i.e. total harmonic distortion (THD). The designed inverters are recommended for photovoltaic power generation as they are suitable to integrate separate DC power sources. The inverters are designed and simulated with a proper simulation environment and experimentally verified through hardware in loop (HIL) using OPAL-RT (OP-5600) testbed.

Switched Capacitor Based High Step-Up Multilevel Inverter with Self-Balancing Ability and Low Switching Stress

In this article, the switched capacitor (SC) based high step-up multilevel inverter is proposed with self-balancing capability. The proposed SC inverter topology is to step up the high output voltage from the very low input voltage without any bulky transformer. This proposed inverter generates single-phase AC voltage with a frequency of 50 Hz from a very low DC input voltage of 50 V with any intermediate DC-DC conversion stage. Hence, the proposed SC inverter is highly suitable for fuel cell, photovoltaic (PV) applications, and shunt active power filter (SAPF). To control the SC inverter, a multicarrier pulse width modulation (PWM) technique is engaged in the inverter. The high step-up voltage level can be achieved by the charging and discharging process of the SC. Furthermore, the stress voltage of the switches does not exceed the applied voltage and the total standing voltage of the inverter is greatly reduced without H-bridges. The comparative analysis of the proposed SC inverter is made for the components, peak inverse voltage (PIV), total standing voltage (TSV), boosting ability, and voltage balancing of capacitors. The main theme of the paper is producing a thirteen-level sinusoidal current with acceptable total harmonic distortion (THD) at different loads, low PIV, TSV, high boosting ability, and self-balancing of capacitors with fewer passive components. The whole system is examined by using MATLAB/Simulink.

Model Predictive Control of a Modular 7-Level Converter Based on SiC-MOSFET Devices—An Experimental Assessment

Power converter technology has expanded into a wide range of low, medium, and high power applications due to the ability to manage electrical energy efficiently. In this regard, the modular multilevel converter has become a viable alternative to ensure an optimal harmonic profile with a sinusoidal voltage at the load side. Model predictive control (MPC) is a state-of-the-art technique that has been successfully used to control power electronic converters due to its ability to handle multiple control objectives. Nevertheless, in the classical MPC approach, the optimal vector is applied during the whole sampling period producing an output voltage. This solution causes an unbalanced switching frequency of the power semiconductor, which then causes unbalanced stress on the power devices. Modulation strategies have been combined with MPC to overcome these shortcomings. This paper introduces the experimental assessment of a 7-level converter combining a simple phase shift multicarrier pulse-width modulation approach with the MPC technique. A custom test-bed based on SiC-MOSFETs switches is used to validate the proposal.

DESIGN AND DEVELOPMENT OF 51 LEVEL NON MODULAR MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NUMBER OF SWITCHES AND CONDUCTION PATH

In this paper, a 51 level multilevel inverter topology with non modular design is developed, which can be operated in asymmetrical mode with a reduced number of power switches and lesser conduction path. The proposed design has three separated DC sources and eleven active power switches, i.e., ten unidirectional switch and one bidirectional switch. The topology can be used with asymmetrical voltage source configuration to generate fifty one levels. This structure can be cascaded to produce maximum level by a series connection to produce higher voltage levels with less voltage stress on the switches without modifying the topology structure. A detailed Comparison is made with existing topology and recently introduced topologies based on the number of active switches, Separated DC sources, number of gate driver circuits. To prove the presented topology’s superiority, a simple Multicarrier pulse width modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through Matlab/Simulink simulation. KEYWORDS: Non Modular Multilevel Inverter, Reduced Switch.

Review and design of modular multilevel inverter with modified multicarrier PWM techniques for solar PV applications

PurposeThese implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and control schemes for multilevel inverter (MLI) topologies. Reduced harmonic modulation technology is used to produce 11-level output voltage with the production of renewable energy applications. The simulation is done in the MATLAB/Simulink for 11-level symmetric MLI and is correlated with the conventional inverter design.Design/methodology/approachThis paper is focused on investigating the different types of asymmetric, symmetric and hybrid topologies and control methods used for the modular multilevel inverter (MMI) operation. Classical MLI configurations are affected by performance issues such as poor power quality, uneconomic structure and low efficiency.FindingsThe variations in both carrier and reference signals and their performance are analyzed for the proposed inverter topologies. The simulation result compares unipolar and bipolar pulse-width modulation (PWM) techniques with total harmonic distortion (THD) results. The solar-fed 11-level MMI is controlled using various modulation strategies, which are connected to marine emergency lighting loads. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by using SPARTAN 3A field programmable gate array (FPGA) board and the least harmonics are obtained by improving the power quality.Originality/valueThe simulation result compares unipolar and bipolar PWM techniques with THD results. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by a SPARTAN 3A field programmable gate array (FPGA) board, and the power quality is improved to achieve the lowest harmonics possible.

Harmonics Minimization in PUC Type Solar Multilevel Converter with Multicarrier Switching Schemes

This paper presents the power quality investigation of a seven-level three-phase packed U-cell (PUC) converter with multicarrier switching schemes. This system is grid-connected, and each phase has two solar PV arrays of different voltages. Various modulation schemes are available for switching the multilevel converter, and level-shifted multicarrier pulse width modulation is widely used for easy implementation. A new modified carrier-based modulation technique is introduced for solar PV array fed PUC inverter. The main aim is to reduce the harmonic content in the seven-level output voltage. It also increases the magnitude of the fundamental component of the converter voltage. The comparison of the presented technique shows its advantages over other existing modulation schemes. Closed-loop control is implemented with the inclusion of a modified switching scheme for switching the three-phase PUC converter. The proportional resonant controller provides excellent dynamic performance to feed the power into the grid. Modeling and simulation of the system are done in MATLAB/Simulink. Furthermore, obtained simulation results verify the effectivity of the switching scheme towards minimizing total harmonic distortion. The overall system is validated in the real-time simulator for steady-state and dynamic environmental conditions.

Performance Enhancement of a Three Phase Boost-Cascaded Fifteen Level Inverter Using the PI Controller

Photovoltaic power generation is a potential alternative energy source that offers several benefits over other alternative energy sources such as wind, sun, ocean, biomass, geothermal, and so on. Multilevel inverters are essential for power conversion in solar power generation. These multilevel inverters employ three distinct topologies: diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter, and cascaded H-bridge multilevel inverter. The cascaded H-bridge multilevel inverter is more appropriate for photovoltaic applications than the other two topologies. The proposed system asymmetrical cascaded multilevel inverter (ACMLI) is energized using a photovoltaic system (PV). A three-phase cascaded H-bridge fifteen-level inverter for grid-connected solar systems is given in this study utilizing a proportional integral controller. The harmonic distortion was removed using a multicarrier pulse width modulation method. The MATLAB/Simulink is used to simulate the performance of a three-phase cascaded H-bridge fifteen-level inverter in terms of harmonic content and number of switches. To test the performance of the designed system, a hardware prototype was created. From the obtained results, the proposed method reduces the switch count, harmonic distortion, and rejects the external disturbances of input and output variables.

DESIGN OF MODULAR AND NON MODULAR MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NUMBER OF SWITCHES

In this paper, a new multilevel inverter topology with modular and non modular design is developed, which can be operated both symmetrical and asymmetrical mode with a reduced number of power switches. The proposed design has four separated DC sources and Nine active power switches. The topology can be used with symmetrical and asymmetrical voltage source configuration to generate seventeen and seven voltage levels. This structure can be cascaded to produce maximum level by a series connection to produce higher voltage levels with less voltage stress on the switches without modifying the topology structure. Comparison is made with existing topology and recently introduced topologies based on the number of active switches, Separated DC sources, number of gate driver circuits. To prove the presented topology’s superiority, a simple Multicarrier pulse width modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through Matlab/Simulink simulation. KEYWORDS : Modular, Non Modular Multilevel Inverter, Reduced Switch.

Performance Analysis of Five-Phase NPC MLI with Phase Shifting Carrier Pulse Width Modulation

The five-phase loads with Multi-Level Inverters (MLI) are preferred by industries in high and medium power applications due to lower switching loss, voltage stress across switches, etc. The controlling of a five-phase motor drive is done by Pulse Width Modulation (PWM) techniques. This paper discusses different multi carrier PWM techniques, such as Level Shifting Carrier (LSC) PWM and Phase Shifting Carrier (PSC) PWM techniques available for controlling the inverter drive. The simulation is carried out for all PWM techniques and load voltage, voltage THD, Common Mode Voltage (CMV), and DC-link voltages are noted and compared among the PWM techniques.

Switching Sequence Control 31-Level Asymmetric Cascaded of Reduced Switch Count Multilevel Inverter with Multi Carrier Pulse Width Modulation

Various pulse width modulation techniques, including as cascaded multilevel inverters (MLI), diode clamped multilevel inverters, and flying capacitor multilevel inverters, can be used to simply operate common inverters. Due to increased switching losses, current MLIs cannot reach high efficiency. Due to lower losses and THD than standard MLI topologies, the asymmetric cascaded multi-level H-bridge inverter architecture examined in this white paper employs fewer switches and more output voltage levels (Total Harmonic Distortion). The THD is less than the IEEE standard because of the suggested architecture. In this instance, phase difference (PD) multi-carrier PWM techniques are used to control the gate pulses using sinusoidal reference. Each switch receives a different pulse pattern thanks to a method of decimal-to-binary conversion. It is possible to utilise the suggested circuit for applications requiring moderate to high power, and it is quite simple to evaluate. Utilize the MATLAB/SIMULINK environment to simulate time-domain behaviour for the 31-level and 33-level multilevel inverter topologies.