Solid state devices are common choices for data and systems storage in many high assurance application domains due to features such as no moving parts, shock/temperature resistance and low power consumption. On the other hand, they present new challenges in data reliability concerns. In multilevel cell NAND flash memories the bit error rate increases exponentially with reduced endurance limit as compared to single-level cell NAND flash memories. This can significantly reduce the data reliability and integrity of flash based storage systems. One solution to this is Redundant Array of Independent Disk (RAID) mechanisms. However these have an inherent problem as all flash memory chips wear out at the same time due to equal distribution of write operations. Recent solutions such as Diff-RAID partly solve this problem using uneven parity distribution mechanism, but suffer age-variation problems thereby decreasing the reliability of the array as well as increasing the cost. In this paper we present a fast age distribution convergence mechanism and page write control mechanism for a solid state device array. This mechanism solves the age convergence problem and uses fewer replacement devices. In the case of pure random write distribution the mechanism also saves page writes, thereby increasing the lifespan of each element in the array.