Multi-band Low Noise Amplifier Research Articles

A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24–71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR

This article introduces a power-efficient 24.25– 71-GHz multi-band phased-array receiver supporting all allocated fifth-generation mobile network new radio (5G NR) frequency range 2 (FR2) bands at 24/28/39/47 GHz and the potential 5G NR-U bands in unlicensed 57–71 GHz. A novel harmonic-selection technique is introduced to extend the operating bandwidth with low power consumption. By switching between the fundamental-selected mode, the second-harmonic-selected mode, and the third-harmonic-selected mode, only signals in the desired bands can be preserved, while the unselected mixing components are rejected. A dual-mode multi-band low-noise amplifier (LNA) based on a configurable transformer is adopted to realize broadband operation with minimized power consumption and noise figure (NF). The Hartley architecture is employed to further improve the image rejection performance. A hybrid-type polyphase filter (PPF) with a detector-based high-precision calibration block is utilized in this work to realize the Hartley operation with reduced insertion loss (IL). The proposed phased-array receiver is fabricated in a standard 65-nm bulk CMOS process. With the concerted efforts of all components, the proposed multi-band receiver can support 5G standard-compliant OFDMA-mode modulated signals up to 256QAM with a 400-MHz channel bandwidth from 24 to 71 GHz. Better than 36-dB inter-band blocker rejections can be maintained by this work. With existing of 0-dBc inter-band blockers at worst case frequencies, this receiver shows EVMs of −33.3, −30.9, −31.6, and −28.5 dB at 28, 39, 47.2, and 60.1 GHz, respectively. The power consumptions for a single receiver channel are 36, 32, 51, and 71 mW at 28, 39, 47.2, and 60.1 GHz, respectively.

A Multi-Band LNA Covering 17–38 GHz in 45 nm CMOS SOI

This paper presents a multi-band low-noise amplifier (LNA) in the 45-nm CMOS silicon-on-insulator (SOI) process. The LNA consists of three stages, with the differential cascode amplifier as the core structure. The first stage is mainly responsible for input matching to ensure favourable noise characteristics and bandwidth, while the subsequent stages increase the gain. Moreover, the LNA utilizes baluns for input/output and interstage impedance matching. Switch capacitances are added to switch the three operating bands of the LNA, which cover 17–38 GHz overall. Measurement results show that the proposed LNA achieves a gain (S21) of 23.0 dB and a noise figure (NF) of 4.0 dB.

Millimeter-wave Frequency Reconfigurable Low Noise Amplifiers for 5G

In this brief, designs of two millimeter wave (mmWave) reconfigurable multi band low noise amplifiers (LNA) are presented targeted for fifth generation (5G) communications. A reconfigurable tunable load based on electrical and magnetic tuning is proposed to cover three mmWave frequency bands for 5G, i.e., 24 GHz, 28 GHz and 39 GHz. Two LNA structures are designed and fabricated using 45nm CMOS SOI technology. The first toplogy (LNA1) is composed of a single input wideband matching circuit to cover frequency operations from 24 GHz to 40 GHz. On the other hand, second topology (LNA2) uses three separate narrowband match inputs, one for each frequency band, with combined output. Design methodology of passive and active devices is presented towards compact integration of LNAs for systems such as, phased arrays. Ground plane and its impact on the performance parameters is also discussed in this brief. Measurement results show a wideband noise figure (NF) ranging from 3.8 dB to 4.9 dB and gain of 8.5 dB to 12.5 dB for LNA1 at different bands. Similarly, LNA2 exhibits NF of 4.5 dB to 5.5 dB and gain of 9.5 dB to 15.5 dB across all bands. Total area (including pads) of LNA1 and LNA2 are 0.316 mm2 and 0.695 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , respectively.

Design of reconfigurable multi-band low-noise amplifiers for 802.11ah/b/g and DCS-1800 applications

In this paper two reconfigurable multi band low-noise amplifiers, namely LNA1 for 802.11ah/b/g and LNA2 for 802.11ah/b/g, DCS-1800 applications using tank circuits are presented. Dual feedback is used to achieve multi band operation in both the LNAs. Power dissipation of the LNAs is reduced by employing current-reuse and forward body-biasing in the first stage of the LNAs. The novelty of the proposed approach lies in the fact that the reconfigurability of the LNAs for multi bands is achieved using simple tank circuits without requiring any additional biasing arrangement. The LNAs are designed using UMC 180 nm RFCMOS process. The post layout simulation results of LNA1 showed a power gain of 9.3 dB with noise figure of 3.7 dB, IIP3 of −2.19 dBm, DC power dissipation of 16.5 mW at 900 MHz and a power gain of 10.6 dB, noise figure of 3.1 dB, IIP3 of −2.7 dBm at 2.4 GHz. In LNA2 one common-source stage is added for further gain improvement and one more tank circuit is added to operate it additionally in GSM band, namely DCS-1800. Post layout simulation of LNA2 showed a power gain of 16.1 dB with noise figure of 4.6 dB, IIP3 of −6.57 dBm, DC power dissipation of 24.9 mW at 900 MHz; a power gain of 14.7 dB with noise figure of 5.4 dB, IIP3 of −4.34 dBm at 1.8 GHz and a power gain of 16.2 dB, noise figure of 3.6 dB, IIP3 of 0.57 dBm at 2.4 GHz.

A multi-band low noise amplifier with strong immunity to interferers

A multi-band low noise amplifier (LNA) is designed to operate over a wide range of frequencies (with center frequencies at 1.2, 1.7 and 2.2 GHz respectively) using an area efficient switchable pi network. The LNA can be tuned to different gain and linearity combinations for different band settings. Depending upon the location of the interferers, a specific band can be selected to provide optimum gain and the best signal-to-intermodulation ratio. This is accomplished by the use of an on-chip built-in-self-test circuit. The maximum power gain of the amplifier is 19 dB with a return loss better than 10 dB for 7 mW of power consumption. The noise figure is 3.2 dB at 1 GHz and its third-order intercept point (IIP3) ranges from -15 to 0 dBm. Implemented in a 0.13 mu m CMOS technology, the LNA occupies an active area of about 0.29 mm. This design can be used for cognitive radio and other wideband applications, which require a dynamic configuration of the signal-to-intermodulation ratio, when sufficient information about the power and the location of the interferers is not available.

Concurrent Multi-Band Low-Noise Amplifier

With rapid expansions of wireless communications, requirements for transceivers that support concurrent multiple services are continuously increasing and demanding design of a concurrent low-noise amplifier (LNA) with low noise figure (NF), high gain, and high linearity over a wide frequency range for various wireless applications. The proposed work focuses on a concurrent multi-band LNA that works at navigational frequencies, namely, of 1.2[Formula: see text]GHz and 1.5[Formula: see text]GHz, wireless communication frequencies, namely, of 2.45[Formula: see text]GHz and 3.3[Formula: see text]GHz, dedicated short range communication (DSRC) frequency of 5.8[Formula: see text]GHz for the vehicular communication applications. This circuit has a distinct input matching network which resonates at all desired five frequency bands and is achieved by adapting frequency transformation method. To accomplish simultaneous reception of the desired penta-band, the output matching is designed with simple LC matching network with the aid of load-pull methodology.

Triple-Band CMOS Low Noise Amplifier Design Utilizing Transformer Couplings

This paper describes multi-band low noise amplifiers (LNAs) utilizing input matching transformers. We investigate a conventional dual-band LNA circuit utilizing a transformer, and show our analysis and simulation results for its circuit. Based on this, we propose a triple band LNA with transformers. We have calculated characteristics of the dual-band and triple-band LNAs. As the results, the LNAs show gain of 20dB while maintaining good input matching, in the frequencies at 2.59GHz, 3.50GHz and 5.41 GHz. Then we discuss configuration and design of coupling coefficients of the transformers.

A New Receiver Front-End for Simultaneous Dual-Frequency NMR Applications

To obtain certain information such as metabolic concentrations in neural or muscular tissues and other applications, it is necessary to design nuclear magnetic resonance (NMR) transmitters/receivers capable of operating at multiple frequencies, while maintaining a good performance at each frequencies. We have proposed a new NMR receiver front-end for simultaneous detection of proton and carbon nucleus. The system consists of two reception coils for carbon and hydrogen analysis, a multiband low-noise amplifier (LNA) for increasing the voltage level and a network for passive amplification, noise figure minimization and decreasing mutuality effect between two coils. The proposed coil set was designed, simulated and analyzed and also the signal to noise ratio (SNR) with quality factor have been calculated for it by simulation. The LNA has been designed in a 0.18[Formula: see text][Formula: see text]m CMOS technology and its gains for carbon and proton NMR signals are 45 and 48[Formula: see text]dB, respectively. The input referred noise for both signals is lower than 0.4[Formula: see text]nV/sqrt(Hz) and the power consumption is 4 mA from a single 1.8[Formula: see text]V supply.

A multi-band low noise amplifier with wide-band interference rejection improvement

In this paper, a differential multi-band CMOS low noise amplifier (LNA), operated in a range of 800–1700MHz, is proposed. In this design, the LNA is integrated wide-band interference rejection (input band selection technology) and capacitive cross-coupling topologies, which can improve the interference rejection and noise figure preference. Moreover, the conventional notch filter technology only rejected the specified frequency. In this experiment, by using the proposed wide-band interference rejection technology, the LNA can reject unwanted signals (out-of-band signals) and image signals from different frequency. Thus, the LNA has good linearity and interference rejection performance. With the increasing use of frequency spectrum, the proposed technology is even more important. The post-simulation results of proposed LNA show that the voltage gain is 13–17.5dB, the noise figure (NF) is less than 3.4dB, and the third-order intercept point (IIP3) is 7.36dBm. The LNA consumes 8.96mW under 1.8V supply voltage in TSMC 0.18-μm RF CMOS process.

Statistical Multiband Multistandard LNA Module

In recent years, wireless and mobile communications systems, such as Global System for Mobile Communications, wideband code-division multiple access, wireless local area networks, long-term evolution, and Bluetooth, have been developed for concurrent operation in a single mobile device. Therefore, a multiband multistandard low-noise amplifier (LNA) is required to provide low noise figure (NF), high gain, and high linearity over a wide frequency range.

A concurrent multiband CMOS low-noise amplifier for 4G standard receivers

In this article, a concurrent triple-band low-noise amplifier (LNA), which operates at 698–800, 1920–2170, and 2300–2400 MHz, is designed for long-term evolution, WCDMA/HSDPA, and Wibro services. The circuit is designed with TSMC 0.18-μm RF CMOS technology. The main topology of the proposed LNA is the cascade architecture with source degeneration. To obtain the necessary gains for this frequency bands, a series LC circuit is added in parallel with the parallel LC tank of a single-band LNA. The proposed LNA is especially suitable for use in multistandard wireless receiver front-ends as it saves die area and reduces power consumption by replacing parallel LNAs for each channel frequency. The proposed LNA has voltage gains of 14.6, 15.2, and 15.5 dB at 749, 1920, and 2300 MHz, respectively, while dissipating 7 mA from a 1.5-V supply voltage. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:834–838, 2014

A MULTI-BAND LOW NOISE AMPLIFIER WITH GAIN FLATNESS AND BANDWIDTH ENHANCEMENT

In this paper, a differential multi-band CMOS low noise amplifier (LNA) is proposed that is operated within a range of 1500–2700 MHz with input matching capacitor switching and gain flatness performance enhancement technique. Traditional multi-band LNAs have poor performances on gain flatness performance. Therefore, we propose a new multi-band LNA which obtain good gain flatness performance by integrating the characteristics of the transistor trans-conductance and LC resonant load. The new LNA can also achieve a tunable frequency at different matching capacitance conditions. The post-layout simulation results shows that the voltage gain is between 19.3 dB and 22.4 dB, the NF is less than 2.5 dB, and the 1-dB compression point is about -5.1 dBm. The LNA consumes 17.79 mW under 1.8 V supply voltage in TSMC 0.18-um RF CMOS process.

A TUNABLE MULTIBAND CMOS LNA FOR MOBILE WIMAX WITH HIGH LINEARITY

In this paper, a multiband low-noise amplifier (LNA) with capability of band tuning is proposed to support the Mobile WiMAX (IEEE 802.16e) standard associated with a large IIP3 at RF frequencies using multi-gated linearization techniques. Proposed LNA architecture has been optimized in terms of linearity based on a comparative analysis between four tunable LNA structures. In addition, a general survey is performed on linearization techniques (multiple-gated transistors, Derivative Superposition (DS), Modified DS). Proposed LNA is constituted of multi-gated linearization technique. Design and simulations have been realized in 0.13 μm RF CMOS process considering a power supply of 1.2 V. Proposed LNA exhibits an IIP3 of +8.8 dBm, +14.3 dBm, and +6.4 dBm at the lower, middle, and upper bands of WIMAX, respectively. It results in a power gain of 10 dB, a noise figure below 2.5 dB and S11 of -11.5 dB, -8.6 dB, and -12.7 dB at the lower, middle, and upper bands. The related power dissipations are 10 mW, 9.9 mW, and 9.4 mW at the lower, middle, and upper bands, respectively.

Figure of merit for narrowband, wideband and multiband LNAs

In software defined radio, the same radio front end is used to accommodate different wireless standards operating in different frequency bands. The use of wideband or multiband low noise amplifiers (LNAs) is mandatory in such situations. There are several figures of merit (FoMs) proposed for narrowband LNAs. These FoMs are modified for wideband/multiband LNAs just by the inclusion of 3 dB bandwidth, and designers tend to use the one that favours their own design. In this article, a review of the existing FoMs for narrowband LNAs is presented. Based on this analysis, we propose two different FoMs for fair comparison of improvement in LNA parameters due to complementary metal oxide semiconductor (CMOS) technology advancement and circuit optimisation (irrespective of transistor technology), separately. The empirical technology scaling factor for gain, noise figure (NF), f T and linearity is used to differentiate between these FoMs for different types of LNAs.

Inter-Stage Tunable Notch Filter for a Multi-Band WCDMA Receiver

This paper presents a multi-band WCDMA receiver consisting of a multi-band low noise amplifier (LNA), a multi-band mixer and an inter-stage tunable notch filter. The notch filter is used to suppress Tx leakage, and 0.8-1.5GHz (66%) of tuning range is achieved. The receiver achieves 33 and 30dB conversion gain, 6.4 and 8dB NF, 50 and 35.5dBm IIP2, and -6 and -4.7dBm IIP3 at 0.8 and 1.5GHz, respectively. The power consumption is 121mW from a 1.8-V power supply. The receiver is implemented in a 0.18-µm CMOS process.

A low-power multi-band CMOS RF receiver front-end for ubiquitous sensor network applications

This paper presents the design and experimental results of a low-power multi-band RF receiver including a multi-band low-noise amplifier (LNA) and a down-conversion mixer based on the IEEE 802.15.4 standard for sensor node applications. A multi-band LNA with two inputs is tuned to two resonant frequencies by controlling the voltage on a switched MOS. The implemented RF receiver front-end achieves a maximum voltage conversion gain of 38 and 30 dB, NF of 6.2 and 9.2 dB at the 868/915 MHz and the 2.45 GHz bands, respectively. The RF receiver front-end dissipates total 3.0 mA (including I/Q mixers) under supply voltage of 1.8 V at both operation bands.

A differential multi-band CMOS low noise amplifier with noise cancellation and interference rejection

In this paper, a differential multi-band CMOS low noise amplifier (LNA), operated in a wide range from 1350 to 2900 MHz , with input matching device, noise cancellation and interference rejection technology, is proposed. Traditional wideband LNAs have poor performances on interference rejection or image rejection. In this design, a multi-band CMOS LNA with matching device noise cancelling, matching device current reuse and source inductance device reuse technologies is proposed, it can improve noise figure, wideband match and interference rejection. There exists a switch-mode notch filter to enhance the interference rejection performance and it does not need additional inductors. A prototype of proposed multi-band CMOS LNA was designed to work at 1450 – 1490 MHz , 1680 – 1685 MHz and 2635 HMz – 2660 MHz . The simulation results show that the gain is between 18 and 19 dB at L-band application (1450–1685MHz) and between 25.8 and 26.1 dB at CMMB Satellite application ( 2635 HMz – 2660 MHz ) , the noise figure is 3.1–3.3 dB, and the third-order intercept point (IIP3) is − 7 dBm . It consumes 27.35 mW under 1.8 V supply voltage in TSMC 0.18- μ m RF CMOS process.

Expression of Concern: Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers

In this paper, we develop a systematic design optimization methodology for inductively degenerated cascode CMOS low noise amplifiers (LNA) in fully integrated wideband and multi-band wireless systems. Leveraging an accurate analytical circuit model, we combine global and local numerical optimization techniques in a hierarchical manner to simultaneously determine the fixed and switchable passive component and device parameters in the LNA circuit necessary to meet user-specified performance requirements. To demonstrate the effectiveness of proposed design optimization methodology, we utilize the method to create 3 wideband and 3 multi-band LNA designs that meet a wide-range of impedance matching, noise figure, gain, power dissipation, and linearity requirements. The proposed method provides circuit designers with a fast and effective means for the rapid prototyping and design space exploration of wideband and multi-band inductively degenerated cascode CMOS LNAs.

CMOS multiband low-noise amplifier using inner diameter shared inductors

A new integrated inductor structure suitable for multiband application is proposed and used to implement a CMOS multiband low-noise amplifier. Its occupied silicon area can be decreased by more than 40% while its performance is almost the same as those of LNAs using the conventional inductor structure. It is fabricated in a 0.13 µm CMOS process and its measured results show gains of 16.8, 15.8 and 15.5 dB, with NFs of 1.4, 1.8 and 1.9 dB, and IIP3 of 4, 0 and −2 dBm for the 850, 1800/1900 and 2100 MHz bands, respectively.

A 1.6/1.8/2.1/2.4-GHz Multiband CMOS Low Noise Amplifier

This paper describes an inductively source degenerated multiband low noise amplifier (LNA) designed in a standard CMOS 0.18 μm TSMC process. The multiband LNA can be tuned to 1.6-GHz, 1.8 GHz, 2.1 GHz and 2.4 GHz with the help of switches. The narrowband gain and impedance matching are obtained at the required frequency bands by appropriately switching the transconductance, input and output capacitances. The switches are realized using metal-oxide-semiconductor (MOS) transistors. The designed LNA exhibits a gain of 16.2dB, 16dB, 15.5dB and 15.5dB and a noise figure of 3.3dB, 3.5dB and 3.2dB at 1.6, 1.8, 2.1 and 2.4 GHz respectively. The LNA design is carried out using Mentor Graphics Eldo software.