MoS2 FETs Research Articles

Dual-Gate MoS2FET With a Coplanar-Gate Engineering

A dual-gate multilayer MoS2 FET with a standard backside gate and a nonstandard coplanar top gate is demonstrated and analyzed. The special feature of this device is that the gate and MoS2 channel can be directly coupled on the same plane through the bottom-conducting Si substrate. The coplanar-gate MoS2 FET shows a good performance with a large ON–OFF ratio ( $I_{\mathrm{\scriptscriptstyle {ON/OFF}}}$ ) of $1.5\times 10^{4}$ , a small subthreshold swing ( $S$ ) of 0.13 V/decade, and a field-effect mobility ( $\mu $ ) of 0.69 cm2/Vs, respectively. Furthermore, a large $V_{\mathrm {{th}}}$ modulation ( $- 0.55\sim 6.4$ V) can be obtained in a dual-gate MoS2 FET by changing the coplanar-gate bias, which makes the device switch from depletion-mode to enhancement-mode operation, without affecting $\mu $ and $S$ , regardless of the coplanar-gate bias. In such a dual-gate MoS2 FET, both top and bottom gates can share the same SiO2 dielectric, and the deposition of source/drain/gate contact can be combined to a single step. A band diagram with the body effect theory is proposed to explain the device operation mechanism. The coplanar-gate MoS2 FET with its dual-gate operation and simple fabrication process can provide a good candidate for low-cost 2-D planar nanoelectronics and sensor applications.

Intrinsic Limit for Contact Resistance in Exfoliated Multilayered MoS<sub>2</sub> FET

A new method for the separation of contact resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">contact</sub> ) into Schottky barrier resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SB</sub> ) and interlayer resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IL</sub> ) is proposed for multilayered MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> FETs. While R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SB</sub> varies exponentially with Schottky barrier height (Φ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bn</sub> ), R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IL</sub> essentially remains unchanged. An empirical model utilizing this dependence of R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">contact</sub> versus Φ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bn</sub> is proposed and fits to the experimental data. The results, on comparison with the existing reports of lowest R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">contact</sub> , suggest that the extracted R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IL</sub> (1.53 kQ · μm) for an unaltered channel would determine the lower limit of intrinsic R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">contact</sub> even for barrierless contacts for multilayered exfoliated MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> FETs.

Reduction of persistent photoconductivity in a few-layer MoS2 field-effect transistor by graphene oxide functionalization

Reduction in persistent photoconductivity by functionalizing MoS2 FET with graphene oxide.

Tuning the threshold voltage from depletion to enhancement mode in a multilayer MoS2 transistor via oxygen adsorption and desorption.

Selective chemical doping in two-dimensional (2D) molybdenum disulfide (MoS2) is attractive for tailoring electrical properties according to device requirements. However, the ultra-thin 2D nature of MoS2 makes it difficult to realize effective doping by conventional ion implantation. Here, a simple method based on low-temperature (150 °C) annealing in air is developed for effective chemical doping in MoS2. We have demonstrated that the threshold voltage (V(th)) of multilayer MoS2 FET can be effectively tuned from depletion mode (V(th) = -1.8 V) to enhancement mode (V(th) = 1.1 V) by annealing in air at 150 °C. An energy band model based on electron trapping/detrapping due to oxygen adsorption on the MoS2 surface is proposed to explain the underlying mechanism. The model is consistent with an oxygen adsorption-desorption process evidenced by vacuum annealing that recovers the V(th) to its original value. These results can provide a simple approach for V(th) engineering and make a significant step toward 2D nanoelectronic device applications.

Benchmarking of MoS2FETs With Multigate Si-FET Options for 5 nm and Beyond

In this paper, we benchmark the performance of monolayer and bilayer MoS2 FETs (MFETs) against various multigate (MuG) Si-FET options, such as FinFETs and lateral and vertical nanowire FETs, for a 5-nm node and beyond. We compare the performance metrics of all the device options at the ring-oscillator (RO) level, accounting for not only intrinsic and extrinsic parasitic elements but also interconnects. Using the atomistic two-band ballistic quantum transport simulations, we evaluate ON-current and intrinsic capacitances for MoS2-based devices. Furthermore, we calibrate two-band model currents with more sophisticated full-band diffusive simulations to obtain realistic performance metrics at the circuit level. We show that both the intrinsic and parasitic capacitances of a single-gate MFET are lesser than those of a double-gate (DG) MFET, resulting in 13% lesser energy consumption. A DG bilayer (DGBL) MFET shows the best performance among different MFETs. In comparison toMuG FETs, the DGBL MFET offers not only lower energy consumption but also 35%–45% lower speed. In the end, to meet the target performance, we evaluate the impact of the device current, contact resistance, and back-end-of-the-line load on the speed of RO with the DGBL MFET.

2D Semiconductor FETs—Projections and Design for Sub-10 nm VLSI

Two-dimensional (2D) crystal semiconductors, such as the well-known molybdenum disulfide (MoS2), are witnessing an explosion in research activities due to their apparent potential for various electronic and optoelectronic applications. In this paper, dissipative quantum transport simulations using nonequilibrium Green’s function formalism are performed to rigorously evaluate the scalability and performance of monolayer/multilayer 2D semiconductor-based FETs for sub-10 nm gate length very large-scale integration (VLSI) technologies. Device design considerations in terms of the choice of prospective 2D material/structure/technology to fulfill sub-10 nm International Technology Roadmap for Semiconductors (ITRS) requirements are analyzed. First, it is found that MoS2 FETs can meet high-performance (HP) requirement up to 6.6 nm gate length using bilayer MoS2 as the channel material, while low-standby-power (LSTP) requirements present significant challenges for all sub-10 nm gate lengths. Second, by studying the effects of underlap (UL) structures, scattering strength, and carrier effective mass, it is found that the high mobility and suitably low effective mass of tungsten diselenide (WSe2), aided by the UL, enable 2D FETs for both HP and LSTP applications at the smallest foreseeable (5.9 nm) gate length. Finally, possible solutions for sub-5 nm gate lengths, specifically anisotropic 2D semiconductor materials for HP and sub- $kT/q$ switch (2D tunnel FET) for LSTP, are also proposed based on the effects of critical material parameters on the device performance.

A Theoretical Investigation of Orientation-Dependent Transport in Monolayer MoS&lt;sub&gt;2&lt;/sub&gt; Transistors at the Ballistic Limit

Device performance of monolayer MoS2 transistors is investigated by atomistic simulations within the non-equilibrium Green's function formalism. A strong dependence of quantum transport on MoS2 orientation is predicted. To a large extent, the orientation dependence is due to subband transport properties and the atomistic structure along the transport direction. A bandgap is found in the conduction band along armchair direction (AD), which plays a major role for the orientation-dependent transport. At the same time, different atomic arrangements along AD and zigzag direction have different depletion region lengths, which also contribute to the orientation-dependent transport. Orientation dependence of drain current exists in MoS2 FETs having different gate lengths.

Physical and Electrical Properties of Ag Contacts on MoS2

We first compared the electrical characteristics of MoS2 field-effect transistors with Ag source/drain contacts with those with Ti. MoS2 FETs with Ag contacts show more than 60 times higher on-state current than those with Ti contacts. Meanwhile, scanning electron microscopy, atomic force microscopy and Raman spectroscopy were carried out on 5nm Au / 5nm Ag or 5nm Au / 5nm Ti film deposited onto MoS2 mono- and few-layers. The results shows that Au/Ag forms smoother and denser film, and that Ag or Ti is in direct contact with MoS2. It confirms that the metal-MoS2 interface is crucial to the device performance. Then, gate assisted contact-end Kelvin test structures and gate assisted 4-probe structures were used to measure the field effects of the transfer length and contact resistivity in source/drain contacts of top-gate MoS2 FETs. It indicates that the contact performance also contributes to the switching of the MoS2 transistors.

Impact of Contact on the Operation and Performance of Back-Gated Monolayer MoS2 Field-Effect-Transistors

Metal contacts to atomically thin two-dimensional (2D) crystal based FETs play a decisive role in determining their operation and performance. However, the effects of contacts on the switching behavior, field-effect mobility, and current saturation of monolayer MoS2 FETs have not been well explored and, hence, is the focus of this work. The dependence of contact resistance on the drain current is revealed by four-terminal-measurements. Without high-κ dielectric boosting, an electron mobility of 44 cm(2)/(V·s) has been achieved in a monolayer MoS2 FET on SiO2 substrate at room temperature. Velocity saturation is identified as the main mechanism responsible for the current saturation in back-gated monolayer MoS2 FETs at relatively higher carrier densities. Furthermore, for the first time, electron saturation velocity of monolayer MoS2 is extracted at high-field condition.

(Invited) Interface and Dielectric Engineering for High-Performance Top-Gated MoS2 Field Effect Transistors

In recent years, due to the intriguing electrical and optical characteristics, two dimensional layered materials such as MoS2 have attracted tremendous research attention. However, until now, majority of the efforts have been focused on the integration of MoS2 devices in the back- or dual-gated geometry due to the difficulty of compact and conformal top-gated dielectric deposition directly onto the 2-D channel for the realization of high-performance top-gated FETs. In order to integration in TFT circuit for practical application, top-gated FETs with high-k dielectric is necessary. In this regard, interface or dielectric engineering is an important step towards the practical implementation of MoS2 devices with the optimized performance. Here, we explore the case of interface engineering by utilizing an ultrathin metallic oxide (MgO, Al2O3 and Y2O3) buffer layer inserted between the ALD-HfO2 and MoS2 channel in order to achieve conformal HfO2/MoS2 interfaces with the minimal interface defect density. Exploiting these enhanced gate stack dielectrics, we attain the highest saturation current (526 μA/μm) of any MoS2 transistor reported to date, which is comparable to the same scaled state-of-the-art Si MOSFETs. At the same time, these devices also exhibit the impressive room-temperature mobility (63.7 cm2/V·s), on/off current ratio (>108) and near-ideal sub-threshold slope (SS = 65 mV/decade). Although Y2O3/HfO2/MoS2 structure improves the device performance greatly, the degradation in mobility is unavoidable. We then further utilize BN as dielectric layer to improve the mobility of top-gated MoS2 device. The mobility value is close to 100 cm2/V·s, Demonstration of all these suggests that the performance of few-layer MoS2 FETs can reach near intrinsic limits at room temperature along with the proper interface engineering and propose future directions to improve electrical characteristics in layered semiconductors.

Subthreshold transport in mono- and multilayered MoS2 FETs

The subthreshold transport properties in exfoliated MoS2 FETs are reported. The temperature dependence of subthreshold characteristics in multilayered MoS2 FETs behaves in the same way as that of conventional semiconductors, while conductance fluctuations and random telegraphic signals in the subthreshold region of Ids–Vgs characteristics were observed much more frequently in monolayered FETs than in multilayered ones. This fact is understandable from the viewpoint of a three-dimensional to two-dimensional percolation transport process in MoS2 with defects, which should be located in the MoS2 layer or at the MoS2/SiO2 interface. Thus, it is suggested that few-layered MoS2 FETs are more viable for practical applications from the viewpoint of suppressing defect-induced current fluctuations.

Functionalization of transition metal dichalcogenides with metallic nanoparticles: implications for doping and gas-sensing.

Transition metal dichalcogenides (TMDs), belonging to the class of two-dimensional (2D) layered materials, have instigated a lot of interest in diverse application fields due to their unique electrical, mechanical, magnetic, and optical properties. Tuning the electrical properties of TMDs through charge transfer or doping is necessary for various optoelectronic applications. This paper presents the experimental investigation of the doping effect on TMDs, mainly focusing on molybdenum disulfide (MoS2), by metallic nanoparticles (NPs), exploring noble metals such as silver (Ag), palladium (Pd), and platinum (Pt) as well as the low workfunction metals such as scandium (Sc) and yttrium (Y) for the first time. The dependence of the doping behavior of MoS2 on the metal workfunction is demonstrated and it is shown that Pt nanoparticles can lead to as large as 137 V shift in threshold voltage of a back-gated monolayered MoS2 FET. Variation of the MoS2 FET transfer curves with the increase in the dose of NPs as well as the effect of the number of MoS2 layers on the doping characteristics are also discussed for the first time. Moreover, the doping effect on WSe2 is studied with the first demonstration of p-type doping using Pt NPs. Apart from doping, the use of metallic NP functionalized TMDs for gas sensing application is also demonstrated.

Multi-Layer MoS2 FET with Small Hysteresis by Using Atomic Layer Deposition Al2O3 as Gate Insulator

The speed of integrated circuits has become one of the key technical concerns in order to be able to improve the performance of microelectronics devices. A complex device structure and high cost process technology are required in order to increase the clock speed of a functional circuit built with conventional Sifield effect transistors (FETs), and the low electron mobility of amorphous Si (∼ 1c m 2 /V s) is undesirable for some applications in large area electronics. For example, the low mobility is a bottleneck that prevents fabricating active matrix liquid crystal displays (AMLCD) with high resolutions and high driving speeds. 1 Two-dimensionalmaterials,suchasgraphene,maybeabletoovercome some of the shortcomings presented by Si materials. Graphene has mobility on the order of 10,000 cm 2 /V ·s, but another property inherent to graphene is its zero band-gap, which introduces many technical challenges to realize reliable, high-performance devices. 2 Semiconducting transitional metal dichalcogenides (TMDs), such as molybdenum disulfide (MoS2), are two-dimensional materials similar to graphene, and they are considered to be potential replacement for amorphous Si. In MoS2, Mo and S atoms are strongly bonded with covalent bonds within each layer, while interlayer bonding is maintained via weak Van der Waals interactions. 3 In addition, MoS2 has a sizable band-gap, with an indirect band-gap of 1.2 eV for bulk material and a direct band-gap of 1.8 eV for a single-layer configuration. 3 This property of MoS2 leads to a low off-current when a MoS2 FET is fabricated. 4

Electrical Characteristics of Multilayer MoS2 Transistors at Real Operating Temperatures and Different Ambient Conditions

Two-dimensional (2D) materials have been giving a chance to advance high performance electronic technology for next generation nanoelectronics devices. Among 2D materials, molybdenum disulfide (MoS2) is drawing attention due to its relative large bandgap (1.3-1.8 eV) and the 50~200 cm2/V·S range of high carrier mobility at room temperature. In the few early report, multilayer MoS2 could have been much better than single-layer MoS2 because it has larger density of state (DOS) and helps to create multiple conducting channels by field effect, which will lead to boost the current drive of TFTs.At realistic operating temperatures, however, the carrier transport mechanism of these 2D layered MoS2 FETs has not yet been intensively explored for use in electronics. Therefore, we investigate carrier transport and the impact of the operating ambient conditions on back-gated multilayer MoS2 field-effect transistors with a thickness of ~50 nm at their realistic working temperatures and under different ambient conditions (in air and in a vacuum of ~10-5 Torr). Moreover, we examine the quality of the device interface and an energy distribution of carrier trapping/scattering sites through the low-frequency noise (LFN) measurement.A Schottky barrier of ~65 meV was formed between the Ti/Au metal contact and the MoS2 semiconductor and the barrier partially hindered the flow of carriers. However, when the operating temperature increased, the carriers easily overcame the barrier by thermionic emission at defects. This caused Imin to rise as shown in Fig. 1(a) and (b). However, at high VGS (blue region), the drain current decreased slightly as the operating temperatures increased. This is consistent with phonon scattering which is inversely proportional to the operating temperature.Fig. 2(a) shows that VTH shifts toward the negative direction as the temperature increases. This behavior is observed due to an increase in thermally generated carriers, resulting in a shift in the Fermi level in the semiconductor. Additionally, VTH was higher in air than in a vacuum. One possible explanation is that the oxygen and water molecules on the surface of MoS2 semiconductors could be adsorbed from the ambient air, and they could trap the charge carriers from the conduction band. This could make depleted channels and induce a positive threshold voltage shift. Also, the chemisorption on the MoS2 flake created defects and associated increased scattering which causes a reduction in μeff , unlike in a vacuum (Fig. 2(b)). However, thick multilayer MoS2 was less affected by the ambient conditions, because the thickness of the MoS2 layers suppressed interactions with the underlying channel. This fact was also supported negligible effects of ambient conditions on interface quality as determined by sub-threshold slope values (Fig. 2(a)).In Fig. 3 (a), obtained exponent values (γ) from low-frequency noise analysis, 1/fγ, exhibited the increase of γ at low gate bias range due to active slow traps. And the slow traps were filled and thus γ decreased and saturated to near 1 (0.95) as VG increased. In addition, the Hooge’s parameter, αH , was extremely large in the subthreshold region and drastically decreased as the gate bias increased until it matched Vth . This result also supports that the amount of active traps which cause the carrier number fluctuation decreases more significantly below Vth since the increased gate bias fills traps; it agrees with the change of the exponent value aforementioned.It is also interesting fact that the Hooge’s parameter (measured in ambient conditions) during fully ON regime is on the order of 10-2. This value is comparable to that observed in single-layer MoS2 FETs measured under vacuum conditions. This result provides multilayer structures more robust than single-layer for the effect of surface adsorbates in air and is consistent with our previous statement mentioned above.

Field-Effect Doping of MoS2 Using a Solid Polymer Electrolyte

Transition metal dichalcogenides (TMDs) have been studied for their wide range of unique optical, electronic and mechanical properties.[1] Due to weak interlayer attraction, single layers of TMDs can be isolated by mechanical exfoliation. Some properties depend on the number of TMD layers. For example, as MoS2 is thinned from bulk to a monolayer, it changes from a 1.2 eV indirect band gap semiconductor to a 1.9 eV direct band gap semiconductor.[2]DFT calculations have shown that Li+ will form an ionic bond with the Mo in MoS2.[3] By applying an electrolyte containing Li+ to the MoS2 surface, ions can be driven by an applied field to the MoS2, yielding both electrostatic and electrochemical doping.Here, we fabricate a MoS2 FET device and drop-cast a solid polymer electrolyte (SPE) of polyethylene oxide (PEO) and LiClO4 onto the MoS2 surface. The device is top-gated by making contact to the surface of the electrolyte with a probe tip (Fig. 1 inset). Prior to the deposition of PEO:LiClO4, all devices show n-channel behavior when modulated by a backgate, regardless of MoS2 thickness. Devices with 2-3 layers of MoS2 (thickness measured with Raman spectroscopy) continue to show n-channel behavior with the electrolyte present, with an on/off ratio of 105. (Fig. 1) However, for devices with >10 layers of MoS2, p-channel behavior is observed, with an on/off ratio of ~100. (Fig. 2)The p-channel devices also show features at Vg = -8 V and Vg = 22 V, suggestive of electrochemical reactions between the MoS2 and the polymer electrolyte. Is it possible that these features are associated with the electrochemical reduction and oxidation of Li+. Because the features only appear in the data for devices with >10 layers, we propose that Li+ may be intercalating between layers of MoS2 and undergoing reversible redox reactions.Though both p- and n- channel devices show hysteresis, p-channel devices show two distinct states. After what appears to a forming step where the current increases to ~1 mA (Fig 2, Run 1), the threshold voltage shifts depending on the direction of the sweep. We define the threshold near 40 V as the “0” state and the threshold near 0 V as the “1” state. The state is set by the previous gate bias (i.e., it increases on the forward sweep to state “0” and decreases to state “1” on the reverse). Retention characteristics were tested by applying a bias (±25 V) to the topgate for 100 seconds, then removing the bias and measuring Id over time. The device retains state “0” for ~30 s and “1” for >1000 s (Fig. 3).We demonstrate for the first time the hysteretic response of an MoS2 FET with an SPE gate dielectric. Devices with >10 layers of MoS2 have a variable threshold that shifts depending on the previous gate bias. These devices may have application in novel ionic memory and steep subthreshold devices. Acknowledgements: This work was supported in part by the Center for Low Energy Systems Technology (LEAST), one of the six SRC STARnet Centers, sponsored by MARCO and DARPA.[1] Q. Wang, et al., Nature Nanotech, 7, p. 699-712, (2012)[2] B. Radisavljevic, et al., Nature Nanotech., 6, p. 147-150, (2011)[3] J. Chang, et al., arXiv, 1305.7162 (2013)