Monte Carlo Device Simulation Research Articles

Injected Current and Quantum Transmission Coefficient in Low Schottky Barriers: WKB and Airy Approaches

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> An exact solution of the quantum transmission coefficient has been obtained by using an Airy-transfer-matrix formalism to solve Schrödinger equation. The procedure is applied to the calculation of the transmission coefficient in reverse-biased low Schottky diodes. The barrier profiles are given by Monte Carlo device simulations. As compared to the exact calculation, results indicate that injected current is much exacerbated when considering Wentzel–Kramers–Brillouin (WKB) approach or when neglecting quantum mechanical reflections for energies over the potential barrier. However, WKB could reasonably predict the total current if properly modifying the model parameters. Influence of barrier lowering is also discussed. </para>

3D Monte-Carlo device simulations using an effective quantum potential including electron-electron interactions

Effective quantum potentials describe the physics of quantum-mechanical electron transport in semiconductors more than the classical Coulomb potential. An effective quantum potential was derived previously for the interaction of an electron with a barrier for use in particle-based Monte Carlo semiconductor device simulators. The method is based on a perturbation theory around thermodynamic equilibrium and leads to an effective potential scheme in which the size of the electron depends upon its energy and which is parameter-free. Here we extend the method to electron-electron interactions and show how the effective quantum potential can be evaluated efficiently in the context of many-body problems. The effective quantum potential was used in a three-dimensional Monte-Carlo device simulator for calculating the electron-electron and electron-barrier interactions. Simulation results for an SOI transistor are presented and illustrate how the effective quantum potential changes the characteristics compared to the classical potential.

On a simple and accurate quantum correction for Monte Carlo simulation

We investigate a quantum-correction method for Monte Carlo device simulation. The method consists of reproducing quantum mechanical density-gradient simulation by classical drift-diffusion simulation with modified effective oxide thickness and work function and using these modifications subsequently in Monte Carlo simulation. This approach is found to be highly accurate and can be used fully automatically in a technology computer-aided design (TCAD) workbench project. As an example, the methodology is applied to the Monte Carlo simulation of the on-current scaling in p- and n-type MOSFETs corresponding to a 65 nm node technology. In particular, it turns out that considering only the total threshold voltage shift still involves a significant difference to a Monte Carlo simulation based on the combined correction of oxide thickness and work function. Ultimately, this quantum correction permits to consider surface scattering as a combination of specular and diffusive scattering where the conservation of energy and parallel wave vector in the specular part takes stress-induced band structure modifications and hence the corresponding surface mobility changes on a physical basis into account.

A Quantum-Corrected Monte Carlo Study on Quasi-Ballistic Transport in Nanoscale MOSFETs

In this paper, the authors study a quasi-ballistic transport in nanoscale Si-MOSFETs based upon a quantum-corrected Monte Carlo device simulation to explore an ultimate device performance. It was found that, when a channel length becomes shorter than 30 nm, an average electron velocity at the source-end of the channel increases due to ballistic transport effects, and then, it approaches a ballistic limit in a sub-10-nm regime. Furthermore, the authors elucidated a physical mechanism creating an asymmetric momentum distribution function at the source-end of the channel and the influences of backscattering from the channel region. The authors also demonstrated that an electron injection velocity at a perfectly ballistic transport is independent of the channel length and corresponds well to a prediction from Natori's analytical model

Scaling of Bulk pMOSFETs: (110) Surface Orientation Versus Uniaxial Compressive Stress

Six-band kmiddotp Monte Carlo device simulation is used to estimate the drain current enhancements in (110) surface and in uniaxially compressively stressed bulk pMOSFETs for gate lengths down to 30 nm. Satisfactory agreement is found with measured long-channel mobility enhancements as a function of the channel direction for (110) surface orientation or as a function of stress. It turns out that the stress-induced current improvement becomes larger than for the unstrained-Si (110) surface orientation at stress levels above 1 GPa. Specifically, for a gate length of 45 nm, the on-current enhancement is 50% for 1.5 GPa compared to 35% for the favorable lang-110rang channel direction in a (110) pMOSFET

Joule heating and phonon transport in silicon MOSFETs

This work examines the generation of heat in silicon MOSFETs using self-consistent Monte Carlo device simulation with full electron bandstructure and a full phonon dispersion computed from the Adiabatic Bond Charge model. We devise an efficient algorithm for the inclusion of full phonon dispersion in order to account for anisotropy and details of heat transport with great accuracy. We compute the density-of-states (DOS) and the lattice thermal energy numerically and use them to generate maps of local temperatures in a representative small-channel MOSFET device. Our results show that most heat is dissipated in the form of optical g-type phonons in a small region in the drain, and that the heat flows in a preferred direction aligned with the flow of the electron current. We also show that the distribution of generated phonons in energy closely follows the phonon DOS.

Validity of the effective potential approach for the simulation of quantum confinement effects: A Monte-Carlo study

In the last years, different techniques have been proposed to include quantization effects in simulation of electron transport in nanoscale devices. The Effective Potential approach has been demonstrated as a possible correction method for describing these effects in Monte-Carlo device simulation. In this paper we discuss the numerical implementation and the actual ability of this approach to incorporating electrostatic quantum effects in the frame of an existing Monte-Carlo code (MONACO). A new methodology based on a Design-Of-Experiment is proposed for reproducing the Schrodinger-Poisson electron density profile. This original methodology allows to clearly highlight the validity limits of the Effective Potential correction for the description of quantization effects in a double-gate nMOSFET.

Stability of self-consistent Monte Carlo Simulations: effects of the grid size and of the coupling scheme

In this paper, the authors show that the grid spacing affects the stability of self-consistent Monte Carlo device simulations. An analytical model is derived to describe this effect. Guidelines for the choice of the grid size are provided, showing that, when the linear Poisson scheme is used, source/drain extensions with doping level as high as 10/sup 20/ cm/sup -3/ require grid spacing lower than 1 nm in order to have stable simulations. On the other hand, the nonlinear coupling scheme does not impose any constraint, provided that the time between two solutions of the Poisson equation is so long that each solution can be considered as a stationary solution of the Boltzmann transport equation.

Revised stability analysis of the nonlinear Poisson scheme in self-consistent Monte Carlo device simulations

In this paper, the stability of self-consistent Monte Carlo (MC) device simulations is revised by developing a model that extends the existing ones by accounting for the effect of a carrier diffusion. Both the linear and the nonlinear Poisson schemes have been considered. The analysis of the linear Poisson scheme reveals that, consistently with the available model, the time step between two Poisson solutions must be short compared to a factor proportional to the scattering rate. On the other hand, it has been found that, contrary to the available stability models, the nonlinear Poisson scheme requires long time steps in order to provide stable simulations. For this reason, the nonlinear scheme is advantageous when considering steady-state simulations. The model predictions have been verified by comparison with MC simulations implementing both schemes.

Monte Carlo Simulation of Implant Free InGaAs MOSFET

The performance potential of n-type implant free In0.25Ga0.75As MOSFETs with high-κ dielectric is investigated using ensemble Monte Carlo device simulations. The implant free MOSFET concept takes advantage of the high mobility in III-V materials to allow operation at very high speed and low power. A 100 nm gate length implant free In0.25Ga0.75As MOSFET with a layer structure derived from heterojunction transistors may deliver a drive current of 1800 A/m and transconductance up to 1342 mS/mm. This implant free transistor is then scaled in the both lateral and vertical dimensions to gate lengths of 70 and 50 nm. The scaled devices exhibit continuous improvement in the drive current up to 2600 A/m and 3259 A/m and transconductance of 2076 mS/mm and 3192 mS/mm, respectively. This demonstrates the excellent scaling potential of the implant free MOSFET concept.

Effect of interface roughness on silicon-on-insulator–metal-semiconductor field-effect transistor mobility and the device low-power high-frequency operation

We have developed a simulation model based on the solution of the Boltzmann transport equation (BTE) for modeling n-channel silicon-on-insulator (SOI) metal-semiconductor field-effect transistor (MESFETs) using the ensemble Monte Carlo device simulation technique. All relevant scattering mechanisms for the silicon material system have been included in the model. In addition to phonon scattering, to properly describe the operation of the SOI MESFET devices, in our theoretical model we have also included surface or interface-roughness scattering. Following Fischetti and Laux[J. Appl. Phys. 89, 1205 (2001)] we first model interface roughness as a real space scattering event, separated into specular and diffusive (isotropic) type of reflection from an ideal atomically flat interface. This model gives rise to low-field silicon electron mobility values in agreement with available experimental data. To further verify our mobility results, we also treat interface roughness as a boundary condition based on the Boltzmann-Fuch method. To examine the performance improvement of this device structure, in contrast to some previous studies, here we have simulated analogous SOI MESFET and SOI MOSFET devices. The results of these investigations suggest that the mobility of the SOI MOSFET device follows the experimental values and the mobility of the SOI MESFET is three to five times higher than that of the SOI MOSFET in the subthreshold and the on-state regime. These high mobility values suggest that this device structure is a promising candidate for low-power high-frequency applications.

QUANTUM AND COULOMB EFFECTS IN NANODEVICES

In state-of-the-art devices, it is well known that quantum and Coulomb effects play significant role on the device operation. In this paper, we demonstrate that a novel effective potential approach in conjunction with a Monte Carlo device simulation scheme can accurately capture the quantum-mechanical size quantization effects. We also demonstrate, via proper treatment of the short-range Coulomb interactions, that there will be significant variation in device design parameters for devices fabricated on the same chip due to the presence of unintentional dopant atoms at random locations within the channel.

Electrothermal Characteristics of Strained-Si MOSFETs in High-Current Operation

The electrothermal characteristics of strained-Si MOSFETs, operating in the high-current regime, have been studied using device simulation. The phonon mean-free-path of strained-Si devices in the presence of high electric fields is determined, based on fullband Monte Carlo device simulation. Strained-Si nMOS devices have higher bipolar current gain and impact ionization rates compared to bulk-Si nMOS devices due to the smaller energy bandgap and longer phonon mean-free-path. Even though strained-Si devices have self-heating problems due to the lower thermal conductivity of the buried SiGe layer, the devices can be used beneficially for electrostatic discharge protection devices to achieve lower holding voltage (V/sub h/) and higher second breakdown triggering current (I/sub t2/), compared to those of bulk-Si devices, owing to the high bipolar current gain and current uniformity.

Drain disturb during CHISEL programming of NOR flash EEPROMs-physical mechanisms and impact of technological parameters

The origin of drain disturb in NOR Flash EEPROM cells under channel initiated secondary electron (CHISEL) programming operation is identified. A comparative study of drain disturb under channel hot electron (CHE) and CHISEL operation is performed as a function of drain bias and temperature on bitcells having different floating gate length and junction depth. The disturb mechanism is shown to originate from band-to-band tunneling under CHISEL operation, unlike that under CHE operation that originates from source-drain leakage. The effect of technological parameters (channel doping and drain junction depth) on CHISEL drain disturb is studied for both the charge gain (erased cell) and charge loss (programmed cell) disturb modes. Fullband Monte Carlo device simulations are used to explain the experimental results. It is shown that methods for improving CHISEL programming performance (higher channel doping and/or lower drain junction depth or halo) increase drain disturb, which has to be carefully considered for efficient design of scaled cells.

Investigation of strained Si/SiGe devices by MC simulation

Transport in Si NMOSFETs with gate lengths from 48 to 23 nm is investigated by full-band Monte Carlo device simulation for three sets of devices: (I) unstrained Si control devices, (II) process matched strained Si devices, and (III) threshold voltage matched strained Si devices. While the process matched strained Si devices show the same performance improvement for all gate lengths, this is not the case for the threshold voltage matched devices for which the performance improvement degrades with shrinking gate length due to the heavier doping.

Role of multiple delta doping in PHEMTs scaled to sub-100 nm dimensions

Scaling of pseudomorphic high electron mobility transistors (PHEMTs) into deep sub-100 nm dimensions can dramatically improve their performance. However, the reduction in the channel carrier density of the scaled devices with a single delta doped layer (DDL) has a detrimental effect on the drain current and consequently on the power handling capability. The linearity of the scaled transistors also deteriorates. These negative aspects of the scaling can be compensated with an additional DDL introduced into the device structure. We employ Monte Carlo device simulations to study the effect of two possible placements of the second DDL on the performance of aggressively scaled PHEMTs. The placement of the second DDL below the channel increases the drive current and linearity but does not improve the transconductance. The placement of the second DDL above the original one increases the current and improves the transconductance by up to approximately 45% but does not improve linearity. In order to understand the breakdown limitations of the scaled devices both the impact ionization and the gate tunnelling currents are included in the Monte Carlo simulator and monitored in the simulations.

Evaluation of compact noise modeling for Si/SiGe HBTs based on hierarchical hydrodynamic noise simulation

The hierarchical hydrodynamic (HD) noise simulation model used in this work allows to generate a complete small-signal noise representation of the device under test. This new noise model based on full-band Monte-Carlo (MC) generated local noise sources in conjunction with transfer function fields is currently the most accurate Si/SiGe HBT noise simulation technique with tolerable CPU requirements. This new efficient numerical noise model is verified by full-band Monte-Carlo device simulations and compared to two well-known compact noise models, the thermodynamic and the SPICE model.

A new model for including discrete dopant ions into Monte Carlo simulations

A new method for including discrete dopants into Monte Carlo device simulation is presented. The method uses a molecular dynamics treatment of the electron-electron and electron-ion interaction that includes quantum mechanical effects via an effective potential. Modeling the positive ions with an effective potential results in an energy minimum of 50.7 meV at the positive ion, which correlates well to common donor energy levels in silicon. We find that the method produces the expected mobility reduction in the I/sub D/-V/sub G/ characteristics of thin SOI MOSFETs.

Self-Consistent Quantum Mechanical Monte Carlo MOSFET Device Simulation

We have developed a self-consistent quantum mechanical Monte Carlo device simulator that takes electron transport in quantized states into consideration. Two-dimensional quantized states in MOSFET channels are constructed from one-dimensional solutions of the Schrodinger equation at different positions along the channel, and the Schrodinger and Poisson equations are solved self-consistently in terms of electron concentration and electrostatic potential distribution. The channel electron concentration, velocity and drain currents are calculated with the one particle Monte Carlo approach incorporating the intra-valley acoustic phonon and inter-valley phonon scattering mechanisms. This simulator was applied to a 70 nm n-MOSFET transistor, and we found that current mostly flows through the lowest subband and transport is quasi-ballistic near the source junction. To quantitatively estimate the performance of advanced devices, we have developed an inversion carrier transport simulator based on a full-band model. Our simulation method enables us to evaluate device characteristics and analyze the transport properties of ultra-small MOSFETs.

Hot-electron induced MOSFET gate current simulation by coupled silicon/oxide Monte Carlo device simulation

Hot electron transport in MOS transistors is investigated by means of coupled silicon/oxide Monte Carlo (MC) simulation. First, a new MC simulator able to handle simultaneously different materials is developed. Then, the impact of oxide transport on the gate current ( I G) is analyzed comparing different injection models with experiments. It is shown that oxide transport plays an important role on I G when the gate voltage is below the drain voltage ( V GS< V DS). In this condition, coupled silicon/oxide simulation (C-SIOX) is needed to quantitatively assess I G. It is also shown that oxide scattering in the image force potential well does not significantly reduce I G. Moreover, we propose a new injection model that empirically accounts for oxide scattering and that provides the same I G of the C-SIOX model, but with the simulation of the silicon channel only, thus enabling a significant reduction of simulation time.