Monolithic Active Pixel Sensors Research Articles

Depleted fully monolithic active CMOS pixel sensors (DMAPS) in high resistivity 150 nm technology for LHC

Depleted monolithic CMOS11Complementary metal-oxide-semiconductor. active pixel sensors (DMAPS) have been developed to demonstrate their suitability as pixel detectors in the outer layers of the ATLAS Inner Tracker (ITk) pixel detector in the High-Luminosity Large Hadron Collider (HL-LHC). Two prototypes have been fabricated using a 150 nm CMOS technology on high resistivity (≥ 2 kΩcm) wafers. The chip size of 10 mm × 10 mm is similar to that of the current FE-I3 ATLAS pixel detector readout chip. One of the prototypes is used for detailed characterization of the sensor and analog front end circuitry of the DMAPS. The other one is a fully monolithic DMAPS, including fast readout digital logics that handle the required hit rate. To yield a strong homogeneous electric field within the sensor volume, back-side process of the wafer was tested. The prototypes were irradiated with X-rays up to a total ionization dose (TID) of 50 Mrad(SiO2) and with neutrons up to a 1 MeV neutron equivalent fluence of 1015 neq/cm2 to test non-ionizing energy loss (NIEL) effects. The analog front end circuitry maintained its performance after TID irradiation, and the hit efficiency at <10−7 noise occupancy was as high as 98.9% after NIEL irradiation.

The new inner tracking system for the ALICE upgrade at the LHC

ALICE, the CERN LHC experiment devoted to the study of the QGP (Quark–Gluon Plasma) properties, will undergo a comprehensive upgrade during the second long shutdown of the LHC (in 2019–2020)to enhance the capability for high precision measurements of rare processes at low transverse momenta ( p T ). One of the key elements of the upgrade strategy is the novel, high-resolution, ultra-light Inner Tracking System (ITS) consisting of seven concentric layers of Monolithic Active Pixel Sensors (MAPS) covering a total active area of 10 m 2 segmented in 12.5 Gpixels. This paper presents an overview of the detector components, the most relevant characterisation results and the status of the detector construction.

Implantable CMOS pixel sensor for positron imaging in rat brain

IMIC is a Monolithic Active Pixel Sensor prototype designed for the MAPSSIC project, which aims at developing wireless intracerebral probes dedicated to image positron-emitting source activity in the brain of awake and freely moving rats. Former experiments with the PIXSIC positron probe based on a passive sensor have validated the proof of concept, but have also shown limitations with regards to the probe robustness and to its transparency to annihilation photons. The IMIC circuit features a matrix of 16 × 128 active pixels of 30 × 50 µm2 size and targets to overcome the PIXSIC probe drawbacks by exploiting a thin sensitive layer of 18 µm, still featuring an overall thickness close to 300 µm. Additionally, by using a low power (55 nW/pixel) in-pixel front-end architecture providing binary output, IMIC solves the challenge of implanting an active sensor in tissues where overheating is forbidden.The needle-shaped sensor 610 µm × 12000 µm was fabricated and tested in laboratory. The whole sensor dissipates 160 µW and its imaging capabilities were asserted with various sources: 55Fe, 90Sr and 18F. These tests also demonstrated robust count-rate measurement with IMIC in the range 10–1000 counts/matrix/s. Finally, a dedicated setup qualitatively confirmed excellent in-sensitivity to 511 keV γ-rays.In this paper, we present the sensor requirements and its detailed design. We also discuss the first characterisation results and the outlook for the integration of IMIC into an implantable probe.

CMOS monolithic pixel sensors based on the column-drain architecture for the HL-LHC upgrade

Depleted Monolithic Active Pixel Sensors (DMAPS) constitute a promising low cost alternative for the outer layers of the ATLAS experiment Inner Tracker (ITk). Realizations in modern, high resistivity CMOS technologies enhance their radiation tolerance by achieving substantial depletion of the sensing volume. Two DMAPS prototypes that use the same "column-drain" readout architecture and are based on different sensor implementation concepts named LF-Monopix and TJ-Monopix have been developed for the High Luminosity upgrade of the Large Hardon Collider (HL-LHC). LF-Monopix was fabricated in the LFoundry 150 nm technology and features pixel size of $50x250~\mu m^{2}$ and large collection electrode opted for high radiation tolerance. Detection efficiency up to 99\% has been measured after irradiation to $1\cdot10^{15}~n_{eq}/cm^{2}$. TJ-Monopix is a large scale $(1x2~cm^{2})$ prototype featuring pixels of $36x40~\mu m^{2}$ size. It was fabricated in a novel TowerJazz 180 nm modified process that enables full depletion of the sensitive layer, while employing a small collection electrode that is less sensitive to crosstalk. The resulting small sensor capacitance ($<=3~fF$) is exploited by a compact, low power front end optimized to meet the 25ns timing requirement. Measurement results demonstrate the sensor performance in terms of Equivalent Noise Charge (ENC) $\approx11e^{-}$, threshold $\approx300~e^-$, threshold dispersion $\approx30~e^-$ and total power consumption lower than $120~mW/cm^2$.

Status of the vertex detector program of the CBM experiment at FAIR

The Compressed Baryonic Matter Experiment (CBM) is one of the core experiments of the future FAIR facility (Darmstadt/Germany). The fixed-target experiment will explore the phase diagram of strongly interacting matter in the regime of high net baryon densities with numerous rare probes. The Micro Vertex Detector (MVD) will determine the secondary decay vertex of open charm particles with $\sim 50~\rm \mu m$ precision, contribute to the background rejection in dielectron spectroscopy, and help to reconstruct neutral decay products of strange particles by means of missing mass identification. The MVD comprises four stations with 0.3 and $0.5\%~x/X_0$, which are placed between $5$ and $20~\rm cm$ downstream the target and inside vacuum. It will host highly-granular, next-generation Monolithic Active Pixel Sensors, with a spatial precision of $5\rm~\mu m$, a time resolution of $5 ~\rm \mu s$, and a peak rate capability of $\sim 700~\rm kHz/mm^2$. Moreover, a tolerance to $3\cdot10^{13}~\rm n_{eq}/cm^{2}$ and $\gtrsim 3~\rm Mrad$ are required. In this document, we summarize the status of sensor development, station prototyping, and the detector slow control.

OVERMOS — CMOS Hi-Res MAPS detectors for HEP applications

The OVERMOS project investigates the use of Monolithic Active Pixel Sensors, fabricated using a standard low voltage, high resistivity substrate 180 nm CMOS technology, for tracking and vertexing in HEP applications. Following a description of the main features of this CMOS technology, details will be given of the design of the OVERMOS test pixel structures, which include active pixels, with in-pixel RO electronics, and basic pixel arrays. Preliminary experimental results of fabricated test structures, which include charge collection, obtained using in-pixel laser injection, and comparison of performances before and after neutron irradiation will be shown. Results of 3D TCAD simulation related to charge collection and DC characteristics of the pixel structures will be also shown.

Model to predict the number of transistors in an asymmetrical priority Address-Encoder and Reset-Decoder readout circuit for monolithic active pixel sensors for high-energy physics

The digital circuit layout in the active pixel sensor usually occupies the remaining area of an analog circuit layout. Thus, the number of transistors in the readout circuit is an important factor that enables the size of the implementation area to be predicted, when the digital layout of the readout circuit is placed in the specific area. Therefore, the requirement of reducing implementation area of the monolithic active pixel sensor in high-energy physics experiment make it is important to find the optimal readout circuit structure with minimum number of transistors. This study utilizes arithmetic and geometric series to propose a model to predict the number of transistors based on the Karnaugh map of the priority Address-Encoder and Reset-Decoder readout circuit. The proposed prediction model can list all the probable architectures of the priority Address-Encoder and Reset-Decoder readout circuit. In addition, the model is able to highlight the structure that contains the minimum number of transistors, even when the bit-width of the input states of the basic blocks in every layer are different, instead of calculating the number of transistors based on the assumption that the bit-width of the input states of the basic block in every layer are same, like the traditional prediction model. A comparison of the results obtained with the Cadence post-layout simulation and FPGA implementation shows that the number of transistors calculated by the proposed model is of the same order of magnitude to that obtained from the Cadence post-layout simulation and FPGA implementation.

Irradiation study of a fully monolithic HV-CMOS pixel sensor design in AMS 180 nm

High-Voltage Monolithic Active Pixel Sensors (HV-MAPS) based on a 180 nm HV-CMOS process have been proposed to realize thin, fast and highly integrated pixel sensors. The MuPix7 prototype, fabricated in the commercial AMS H18 process, features a fully integrated on-chip readout, i.e. hit-digitization, zero suppression and data serialization. MuPix7 is the first fully monolithic HV-CMOS pixel sensor that has been tested for the use in high irradiation environments like HL-LHC. We present results from laboratory and test beam measurements of MuPix7 prototypes irradiated with neutrons (up to 5.0 × 1015 neq/cm2) and 24 GeV protons (up to 7.8 × 1015 protons/cm2) and compare the performance with non-irradiated sensors. At sensor temperatures of about 8 °C efficiencies of ≥90% at noise rates below 40 Hz per pixel are measured for fluences of up to 1.5 × 1015 neq/cm2. A time resolution better than 22 ns, expressed as Gaussian σ, is measured for all tested settings and sensors, even at the highest irradiation fluences. The data transmission at 1.25 Gbit/s and the on-chip PLL remain fully functional.

Monolithic CMOS sensors for high energy physics

Monolithic active pixel sensors manufactured in commercial CMOS technologies revolutionized imaging for consumer applications and are now moving into high energy physics: they have been adopted in the STAR and the ALICE experiments, and are being considered for the most demanding applications like the upgrade of the ATLAS pixel detector. These devices offer integration of sensor and readout in a single chip and low material budget. Deep submicron commercial CMOS technologies offer high speed and density, leading to high bandwidth capability and good spatial resolution for monolithic sensors, and volume production capability at low cost, important for large systems. This paper tries to give an overview.

Efficiency and timing performance of the MuPix7 high-voltage monolithic active pixel sensor

The MuPix7 is a prototype high voltage monolithic active pixel sensor with 103×80μm2 pixels thinned to 64 μm and incorporating the complete read-out circuitry including a 1.25 Gbit/s differential data link. Using data taken at the DESY electron test beam, we demonstrate an efficiency of 99.3 % and a time resolution of 14 ns. The efficiency and time resolution are studied with sub-pixel resolution and reproduced in simulations.

Characterization of a depleted monolithic pixel sensors in 150 nm CMOS technology for the ATLAS Inner Tracker upgrade

This work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150\,nm CMOS process. DMAPS exploit high voltage and/or high resistivity inclusion of modern CMOS technologies to achieve substantial depletion in the sensing volume. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade in 2025 for the High Luminosity Large Hadron Collider (HL-LHC). This type of devices has a lower production cost and lower material budget compared to presently used hybrid designs. In this work, the chip architecture will be described followed by the characterization of the different pre-amplifier and discriminator flavors with an external injection signal and an iron source (5.9\,keV x-rays).

MAPS sensor for radiation imaging designed in 180 nm SOI CMOS technology

In this work, we present a prototype of the Monolithic Active Pixel Sensor (MAPS) called X-CHIP-02 designed in 180 nm SOI CMOS technology. The selected technology has attractive features for fabrication of X-ray imaging sensors: 100 Ω⋅ cm handle wafer resistivity, thick epitaxial layer to suppress back-gate effect, support of high voltage devices and deep trench isolation. X-CHIP-02 has two pixel matrices with the pixel pitch of 50 μm and 100 μm with integrated 8-bit photon counting circuitry. Fine pitch SOI monolithic pixels imply small capacitance and thus small electronic noise of ≈50 e−. Design of the sensor chip and basic radiation imaging capabilities are described in this paper.

A Silicon-on-Insulator-Based Dual-Gain Charge-Sensitive Pixel Detector for Low-Noise X-ray Imaging for Future Astronomical Satellite Missions.

In this paper, we report on the development of a monolithic active pixel sensor for X-ray imaging using 0.2 µm fully depleted silicon-on-insulator (SOI)-based technology to support next generation astronomical satellite missions. Detail regarding low-noise dual-gain SOI based pixels with a charge sensitive amplifier and pinned depleted diode sensor structure is presented. The proposed multi-well sensor structure underneath the fully-depleted SOI allows the design of a detector with low node capacitance and high charge collection efficiency. Configurations for achieving very high charge-to-voltage conversion gain of 52 µV/e− and 187 µV/e− are demonstrated. Furthermore, in-pixel dual gain selection is used for low-noise and wide dynamic range X-ray energy detection. A technique to improve the noise performance by removing correlated system noise leads to an improvement in the spectroscopic performance of the measured X-ray energy. Taken together, the implemented chip has low dark current (44.8 pA/cm2 at −30 °C), improved noise performance (8.5 e− rms for high gain and 11.7 e− rms for low gain), and better energy resolution of 2.89% (171 eV FWHM) at 5.9 keV using 55Fe and 1.67% (234 eV FWHM) at 13.95 keV using 241Am.

TCAD simulation of a single Monolithic Active Pixel Sensors based on High Voltage CMOS technology

ABSTRACTA model of a High Voltage CMOS (HV-CMOS) Monolithic Active Pixel Sensor (MAPS) has been modelled using Technology Computer Aided Design (TCAD). The model has incorporated both the active region and the on-pixel readout circuits which were comprised of a source follower amplifier and an integrated charge amplifier. The simulation has examined the electrical characteristics and response output of a HV-CMOS MAPS sensor using typical dimensions, levels of doping in the structural layers and bias conditions for this sensor. The performance of two alternate designs of amplifier have been examined as a function of the operating parameters. The response of the sensor to the incidence of Minimum Ionizing Particles (MIPs) at different energies has been included in the model.

The STAR MAPS-based PiXeL detector

The PiXeL detector (PXL) for the Heavy Flavor Tracker (HFT) of the STAR experiment at RHIC is the first application of the state-of-the-art thin Monolithic Active Pixel Sensors (MAPS) technology in a collider environment. Custom built pixel sensors, their readout electronics and the detector mechanical structure are described in detail. Selected detector design aspects and production steps are presented. The detector operations during the three years of data taking (2014–2016) and the overall performance exceeding the design specifications are discussed in the conclusive sections of this paper.

Detailed measurements of shower properties in a high granularity digital electromagnetic calorimeter

The MAPS (Monolithic Active Pixel Sensors) prototype of the proposed ALICE Forward Calorimeter (FoCal) is the highest granularity electromagnetic calorimeter, with 39 million pixels with a size of 30 × 30 μm2. Particle showers can be studied with unprecedented detail with this prototype. Electromagnetic showers at energies between 2 GeV and 244 GeV have been studied and compared with GEANT4 simulations. Simulation models can be tested in more detail than ever before and the differences observed between FoCal data and GEANT4 simulations illustrate that improvements in electromagnetic models are still possible.

Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

Characterization of pixel sensor designed in 180 nm SOI CMOS technology

A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

The FoCal prototype—an extremely fine-grained electromagnetic calorimeter using CMOS pixel sensors

A prototype of a Si-W EM calorimeter was built with Monolithic Active Pixel Sensors as the active elements. With a pixel size of 30 μm it allows digital calorimetry, i.e. the particle's energy is determined by counting pixels, not by measuring the energy deposited. Although of modest size, with a width of only four Moliere radii, it has 39 million pixels. In this article the construction and tuning of the prototype is described. Results from beam tests are compared with predictions of GEANT-based Monte Carlo simulations. The shape of showers caused by electrons is shown in unprecedented detail. Results for energy and position resolution are also given.

Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.