Monolayer Transistors Research Articles

Will 2D Materials Play a Role in the Semiconductor Industry?

This talk will present my (biased) perspective on whether two-dimensional (2D) materials could play a role in the semiconductor industry. It is important to recognize that 2D materials are good for applications where their ultrathin nature gives them distinct advantages, such as flexible electronics [1] or light-weight solar cells [2]. They may not be good where conventional materials work sufficiently well, like transistors thicker than a few nanometers. I will focus on 2D materials for 3D heterogeneous integration of electronics, which has major advantages for energy-efficient computing [3]. Here, 2D materials could be monolayer transistors with ultralow leakage [4] (due to larger band gaps than silicon), used to access high-density memory [5]. Recent results from our group [6,7] and others [8] have shown monolayer transistors with good performance, which cannot be achieved with sub-nanometer thin conventional semiconductors, and the 2D performance could be further boosted by strain [9]. I will also describe some unconventional applications, using 2D materials as thermal insulators [10], heat spreaders [11], and thermal transistors [12]. These could enable control of heat in “thermal circuits” analogous with electrical circuits. Combined, these studies reveal fundamental limits and some key applications of 2D materials, which take advantage of their unique properties. Refs: [1] A. Daus et al., Nat. Elec. 4, 495 (2021). [2] K. Nassiri Nazif, et al., Nat. Comm. 12, 7034 (2021). [3] M. Aly et al., Computer 48, 24 (2015). [4] C. Bailey et al., EMC (2019). [5] A. Khan et al. Science 373, 1243 (2021). [6] C. English et al., IEDM, Dec 2016. [7] C. McClellan et al. ACS Nano 15, 1587 (2021). [8] S. Das et al., Nat. Elec. 4, 786 (2021). [9] I. Datye et al., Nano Lett. 22, 8052 (2022). [10] S. Vaziri et al., Science Adv. 5, eaax1325 (2019). [11] C. Koroglu & E. Pop, IEEE Elec. Dev. Lett. 44, 496 (2023). [12] M. Chen et al., 2D Mater. 8, 035055 (2021).

Low-voltage polymer monolayer transistors for high-gain unipolar and complementary logic inverters

Using thin AlOx as dielectrics, low-voltage polymer monolayer TFTs were attained with a SS of 86 mV dec−1. The resultant unipolar and complementary inverters exhibited high voltage gains of 251 V/V at VDD = −3 V and 841 V/V at VDD = 5 V.

Design and Process Co-Optimization of 2-D Monolayer Transistors via Machine Learning

Design and Process Co-Optimization of 2-D Monolayer Transistors via Machine Learning

Structural control of charge transport in polymer monolayer transistors by a thermodynamically assisted dip-coating strategy

A thermodynamically assisted strategy is developed to precisely control the growth rate of polymer aggregates in solution. The resulting polymer monolayer exhibits improved molecular order and doubled mobility in field-effect transistors.

High-throughput design of functional-engineered MXene transistors with low-resistive contacts

Two-dimensional material-based transistors are being extensively investigated for CMOS (complementary metal oxide semiconductor) technology extension; nevertheless, downscaling appears to be challenging owing to high metal-semiconductor contact resistance. Here, we propose a functional group-engineered monolayer transistor architecture that takes advantage of MXenes’ natural material chemistry to offer low-resistive contacts. We design an automated, high-throughput computational pipeline that first performs hybrid density functional theory-based calculations to find 16 sets of complementary transistor configurations by screening more than 23,000 materials from an MXene database and then conducts self-consistent quantum transport calculations to simulate their current-voltage characteristics for channel lengths ranging from 10 nm to 3 nm. Performance of these devices has been found to meet the requirements of the international roadmap for devices and systems (IRDS) for several benchmark metrics (on current, power dissipation, delay, and subthreshold swing). The proposed balanced-mode, functional-engineered MXene transistors may lead to a realistic solution for the sub-decananometer technology scaling by enabling doping-free intrinsically low contact resistance.

Reducing Contact Resistance and Boosting Device Performance of Monolayer MoS2 by In Situ Fe Doping.

2D semiconductors are emerging as plausible candidates for next-generation "More-than-Moore" nanoelectronics to tackle the scaling challenge of transistors. Wafer-scale 2D semiconductors, such as MoS2 and WS2 , have been successfully synthesized recently; nevertheless, the absence of effective doping technology fundamentally results in energy barriers and high contact resistances at the metal-semiconductor interfaces, and thus restrict their practical applications. Herein, a controllable doping strategy in centimeter-sized monolayer MoS2 films is developed to address this critical issue and boost the device performance. The ultralow contact resistance and perfect Ohmic contact with metal electrodes are uncovered in monolayer Fe-doped MoS2 , which deliver excellent device performance featured with ultrahigh electron mobility and outstanding on/off current ratio. Impurity scattering is suppressed significantly thanks to the ultralow electron effective mass and appropriate doping site. Particularly, unidirectionally aligned monolayer Fe-doped MoS2 domains are prepared on 2 in. commercial c-plane sapphire, suggesting the feasibility of synthesizing wafer-scale 2D single-crystal semiconductors with outstanding device performance. This work presents the potential of high-performance monolayer transistors and enables further device downscaling and extension of Moore's law.

Monolayer transistors at wafer scales

Monolayer transistors at wafer scales

Modulation of Microstructure and Charge Transport in Polymer Monolayer Transistors by Solution Aging

Main observation and conclusionA few monolayers of organic semiconductors adjacent to the dielectric layer are of vital importance in organic field‐effect transistors due to their dominant role in charge transport. In this report, the 2‐nm‐thick polymer monolayers based on poly(3‐hexylthiophene) with different molecular weights (Mn) were fabricated using dip‐coating technique. During the monolayer (solid state) formation from the solution, a disorder‐to‐order transition of polymer conformation is observed through UV‐vis absorption measurement. Meanwhile, high Mn polymer monolayer generates higher crystalline fibrillar microstructure than the low Mn one due to the stronger π–π intermolecular packing between polymers. More importantly, the solution aging procedure is utilized to further improve the morphology of polymer monolayers. It is obvious that after aging for 6 d, both fiber dimension and density as well as conjugation length are significantly increased under the same processing conditions in comparison to the fresh solution, and consequently the field‐effect mobilities are remarkably enhanced by 2—4 times. Note that the maximum mobility of 0.027 cm2·V–1·s–1 is among the highest reported values for poly(3‐hexylthiophene) monolayer transistors. These results demonstrate a simple but powerful strategy for boosting the device performance of polymer monolayer transistors.

Ultralow contact resistance between semimetal and monolayer semiconductors.

Advanced beyond-silicon electronic technology requires both channel materials and also ultralow-resistance contacts to be discovered1,2. Atomically thin two-dimensional semiconductors have great potential for realizing high-performance electronic devices1,3. However, owing to metal-induced gap states (MIGS)4-7, energy barriers at the metal-semiconductor interface-which fundamentally lead to high contact resistance and poor current-delivery capability-have constrained the improvement of two-dimensional semiconductor transistors so far2,8,9. Here we report ohmic contact between semimetallic bismuth and semiconducting monolayer transition metal dichalcogenides (TMDs) where the MIGS are sufficiently suppressed and degenerate states in the TMD are spontaneously formed in contact with bismuth. Through this approach, we achieve zero Schottky barrier height, a contact resistance of 123ohmmicrometres and an on-state current density of 1,135microampsper micrometre on monolayer MoS2; these two values are, to the best of our knowledge, the lowest and highest yet recorded, respectively. We also demonstrate that excellent ohmic contacts can be formed on various monolayer semiconductors, including MoS2, WS2 and WSe2. Our reported contact resistances are a substantial improvement for two-dimensional semiconductors, and approach the quantum limit. This technology unveils the potential of high-performance monolayer transistors that are on par with state-of-the-art three-dimensional semiconductors, enabling further device downscaling and extending Moore's law.

High-performance III-VI monolayer transistors for flexible devices.

Group III-VI family MX (M = Ga and In, and X = S, Se, and Te) monolayers have attracted global interest for their potential applications in electronic devices due to their unexpectedly high carrier mobility. Herein, via density functional theory calculations as well as ab initio quantum transport simulations, we investigated the performance limits of MX monolayer metal oxide semiconductor field-effect transistors (MOSFETs) at the sub-10 nm scale. Our results highlighted that the MX monolayers possessed good structural stability and mechanical isotropy with large ultimate strains and low Young's modulus, which are intensely anticipated in the next-generation flexible devices. More importantly, the MX monolayer MOSFETs show excellent device performance under optimal schemes. The on-state current, delay time, and power dissipation of the MX monolayer MOSFETs satisfy the International Technology Roadmap for Semiconductors (ITRS) 2013 requirements for high-performance devices. Interestingly, the sub-threshold swings were in a very low range from 68 mV dec-1 to 108 mV dec-1, which indicated the favorable gate control ability for fast switching. Therefore, we believe that our findings shed light on the design and application of MX monolayer-based MOSFETs in next-generation flexible electronic devices.

Analytical Monolayer MoS2 MOSFET Modeling Verified by First Principle Simulations

Device operations of the monolayer molybdenum disulfide (MoS2) based FETs are analyzed using first principle atomistic simulations, revealing the similarity of device operation in monolayer and Si transistors. Taylor expansion is employed on Si potential modeling framework, assuming an ultra-thin (delta function like) channel for MoS2 devices. The method accurately reproduces the gate control of the MoS2 FETs in both long channel and short channel transistors including the subthreshold characteristics. First principle simulations verify the developed model, suggesting that the monolayer MoS2 MOSFET can be modeled by extending Si MOSFET equations with incorporating material parameters.

Controlling the Microstructure of Conjugated Polymers in High‐Mobility Monolayer Transistors via the Dissolution Temperature

AbstractIt remains a challenge to precisely tailor the morphology of polymer monolayers to control charge transport. Herein, the effect of the dissolution temperature (Tdis) is investigated as a powerful strategy for morphology control. Low Tdis values cause extended polymer aggregation in solution and induce larger nanofibrils in a monolayer network with more pronounced π–π stacking. The field‐effect mobility of the corresponding monolayer transistors is significantly enhanced by a factor of four compared to devices obtained from high Tdis with a value approaching 1 cm2 V−1 s−1. Besides that, the solution kinetics reveal a higher growth rate of aggregates at low Tdis, and filtration experiments further confirm that the dependence of the fibril width in monolayers on Tdis is consistent with the aggregate size in solution. The generalizability of the Tdis effect on polymer aggregation is demonstrated using three other conjugated polymer systems. These results open new avenues for the precise control of polymer aggregation for high‐mobility monolayer transistors.

Controlling the Microstructure of Conjugated Polymers in High-Mobility Monolayer Transistors via the Dissolution Temperature.

It remains a challenge to precisely tailor the morphology of polymer monolayers to control charge transport. Herein, the effect of the dissolution temperature (T dis) is investigated as a powerful strategy for morphology control. Low T dis values cause extended polymer aggregation in solution and induce larger nanofibrils in a monolayer network with more pronounced π–π stacking. The field‐effect mobility of the corresponding monolayer transistors is significantly enhanced by a factor of four compared to devices obtained from high T dis with a value approaching 1 cm2 V−1 s−1. Besides that, the solution kinetics reveal a higher growth rate of aggregates at low T dis, and filtration experiments further confirm that the dependence of the fibril width in monolayers on T dis is consistent with the aggregate size in solution. The generalizability of the T dis effect on polymer aggregation is demonstrated using three other conjugated polymer systems. These results open new avenues for the precise control of polymer aggregation for high‐mobility monolayer transistors.

Wafer-Scale Fabrication of High-Performance n-Type Polymer Monolayer Transistors Using a Multi-Level Self-Assembly Strategy.

Wafer-scale fabrication of high-performance uniform organic electronic materials is of great challenge and has rarely been realized before. Previous large-scale fabrication methods always lead to different layer thickness and thereby poor film and device uniformity. Herein, the first demonstration of 4 in. wafer-scale, uniform, and high-performance n-type polymer monolayer films is reported, enabled by controlling the multi-level self-assembly process of conjugated polymers in solution. Since the self-assembly process happened in solution, the uniform 2D polymer monolayers can be facilely deposited on various substrates, and theoretically without size limitations. Polymer monolayer transistors exhibit high electron mobilities of up to 1.88 cm2 V-1 s-1 , which is among the highest in n-type monolayer organic transistors. This method allows to easily fabricate n-type conjugated polymers with wafer-scale, high uniformity, low contact resistance, and excellent transistor performance (better than the traditional spin-coating method). This work provides an effective strategy to prepare large-scale and uniform 2D polymer monolayers, which could enable the application of conjugated polymers for wafer-scale sophisticated electronics.

Two-dimensional plumbum-doped tin diselenide monolayer transistor with high on/off ratio

Doping can effectively regulate the electrical and optical properties of two-dimensional semiconductors. Here, we present high-quality Pb-doped SnSe2 monolayer exfoliated using a micromechanical cleavage method. X-ray photoelectron spectroscopy measurement demonstrates that Pb content of the doped sample is ∼3.6% and doping induces the downward shift of the Fermi level with respect to the pure SnSe2. Transmission electron microscopy characterization exhibits that Pb0.036Sn0.964Se2 nanosheets have a high-quality hexagonal symmetry structure and Pb element is uniformly distributed in the nanosheets. The current of the SnSe2 field effect transistors (FETs) was found to be very difficult to turn off due to the high electron density. The FETs based on the Pb0.036Sn0.964Se2 monolayer show n-type behavior with a high on/off ratio of 106 which is higher than any values of SnSe2 FETs reported at the moment. The estimated carrier concentration of Pb0.036Sn0.964Se2 is approximately six times lower than that of SnSe2. The results suggest that the method of reducing carrier concentration by doping to achieve high on/off ratio is effective, and Pb-doped SnSe2 monolayer has significant potential in future nanoelectronic and optoelectronic applications.

Synthesis of bilayer MoS2 and corresponding field effect characteristics

Two-dimensional transition-metal dichalcogenides such as MoS2 are promising materials for next-generation nano-electronic devices. The physical properties of MoS2 are determined by layer number according to the variation of band-gap. Here, we synthesize large-size bilayer-MoS2 with triangle and hexagonal nanosheets in one step by chemical vapor deposition, Monolayer and bilayer-MoS2 back-gate field effect transistors are also fabricated and the performance including mobility and on/off ratios are compared. The bilayer-MoS2 back-gate field effect transistor shows superior performance with field effect mobility of ∼21.27cm2V-1s-1, and Ion/Ioff ratio of ∼3.9×107.

Diketopyrrolopyrrole‐Based Semiconducting Polymer with Both Hydrophobic Alkyl and Hydrophilic Tetraethylene Glycol Chains for Monolayer Transistor and Sensing Application

AbstractFunctional field‐effect transistors (FETs) have received increasing attention in recent years. Herein, it is demonstrated that the incorporation of hydrophilic tetraethylene glycol (TEEG) chains into the diketopyrrolopyrrole (DPP)‐based semiconducting polymer (PDPP3T1) can facilitate the formation of polymeric monolayer at the air–water interface, and the resulting field‐effect transistors (FETs) show sensitive and selective response toward alcohol vapor. By using the Langmuir–Schaefer method, monolayer and ultrathin films from bilayer to five‐layer can be successfully prepared. Interestingly, nanopores with sizes of 50–100 nm are formed within the monolayer film, as observed by using atomic force microscopy. The monolayer FET exhibits relatively high hole mobilities up to 0.014 cm2 V−1 s−1, which is among the highest charge mobilities reported for ultrathin film FETs prepared with the Langmuir technique. Moreover, hole mobility increases with an increase in the thickness of the ultrathin film from monolayer to three‐layer, and it reaches 0.04 cm2 V−1 s−1 for three‐layer FETs. A variation of both on‐current and off‐current is detected for monolayer FET upon exposure to alcohol vapor. The monolayer FET displays ultrahigh sensitivity (down to 1 ppb) and good selectivity toward alcohol vapors, in particular ethanol vapor. This can be attributed to the synergetic effects of the hydrophilic TEEG chains in PDPP3T1 and the nanopores within the monolayers.

The effect of interface-induced structural properties of the pentacene accumulation layer on the threshold voltage: Pentacene monolayer transistors

The effect of pentacene/gate dielectric interface-induced structural properties of a pentacene monolayer (ML) close to the SiO2 gate dielectric on the threshold voltage in the field effect transistor (FET) and van der Pauw was addressed using atomic force microscopy and near edge X-ray absorption fine structure spectroscopy (NEXAFS). Our study reveals that large negative threshold voltage found in FET and van der Pauw devices is not closely correlated to the molecular orientation and the grain size of pentacene molecules in direct contact with the SiO2 gate dielectric. In concluding our finding, NEXAFS results in the ultrathin pentacene film within the carrier accumulation thickness regime, characterized by Debye length, were correlated to the magnitude of the threshold voltage from field effect devices. Our work motivates finding and visualizing interface-induced structural properties that are directly correlated to the magnitude of the threshold voltage.

Self-assembly and charge carrier transport of solution-processed conjugated polymer monolayers on dielectric surfaces with controlled sub-nanometer roughness.

In recent years organic field-effect transistors have received extensive attention, however, it is still a great challenge to fabricate monolayer-based devices of conjugated polymers. In this study, one single layer of poly(2,5-bis(3-alkylthiophen-2-yl)thieno[3,2-b]thiophene) is directly dip-coated, and its self-assembly is precisely tuned from nanofibers to granular aggregates by controlling the dielectric roughness on a sub-nanometer scale. The charge carrier transport of the monolayer transistor exhibits a strong dependence on the dielectric roughness, which is attributed to the roughness-induced effects of higher densities of grain boundaries and charge trapping sites as well as surface scattering. These results mark a great advance in the bottom-up fabrication of organic electronics.

Monolayer Field-Effect Transistors of Nonplanar Organic Semiconductors with Brickwork Arrangement.

Twisted hexabenzoperylenes (HBPs) that are equipped with four methoxyl groups and two alkyl chains self-assemble into lamellar semiconductors with an unusual brickwork arrangement of twisted π-faces. As a result of this brickwork arrangement, through a dip-coating process, these HBPs easily form one-molecule-thick nanosheets that behave as p-type organic semiconductors in monolayer transistors with field-effect mobility of up to 0.076 cm2 V−1 s−1.