Bipolar Transistor Model Research Articles

The Current Sharing Optimization of Paralleled IGBTs in a Power Module Tile Using a PSpice Frequency Dependent Impedance Model

A full circuit model of an insulated gate bipolar transistor (IGBT) power module tile is obtained using electro-magnetic analysis. A skin depth analysis on the copper and bonding wire interconnects shows that the commonly used low frequency RLC models are not adequate for power modules and reveals the necessity for a frequency dependent impedance. A method is adapted for the design of an f-dependent module tile design circuit for the first time. It is found that the importance of skin depth becomes vital especially for lower voltage ratings and faster edge rate devices as the Fourier transform becomes shifted towards higher frequencies. Analysis of the current sharing capability of the IGBTs as a function of the tile layout showed that an asymmetrical tile yields a faster response from the nearer IGBTs during inductive turn-off and an unbalanced sharing of the reverse recovery current during turn-on. A symmetric tile layout is developed. It is found that the faster current fall-time during turn-off is compensated by higher current tail oscillations thereby bringing no major improvement to the turn-off energy. During turn-on however, the reverse recovery and IGBT turn-on energy dissipation are equally distributed between the IGBTs. Simulating device imbalances also shows that threshold voltage variations have a significant effect on the current and energy sharing at turn-on whereas injection efficiency imbalances have a large influence on turn-off characteristics. The effect of device imbalances is found to decrease for a highly symmetric tile design. It is also shown that equally higher IGBT temperatures tend to improve current sharing so that IGBT module design emphasis should be placed rather on minimizing any differences in the IGBT junction temperatures. The model developed allows PSpice simulation of characteristics previously obtained only through measurements. The impact of the layout design on issues such as cross-talk, mutual inductance and ground bounce may be quickly and accurately assessed for an optimal current sharing capability.

Compact Large-Signal Shot-Noise Model for HBTs

A new description of the shot noise in HBTs is proposed that accounts for the correlation of the sources. It can easily be included in large-signal models, thus significantly improving the RF noise description. Common nonlinear bipolar transistor models thus far neglect the correlation, which deteriorates the model accuracy towards higher frequencies. It is shown that the collector delay in InGaP/GaAs HBTs dominates the shot noise correlation. Hence, the collector time-delay description of the large-signal model is capable of providing suitable noise correlation time constants. The model is verified against measurements of InGaP/GaAs HBTs with three different epitaxial layer designs.

Bipolar transistor with quantum well base

We report in this study the modeling of a heterostructure bipolar transistor (HBT) where the base is designed as a quantum well. The transistor structure consists of a base layer of GaAs that is heavily p-type doped. The 0.024μm base is sandwiched between wide band gap InxGa1−xP which composes the n-type emitter and collector layers immediately adjacent to the base. The thickness of the base was chosen so that it is comparable to the wavelength of the electrons passing though it. There are two heavily doped cap layers of InGaAs at the emitter contact. The remainder of the emitter and collector regions are composed of GaAs. The purpose of this design is to filter the energies and velocities of electrons as they pass through the base region that forms a quantum barrier to electrons and a quantum well to holes. This should result in a significant decrease of noise in comparison to that observed in non-quantum base HBTs. As expected, the thin quantum well improves the collection of injected carriers, which in turn boosts the DC gain (β) to 750 and increases the power of the novel transistor by a factor of six, in comparison to a commercially available HBT with a similar non-quantum well structure. At high frequencies, the gain of the device is increased by about 5dB over the non-quantum base HBT that this device is based upon. Additionally, the cutoff frequency is improved from 20 to 50GHz. Modeling of the novel transistor was done using Silvaco ATLAS™. This study will continue with the fabrication of experimental wafers.

Fully Functional Nonlinear Table-Based HBT Model With Explicit Thermal Feedback

A fully functional table-based nonlinear model of the heterojunction bipolar transistor (HBT) is presented which includes explicit thermal feedback. The model uses four table-based nonlinear functions: I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> , Q <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> , V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">be</sub> , and Q <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">b</sub> , all defined versus I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">b</sub> and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ce</sub> by using a nonuniform bias grid. Thermal modeling (self-biasing and environment temperature dependence, T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">a</sub> ) is done by linearly mapping the table-based current functions versus T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">a</sub> coupled with explicit thermal feedback. Four table-based nonlinear coefficients are required to accurately predict the device behavior versus temperature. Excellent results have been obtained under dc, small, and large signal excitations for InGaP/GaAs HBTs in the range 10degC to 110degC.

Experience with bipolar front-end amplifiers and perspectives for LHC upgrade

The paper presents detailed noise analysis of detector front-end circuits employing bipolar transistors. The noise models of bipolar transistors are reviewed. Noise analysis of the front-end circuit is performed taking into account noise correlation effects in bipolar transistors. The obtained results on the equivalent noise charge are compared with the measurements performed for the front-end circuit used in the SCTA ASIC. The elaborated formalism of noise analysis is used for the evaluation of noise performance of a front-end circuit employing SiGe heterojunction bipolar transistors.

Small-Signal Modeling of SiGe HBTs Using Direct Parameter-Extraction Method

A simple and accurate parameter-extraction method of a high-frequency small-signal SiGe heterojunction bipolar transistor model is proposed in this paper. It was found that, without taking the intrinsic circuit elements into account, the conductance of the substrate network will be underestimated, while the susceptance of the substrate network will be overestimated. Therefore, a new extraction technique of the substrate-network parameters was developed, which has taken the intrinsic circuit elements into consideration. Transforming the intrinsic equivalent circuit into its common-collector configuration, all the intrinsic circuit elements are extracted directly from the measured S-parameters without any numerical optimization. Two formulas used to determine the intrinsic base resistance are presented, which is followed by an accuracy-improvement procedure to achieve a better accuracy of the extraction results. Simplified formulas to determine the base-emitter resistance, base-emitter capacitance, transconductance, and excess phase delay are also presented. The proposed method is validated with SiGe HBTs fabricated with a 0.35-mum BiCMOS technology from 1 to 30 GHz. The agreements between the measured and modeled data are excellent in the desired frequency range over a wide range of bias points

Investigation of thermal effects on the single-finger heterojunction bipolar transistors

We will first derive a physics-based, analytical single-finger heterojunction bipolar transistor (HBT) model which takes into account the thermal effect. Next, the model is used to calculate the three figures of merit of HBT, i.e., current gain, cut-off frequency and maximum frequency. Their variation against the collector current density under the influence of thermal effect is presented and the calculation results are discussed.

Efficient optimization of InGaAs and SiGe RF HBTs with a mixed-mode genetic-algorithm technique

An efficient genetic-algorithm-based (GA-based) technique for modeling and analysis of RF heterojunction bipolar transistors (HBTs) has been successfully established. This mixed-mode optimization method focuses on complementing the GA with a set of generalized analytic-modeling equations (GAMEs), requiring no special assumptions, to effectively extract small-signal parameters. Over a wide range of biasing conditions, consistent results between the GA-derived and measured S-parameters on the pnp InGaAs collector-up HBT as well as npn SiGe HBTs, which can be used in small high-power amplifiers for mobile communication systems, clearly demonstrate the superiority of the proposed approach.

Improved VBIC model for SiGe HBTs with an unified model of heterojunction barrier effects

An improved bipolar transistor model considering heterojunction barrier effect (HBE) in SiGe double heterojunction bipolar transistors is developed. The effect of barrier formation due to high level injection, which is related to the rapid degradations of the dc current gain (/spl beta/) and cutoff frequency (f/sub T/), is carefully investigated and analyzed. As the collector current becomes high, the conduction band barrier is induced and increased. It causes the saturation of collector current (J/sub C/) due to the blocking of carrier transport, the sharp increase of base transit time (/spl tau//sub B/) due to the additional charge storage, the increase of base current (J/sub B/) due to the increased recombination, and the decrease of intrinsic base resistance (R/sub bi/) due to the increased charge and base pushout. Those phenomena are included into a vertical bipolar intercompany model (VBIC) compact model by employing a unified model of the HBE on J/sub C/, J/sub B/, /spl tau//sub B/, and R/sub bi/. Furthermore, portions of /spl tau//sub B/ and R/sub bi/ from the Kirk effect itself are modeled according to the high current model description and the new formulation of widened base, respectively. A full extraction of parameters has been performed and the modified VBIC model is applied. The modeling accuracy is significantly improved at the high current region for the dc and RF characteristics.

Two-step parameter extraction procedure with formal optimization for physics-based circuit simulator IGBT and p-i-n diode models

A practical and accurate parameter extraction method is presented for the Fourier-based-solution physics-based insulated gate bipolar transistor (IGBT) and power diode models. The goal is to obtain a model accurate enough to allow switching loss prediction under a variety of operating conditions. In the first step of the extraction procedure, only one simple clamped inductive load test is needed for the extraction of the six parameters required for the diode model and of the 12 and 15 parameters required for the nonpunch-through (NPT) and punch-through (PT) IGBT models, respectively. The second part of the extraction procedure is an automated formal optimization step that refines the parameter estimation. Validation with experimental results from various structures of IGBT demonstrates the accuracy of the proposed IGBT and diode models and the robustness of the parameter extraction method.

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part II: parameter extraction and experimental results

A compact bipolar transistor model was presented in Part I that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM but at the same time, from a computational point of view, suitable for simulating large circuits. In Part II, a parameter determination procedure is described and demonstrated for a variety of SiGe process technologies.

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part I: model formulation

A compact bipolar transistor model is presented that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM and at the same time, from a computational point of view, suitable for simulating large circuits. The new model has been implemented in Verilog-A and, as compiled code, in various commercial circuit simulators. In Part I, the fundamental model formulation is presented along with a derivation of the most important equations. Experimental results are shown in Part II.

Analyses of delta-doped emitter bipolar transistor

In this article, the theoretical model of delta-doped emitter bipolar transistor that included the effect of bandgap shrinkage is presented. The recombination in emitter set-back layer is also considered. We also present the calculated results for the current gain as a function of barrier height, barrier width, and emitter set-back layer thickness. The experimental results of the device are also given.

Prediction of SOI single-event effects using a simple physics-based SPICE model

Expensive and time-consuming three-dimensional (3-D) simulations have been previously employed to characterize single-event upsets of integrated circuits. This paper outlines a more practical engineering approach to SOI single-event effects modeling that involves simple closed-form one-dimensional (1-D) solutions to the carrier transport equations. Using Fourier analysis, the transport equations have direct 1-D closed form solutions for conditions. One-dimensional numerical solutions are also obtained for conditions (i.e., when the excess injected carrier concentration exceeds the background doping), including other nonlinearities such as the dependence of mobility on both the background concentrations and excess carrier concentrations. The 1-D equations for low injection are reasonable approximations for high injection in n-type material, but not for high injection in p-type material. However, a simple 1-D equation can still be used for high injection in p-type material. The 1-D equations are used with existing simple SPICE models, including models for the parasitic bipolar transistors. The 1-D model agrees well with predictions from 2-D and 3-D simulations. A circuit cell layout can be broken into various regions with differing SEU sensitivities, each with its own characterizing 1-D equation. This simple method leads to a theoretical prediction of cross-sectional area versus upset linear energy transfer (LET) that is in good agreement with experimental heavy ion SEU data for an SRAM. The method also accounts for strike angles in three dimensions.

Validation of an extended hydrodynamic model for a submicron npn bipolar junction transistor

Transport phenomena in a submicron npn silicon bipolar junction transistor are described by using an 8-moment model for the electrons, combined with a solution of the drift–diffusion model for the holes. The validity of the constitutive equations for the fluxes and the production terms, obtained by means of the maximum entropy principle, and the hyperbolicity conditions are checked with direct simulation Monte Carlo. We verify numerically that the quadratic closure is more accurate with respect to the zero-order one, but some irregularities can appear in the solution due to the loss of hyperbolicity in some regions of the device.

BJT class-F power amplifier near transition frequency

This paper presents the analysis and the design rules of bipolar junction transistor (BJT) class-F power amplifier operating at a frequency comparable with the transition one. Since the impulse of collector current becomes stretched with operation frequency increasing, its spectral content is changed. Thus, the requirements for the amplifier's output network and bias conditions should be corrected compared with the classic low-frequency case in order to achieve high-efficiency class-F operation. Using the simple BJT model, these new requirements were obtained in this paper. The presented results of simulation and experimental verification show the advantages of proposed approach.

A Novel Approach for Parameter Determination of HBT Small-Signal Equivalent Circuit

Direct parameter extraction is believed to be the most accurate method for equivalent-circuits modeling of heterojunction bipolar transistors (HBT's). Using this method, the parasitic elements, followed by the intrinsic elements, are determined analytically. Therefore, the quality of the extrinsic elements extraction plays an important role in the accuracy and robustness of the entire extraction algorithm. This study proposes a novel extraction method for the extrinsic elements, which have been proven to be strongly correlated with the intrinsic elements. By utilizing the specific correlation, the equivalent circuit modeling is reduced to an optimization problem of determining six specific extrinsic elements. Converting the intrinsic equivalent circuit into its common-collector configuration, all intrinsic circuit elements are extracted using exact closed-form equations for both the hybrid-π and the T-topology equivalent circuits. Additionally, a general explicit equation on the total extrinsic elements is derived, subsequently reducing the number of optimization variables. The modeling results are presented, showing that the proposed method can yield a good fit between the measured and calculated S parameters.

High-Frequency Circuit Design Oriented Compact Bipolar Transistor Modeling with HICUM

SUMMARY An overview on the physics and circuit design oriented background of the advanced compact model HICUM is presented. Related topics such as the approach employed for geometry scaling and parameter extraction are briefly discussed. A model hierarchy is introduced, that addresses a variety of requirements encountered during the increasingly complicated task of designing analog and high-frequency circuits.

Enhanced high-current VBIC model

The widely used vertical bipolar inter-company (VBIC) model for bipolar junction transistor-heterojunction bipolar transistors (HBTs) was modified to incorporate high-current effects. The modified VBIC model keeps all features of the original model and adds new features such as mobile carrier modulation of the base-collector capacitance, high-current Kirk effects, high-current reverse emitter-base injection, and current dependence of the reverse transit time in HBTs. The new model accurately fits the dc I-V characteristics, the bias-dependent transit-time, and S-parameters at active and quasi-saturation region biases. It is shown that the new formulation accurately models the strong current dependence of f/sub t/ and G/sub max/ over a wide range of biases. It also predicts very well the power performance in class-AB operation and at the loading for maximum power-added efficiency and maximum output power. The model also shows good fitting of two-tone linearity characteristics when simulated with the same fundamental and harmonic load conditions as in the measurements.

The Ebers–Moll model for magnetic bipolar transistors

The equivalent electrical circuit of the Ebers–Moll-type is introduced for magnetic bipolar transistors. In addition to conventional diodes and current sources, the new circuit comprises two novel elements due to spin-charge coupling. A classification scheme of the operating modes of magnetic bipolar transistors in the low bias regime is presented.