Minority Carrier Lifetime Values Research Articles

Tuning of interface quality of Al/CeO2/Si device by post-annealing of sol-gel grown high-k CeO2 layers

A comprehensive study has been done on the influence of post-deposition annealing temperature on high-k cerium oxide (CeO2) layer grown on n-type silicon (Si) substrate and its resultant interface states have been studied for Al/CeO2/Si metal-oxide-semiconductor (MOS) devices. The high-k CeO2 thin films were deposited by spin-coating and sintered at different annealing temperatures (Ta) in the range of 400–900 °C. The parameters such as fixed charge density (Qeff), dielectric constant (k) of the layers, flat-band voltage (VFB), interface defect density (Dit), etc., of the MOS device were evaluated from CV and I-V measurements. A minimum value of flat band shift (∼0.05 V) with lower Qeff (−4.81 × 1011 C/cm2) have been achieved for the Ta of 600 °C. The k and Dit were evaluated to be 22 and 1.29 × 1012 cm−2, respectively at the Ta of 600 °C. In addition, the CV measurements showed a very small hysteresis and very low frequency dispersion for the Ta of 600 °C sample. Energy distribution of defect states was evaluated and it was maximum towards the bottom of the conduction band. This shows that the 600 °C is the optimum annealing temperature, which results in high quality interface, and the electron affinity of the corresponding CeO2 layers was found to be 3.29 eV as evaluated from ultraviolet photoelectron spectroscopy (UPS). Further, a maximum value of minority carrier lifetime (147 μs) has been achieved for the samples annealed at Ta of 400 °C, indicating that the post-annealing temperature plays a significant role on the properties of CeO2 films deposited by sol-gel process. Thus, the present study demonstrates the possibility of sol-gel grown high k-CeO2 layers suitable for MOS like devices.

Evaluation of thermally activated defects behaviors in nitrogen-doped Czochralski silicon single crystals using deep level transient spectroscopy

Thermally activated defect behaviors in nitrogen (N)-doped Czochralski silicon (Cz-Si) single crystals were investigated using deep level transient spectroscopy and quasi-steady-state photoconductance to confirm the crystals’ applicability in insulated gate bipolar transistors (IGBTs). The thermally activated defects, which were probably N-vacancy complexes and degraded the minority carrier lifetime, were detected with extremely low densities in N-doped Cz-Si compared with N-rich floating zone Si single crystals after heat treatments at 500 °C, resulting in a high remaining value of minority carrier lifetime. The difference was assumed to come from whether vacancies were released in the Si matrix during heat treatment. For the Cz-Si, vacancies were assumed to be strongly bound with oxygen atoms with concentrations of 1017 atoms cm−3. Therefore, vacancies were not released during heat treatment, resulting in low remaining N-vacancy complex densities. N-doped Cz-Si are potential materials for IGBTs because of their low densities from thermally activated defects.

Characterization of light induced degradation in PECVD silicon nitride passivated Cz silicon wafers using spectroscopic techniques

In this work we investigate the chemical species involved in the light induced degradation of plasma enhanced chemical vapor deposited (PECVD) hydrogenated silicon nitride (SiNx:H) passivated p-type and n-type samples under normal outdoor ambient conditions. The electrical characterization measurements along with Fourier Transform Infrared (FTIR) and photoluminescence (PL) spectroscopic techniques were utilized in this study. Significant reduction in effective minority carrier lifetime values and band to band PL intensities were noticed for both p-type and n-type samples after outdoor light soaking. The apparent defect density increased from 3.39 × 10−3 µs−1 to 1.68 × 10−2 µs−1 and 3.42 × 10−4 µs−1 to 3.46 × 10−3 µs−1, respectively for p-type and n-type samples after light soaking of 111 h corresponding to cumulative solar insolation of 95.7 kWh/m2. The changes in FTIR absorbance intensities of chemical species such as SiNyHa, SiNzHb, SiHm, SiO2i and SiOn after light soaking confirmed the role of oxygen in addition to hydrogen in both p-type and n-type samples. Spectroscopic PL analysis further validated the decrease in concentration of silicon-oxygen species and reduction in effective lifetime for n-type samples. We demonstrate that the chemical species contributing to light induced bulk and surface degradation can be identified by FTIR and PL spectroscopic techniques. This work would be beneficial for understanding, modeling and mitigating the degradation mechanisms in Cz silicon wafers passivated using PECVD dielectric films.

Effect of film stress on different electrical properties of PECVD grown SiNx films and its bilayer structures: A study of Si surface passivation strategy

The prevalence of stress during thin film deposition has a substantial influence on the surface passivation of CMOS image sensors (CIS). Our present research thoroughly addresses the effect of film stress on minority carrier lifetime and interface trap density (Dit) of as-deposited and forming gas annealed (FGA, 5% H2, 400 °C for 30 min) SiNx films and their bilayer structures. In this study, plasma-enhanced chemical vapor deposition (PECVD) and atomic layer deposition (ALD) techniques were utilized to synthesize SiNx and SiNx/(top) Al2O3 bilayer structures. After FGA, the minority carrier lifetime and Dit values for 50 nm-SiNx (1607 μs, 7 × 1011 cm−2eV−1), 30 nm-Al2O3 (2670 μs, 7 × 1011 cm−2eV−1), 7 nm-SiNx/30 nm-Al2O3 (1750 μs, 6 × 1011 cm−2eV−1) and 50 nm-SiNx/30 nm-Al2O3 (2300 μs, 34 × 1011 cm−2eV−1) were found. Our statistical analysis indicates that the stress in the SiNx/Al2O3 bilayer structures introduces defects in the films. This affects the carrier lifetime along with Dit values and hence degrades CIS performance. Further, we also performed a stress simulation of SiNx films which corroborated with the overall analysis. We hope that this work facilitates a better understanding of the stress effect on the surface passivation of CIS applications.

Sb2(S1−xSex)3 solar cells: the impact of radiative and non-radiative loss mechanisms

The compound Sb2(S1−xSex)3 has recently attracted a great deal of attention from the scientific community for solar cell applications. However, Sb2(S1−xSex)3 inorganic solar cell efficiencies are still limited to values lower than 7%, further studies contributing to a better understanding of the limiting factors behind this technology being necessary. In particular, no theoretical works on Sb2(S1−xSex)3 solar cell modeling have been previously reported. In this work, we present results on Sb2(S1−xSex)3 solar cell modeling under the radiative and non-radiative limits for the first time, where our results are compared to experimental reported data. First, the impact of different Se/(S + Se) compositional ratios and absorber thicknesses on Sb2(S1−xSex)3 solar cell parameters under the radiative limit is studied, demonstrating that an efficiency of 29% can be achieved under Se/(S + Se) compositional ratios in the range of 0.34–0.48 for Sb2(S1−xSex)3 thicknesses higher than 1.5 µm. Furthermore, the impact of different linearly graded band-gaps and a notch-shape configuration of grading are evaluated. In addition, the role of different Sb2(S1−xSex)3 minority carrier lifetime values on solar cells is estimated, demonstrating that for absorbers described by minority carrier lifetime values about 10−9 s, it would be better to fabricate Sb2(S1−xSex)3 solar cells with Se/(S + Se) compositional ratios lower than 0.4. Finally, the influence of low illumination intensity values is presented and discussed.

MBE growth of high quality HgCdSe on GaSb substrates

This paper demonstrates MBE growth of high quality HgCdSe infrared materials on GaSb (211)B substrates. The as-grown Hg1−xCdxSe samples have a range of x-values (x = 0.37–0.18) and cut-off wavelengths (λc = 3.9–10.4 μm at 80 K), and show typical n-type semiconductor behaviour. At a measurement temperature of 80 K, the as-grown HgCdSe samples with x = 0.18 present a cut-off wavelength of 10.4 μm, an electron mobility as high as 1.3 × 105 cm2 V−1 s−1, a background electron concentration as low as 1.6 × 1016 cm−3, and a minority carrier lifetime as long as 2.2 μs. These values of electron mobility and minority carrier lifetime represent a significant improvement on previous studies of MBE-grown HgCdSe reported in the open literature, and are comparable to those of corresponding HgCdTe materials grown on lattice-matched CdZnTe substrates. This high material quality is primarily due to the nearly lattice-matched epitaxial growth of HgCdSe on GaSb, as well as an optimised growth temperature. These preliminary results indicate that HgCdSe materials grown on GaSb can meet the basic material quality requirements for the fabrication of high performance infrared detectors, although further effort is required in order to reduce the background electron concentration to <1015 cm−3. Furthermore, even higher quality HgCdSe materials on GaSb are expected by further optimization of the growth conditions, using higher purity Se source material, and implementing post-growth thermal annealing in a Se environment. The results of this study demonstrate the great potential of HgCdSe infrared materials grown on large-area commercially-available substrates for meeting the requirements of next generation infrared imaging focal plane arrays with features of lower cost and larger array format size.

ZnO thin film and porous silicon co-gettering of impurities in multicrystalline silicon through a VTP process

In this study, a novel zinc oxide and porous silicon co-gettering experiment has been applied as a beneficial approach to improve the electrical properties of low quality multicrystalline silicon substrates (mc-Si). We investigated the combined effect of ZnO and porous silicon (ZnO/PS) to enhance the gettering process efficiency. A systematic comparison has been carried out between two different routes of annealing after coating the front surface with zinc oxide thin film. The first one consists of a one step annealing (classic annealing) and the second consists in subjecting the samples to a variable annealing temperature process (VTP) using two steps, starting by the precipitate temperature at Tp = 1000 °C followed consecutively by a gettering temperature at Tg = 850 °C for different durations. Obtained results show that the Zn-gettering processes via the classic annealing process allow a significant improvement of the substrate quality. Nonetheless, highest values of the effective minority carrier lifetime exceeding 508 µs were obtained after using VTP annealing. Zn-gettering was investigated and found to have a crucial effect on the recombination activities mainly into the grain boundaries. Obtained results showed a significant enhancement of the gettered multicrystalline silicon electrical properties, resulting after the high increase of the effective minority carrier lifetime from 5 to 508 µs and the increase of the Hall mobility from 72 to 193 cm2 V− 1 s− 1. These enhancements have been further confirmed with the internal quantum efficiency (IQE) measurements. Thus, it is inferred that the applied co-gettering experiment has a synergetic effect to improve the electrical properties of the mc-Si substrates. The morphological structure of silicon was signed out by the Field emission scanning electron microscopy (FESEM).

Dissolution of Oxygen Precipitate Nuclei in n-Type CZ-Si Wafers to Improve Their Material Quality: Experimental Results

We present experimental results which show that oxygen-related precipitate nuclei (OPN) present in p-doped, n-type, Czochralski wafers can be dissolved using a flash-annealing process, yielding very high quality wafers for high-efficiency solar cells. Flash annealing consists of heating a wafer in an optical furnace to temperature between 1150 and 1250 °C for a short time. This process produces a large increase in the minority carrier lifetime (MCLT) and homogenizes each wafer. We have tested wafers from different axial locations of two ingots. All wafers reach nearly the same high value of MCLT. The OPN dissolution is confirmed by oxygen analysis using Fourier transform infrared spectra and injection-level dependence of MCLT.

The role of buffer/kesterite interface recombination and minority carrier lifetime on kesterite thin film solar cells

This paper presents for the first time a theoretical study of the impact of kesterite/buffer interface recombination and kesterite minority carrier lifetime on both CZTS and CZTSe solar cells. It demonstrates that only an 11% efficiency can be reached in CZTS solar cells by improving absorber crystalline quality, pointing out the need for an improved CdS/CZTS interface. It further demonstrates that a CZTS solar cell efficiency enhancement of up to 18%, with an open-circuit voltage value of up to 918 mV, can be achieved depending on CZTS minority carrier lifetime and CdS/CZTS interface recombination speed values. Moreover, this paper shows that by improving CZTSe crystalline quality, a record efficiency value of 17% could be achieved without focusing on improving CdS/CZTSe interface quality. Consequently, CZTSe is presented as a better candidate for solar cell applications. Conditions under which CdS/kesterite interface recombination and trap-assisted tunneling recombination become dominant are provided. In particular, we find that CdS/CZTS interface recombination is the dominant transport mechanism for CZTS minority carrier lifetime values higher than 5 ns, while for CZTSe minority carrier lifetime values lower than 0.1 μs, CdS/CZTSe interface losses are negligible.

An effective way to analyse the performance limiting parameters of poly-crystalline silicon solar cell fabricated in the production line

This article focuses on the identification of key features that are responsible for the discrepancies in the performance of silicon solar cells fabricated on multicrystalline silicon under the identical conditions. In an experimental approach, direct current (DC) measurement coupled with alternating current (AC) characterisation technique has been employed. The scanning electron microscope analysis reveals an average grain size of few micrometres for all the solar cells and the top surface of least efficient solar cell contains the impurity precipitates with deep cone shaped holes or pits. The DC measurement reveals that the photocurrent density loss follows an exponential behaviour with respect to the current–voltage characteristics for all the solar cells. The analysis of −dV/dJ versus (JSC−J)−1 plot and the variation of ideality factor with junction voltage demonstrate that the higher resistive and recombination losses dominate the performance of least efficient solar cell. Impedance Spectroscopy (IS) technique is used to quantify and decouple the various photovoltaic parameters associated with the different physical processes. A lower value of shunt resistance and minority carrier lifetime along with the higher value of series resistance contribute to the higher resistive loss and surface recombination. The experimental results along with the analytical model provide an insight into the loss mechanisms and the use of a simple tool that can be integrated with the conventional photovoltaic testing.

From simulation to experiment: Understanding BO-regeneration kinetics

Regeneration of boron–oxygen related defects is investigated in differently compensated silicon wafers. It is shown for the first time that boron–oxygen defects can be transformed into a stable regenerated state also in compensated n-type silicon.The coupling between regeneration rate and the completeness of the regeneration reaction is simulated based on the 3-state-model of BO defects. Maximum regeneration temperatures that can be applied are determined for differently regenerating samples. The results are used to develop a high-speed process that can accelerate regeneration by two orders of magnitude without compromising neither the completeness of the regeneration process nor the stability of the resulting high minority carrier lifetime values.

Enhanced phosphorus gettering of impurities in p-type Czochralski silicon through a variable temperature processing (VTP)

This paper investigates the effect of heat treatment with a phosphorus-rich porous silicon layer on the electrical properties Czochralski (CZ), p-type monocrystalline silicon (c-Si) wafer. Phosphorus diffusion into porous silicon layer can play a crucial role for gettering metallic impurities. Further, the variable temperature process (VTP) was presented to provide higher gettering efficiency than the constant temperature process (CTP). We estimated with a Quasi-Steady-State Photo-Conductance (QSSPC) technique the effective minority carrier lifetime values τeff. The Light-Beam-Induced-Current measurements (LBIC) have been executed to estimate the diffusion length (LD). In the I–V characteristics, we observed a significant increase in Voc and Jsc. Particularly; we can say that the VTP may be required to provide the highest efficiency in devices.

Thin silicon foils produced by epoxy-induced spalling of silicon for high efficiency solar cells

We report on the drastic improvement of the quality of thin silicon foils produced by epoxy-induced spalling. In the past, researchers have proposed to fabricate silicon foils by spalling silicon substrates with different stress-inducing materials to manufacture thin silicon solar cells. However, the reported values of effective minority carrier lifetime of the fabricated foils remained always limited to ∼100 μs or below. In this work, we investigate epoxy-induced exfoliated foils by electron spin resonance to analyze the limiting factors of the minority carrier lifetime. These measurements highlight the presence of disordered dangling bonds and dislocation-like defects generated by the exfoliation process. A solution to remove these defects compatible with the process flow to fabricate solar cells is proposed. After etching off less than 1 μm of material, the lifetime of the foil increases by more than a factor of 4.5, reaching a value of 461 μs. This corresponds to a lower limit of the diffusion length of more than 7 times the foil thickness. Regions with different lifetime correlate well with the roughness of the crack surface which suggests that the lifetime is now limited by the quality of the passivation of rough surfaces. The reported values of the minority carrier lifetime show a potential for high efficiency (&amp;gt;22%) thin silicon solar cells.

Guidelines and limitations for the design of high-efficiency InGaN single-junction solar cells

Astract Indium gallium nitride (InGaN) alloys offer great potential for high-efficiency photovoltaics, yet theoretical promise has not been experimentally demonstrated. Several major challenges remain including polarization effects, suitable p-type doping, improved surface passivation, and growth of thick, high-quality InGaN layers. In this paper, we present numerical simulations of InGaN p-i-n single-junction solar cells to provide guidelines for performance improvement through optimization of device structures given achievable material characteristics. The performance of both InGaN/GaN heterojunction devices that are presently achievable and InGaN homojunction solar cells that should be feasible in the future are investigated through the calculation of characteristic parameters: short-circuit current density, open-circuit voltage, and conversion efficiency. These simulations study the effect of indium content, thickness, and background doping of the unintentionally-doped InGaN absorbing layer on the performance of both InGaN solar-cell designs. While the maximum efficiency of a p-i-n InGaN/GaN heterojunction solar cell with low indium composition is 11.3%, the conversion efficiency of heterojunction devices with high indium composition needed for longer wavelength absorption drastically reduces because of polarization effects. Above an indium composition of 45%, the modeled heterojunction devices do not operate as solar cells. Using presently achievable values of minority carrier lifetime and surface recombination velocity, the maximum efficiency of InGaN single-homojunction solar cells with optimized parameters is ~17%, which is significantly smaller than the theoretical maximum energy-conversion efficiency for single-junction cells.

Surface passivation of multicrystalline silicon wafers by porous silicon combined with an ultrathin nanoparticles aluminum coating film

In this paper, we demonstrate that we may efficiently improve surface passivation of multi-crystalline silicon (mc-Si) while combining formation of porous silicon (PS) and deposition of ultrathin aluminum (Al) film. Aluminum Nanoparticles were deposited by thermal evaporation onto PS formed on mc-Si wafers. Optoelectronic properties of Al/PS/mc-Si and Al/mc-Si treated samples were investigated before and after annealing in the 400–700 °C temperature range. The surface passivation effectiveness was pointed out based on minority carrier lifetime and photoluminescence measurements. It was found that, at a minority carrier density Δn = 1015 cm−3, the effective minority carrier lifetime increases from 1.5 μs (for the bare mc-Si wafer) to about 6 and 14 μs before and after thermal annealing, respectively. FTIR analyses show strong correlation between the minority carrier lifetime values and hydrogen and Al passivation. Major beneficial effect of the co-presence of Al and Al–O on the optoelectronic properties is also demonstrated. The reflectivity of Al/PS treated mc-Si decrease significantly at 500 nm as compared to untreated mc-Si (from 31 % for untreated mc-Si wafers to 8 % for Al/PS treated ones), which is due to the roughly ordered structure and to the Al nanoparticles.

Novel non-metallic non-acidic approach to generate sub-wavelength surface structures for inline-diffused multicrystalline silicon wafer solar cells

Abstract One of the main restrictions on further enhancement of the multicrystalline silicon (multi-Si) wafer solar cell efficiency is the high reflectance loss from the front surface. Double-texturing, including a micro-texturing by conventional isotropic acidic-texturing followed by nano-texturing using sub-wavelength structures (SWS), provides a possibility to remove this limitation. However, presently available double-texturing processes involve multiple and high-cost nano-texturing process steps and thus have not become industrially viable. This study presents an improved double-texturing process and reports its successful implementation using low-cost inline-diffusion and non-acidic ‘SERIS etch’ etch-back technology. The process is based on reactive ion etching (RIE) as a metal-free nano-texturing step, along with the conventional acidic iso-texturing process. The process is optimised based on effective minority carrier lifetime and weighted average reflectance (WAR) measurements, on 156 × 156 mm2, industrial-grade, p-type multi-Si wafers. This optimised double-textured SWS surface has a WAR of 3.2% after silicon nitride deposition, which is significantly lower than that of conventional acidic iso-textured wafers (WAR of 6–7%). However, this optimised surface maintains the same values of the effective minority carrier lifetime as for the reference conventional acidic-textured multi-Si wafers. The optimised nano-texturing recipe is also successfully applied to alkaline-textured monocrystalline silicon wafers.

Double layer a-Si:H/SiN:H deposited at low temperature for the passivation of N-type silicon

The purpose of this work was to investigate the surface passivation of n-type float zone silicon substrates using a double layer composed of hydrogenated amorphous silicon (a-Si:H) and hydrogenated amorphous silicon nitride (SiN:H). The layers were deposited by using an Electron Cyclotron Resonance Plasma Enhanced Chemical Vapour Deposition (ECR-PECVD) reactor. In this study, we report on the effect of deposition temperature and thickness of the a-Si:H layer on the surface passivation quality of silicon. The effect of SiN:H layer for coating the a-Si:H is reported as well. We recorded effective minority carrier lifetime values close to 1 ms for the best combination of temperature deposition and layer thickness for the a-Si:H film stacked with a SiN:H coating layer. FTIR measurements were systematically carried out for the different layers deposited in order to quantify the hydrogen content and tentatively link these measurements with the passivation level obtained. This work also shows that an improvement of the surface passivation quality occurs when a capping SiN:H layer is deposited on top of the a-Si:H layer that can be partly attributed to the annealing step occurring during the SiN:H layer deposition at 400 °C.

Light induced enhancement of minority carrier lifetime of chemically passivated crystalline silicon

In this work we present light effects on chemically passivated silicon surface. Di-iodine–ethanol (I–E) mixtures were used to passivate silicon dangling bonds. The passivation quality is sensitive to both silicon surface state and light irradiation. The minority carrier lifetime values vary from 2μs for unpassivated surfaces to about 40μs for chemically passivated ones. FTIR investigations show that light irradiation catalyses the passivation effect by forming the silicon-ethoxylate group (SiOC2H5). We suggest a mechanism to explain the passivation effect based on carrier-induced dissociation of I2.

Multicrystalline silicon solar cells from RST ribbon process

AbstractThe aim of Solarforce is the achievement of high efficiency solar cells made out of ≤100 µm thick multicrystalline silicon wafers produced by the Ribbon on Sacrificial Template (RST) process. For a first evaluation of the RST material, solar cells were fabricated on p‐type RST wafers with different processes. The first conclusion is that the density of silicon carbide inclusions has to be lowered to obtain better FF values, and in turn a better homogeneity in cell performances. Secondly, conversion efficiency is found to be limited around 14% by low bulk minority carrier lifetime values, limiting both Voc and Leff. ICP‐MS analyses on RST material show that this lifetime may be improved with the possible achievement of low metallic impurity content in the wafers, under 1 ppb wt. Further enhancement is also shown to be possible with the n doping of RST material, a well controlled process in ribbon growth (© 2012 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

N-type silicon RST ribbon solar cells

In this work, we report for the first time on the electronic properties and the solar cell fabrication on N-type silicon ribbons grown by the RST method. We have investigated the majority charge carriers' parameters (resistivity and mobility) and the minority carrier lifetime (MCL) of N-type silicon RST ribbons. The MCL values are deduced using the photoconductivity decay method on RST wafers, the surface of which was passivated by an iodine/ethanol solution. The effect of hydrogen plasma treatment on the electronic properties of the as-grown RST ribbons was also studied. We show that the bulk passivation following hydrogen plasma treatment, carried out at temperatures above 350°C for more than 1h, strongly improves the MCL. Conventional solar cells were prepared on RST ribbons grown in optimized conditions and passivated by plasma hydrogenation. Two types of boron emitters were tested, namely those obtained by boron-spin-coating and by ion implantation, while the N+ region serving as a back surface field was made by phosphorus spin coating. The highest conversion efficiency values obtained for boron-implantation (B-II) and boron-spin-coating (B-SOD) emitters on a ∼120μm thick RST were 13.8% and 12.7% respectively, with no surface texturing, or optimized surface passivation. Suns-Voc method applied to these RST cells gave, for B-II and B-SOD emitters conversion efficiencies of about 15.1% and 13.6%, respectively. The former value represents to our knowledge the highest efficiency value obtained for ultrathin N-type multi-crystalline silicon ribbon based cells.