Minimum Noise Figure Research Articles

A Reflectionless Receiver With Absorptive IF Amplifier and Dual-Path Noise-Canceling LNA

This article presents a 22.6–39.2-GHz reflectionless receiver (RX) capable of reducing the in-band intermodulation and high-order mixing products. Such RX consists of an absorptive IF amplifier, a double-balance passive mixer, and a dual-path noise-canceling low noise amplifier (LNA). The absorptive IF amplifier is utilized to suppress the out-of-band signal reflected back to mixer, which can reduce the intermodulation and high-order mixing products caused by the remixing of the out-of-band signals. Meanwhile, the dual-path noise-canceling LNA is used for achieving low noise figure (NF) in a wide frequency range. To verify the aforementioned principle, a reflectionless RX is implemented and fabricated using a conventional 28-nm CMOS technology. The measurement shows the minimum NF of 3.6 dB and the peak input third-order intercept point (IIP3) of −11.7 dBm. Besides, the proposed RX can support multi-Gb/s, 256-quadratic amplitude modulation (QAM)/1024-QAM modulation signals.

A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter

This work reports on a low-intermediate frequency (IF) voltage-mode receiver front-end for Internet-of-Things (IoT) applications. Design and noise analysis of an unbalanced gate-boosted common-gate low-noise amplifier (LNA) is presented, showing 50% lower power dissipation compared with the conventional balanced topology. Improved linearity is achieved thanks to channel-selection, consisting of two complex poles centered at 2 MHz IF. The first complex pole is embedded in the passive down-conversion mixer for improved frequency selectivity in front of the baseband voltage amplifier. Built in a 28-nm CMOS process, the proposed front-end occupies an active area of 0.175 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , it is supplied with 1 V and consumes only 400 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> , while showing a minimum noise figure (NF) of 6.8 dB and an out-of-band (OOB) IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> of −0.35 dBm. The performance meets Bluetooth low-energy (BLE) requirements and is competitive with other sub-mW receivers.

A Broadband 22–31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications

This article presents a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Ka$ </tex-math></inline-formula> -band bidirectional transceiver front end and its integration in an image-reject up/down converter module in 28-nm bulk CMOS. In the radio frequency (RF) front end, a transformer-based transmit/receive (T/R) switch is exploited for minimum area occupation without affecting the linearity and the isolation between the transmitter (TX) and receiver (RX) paths. The TX front end shows 19-dB power gain with an output-referred <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm{ OP}}_{\mathrm{ 1\,dB}}$ </tex-math></inline-formula> of 14 dBm and 18.7% power-added efficiency (PAE). Tested with a 100-MHz 64-QAM orthogonal frequency-division multiplexing (OFDM) modulated input signal, the error vector magnitude (EVM) is below 5% up to an average output power of 6.6 dBm, with a corresponding 7% PAE. The RX in the front end features a minimum noise figure (NF) of 4.9 dB, with 17-dB power gain. The measured input IP3 is –9.2 dBm, while the power consumption is only 35 mW. The RF bandwidth is 22–31 GHz, wide enough to cover the fifth-generation (5G) new radio (NR) bands n257, n258, and n261. The RF front end is also monolithically integrated along with a broadband bidirectional frequency up/down converter, capable of translating the 5G modulated signal from/to a 3-GHz intermediate frequency (IF). The up/down converter is realized with a single bidirectional quadrature mixer shared between the TX and RX paths. At the IF, a single hybrid coupler is used for quadrature phase shifting in upconversion and recombination in downconversion while concurrently keeping the TX and RX IF paths isolated from each other. In the upconversion mode, the module features a 22-dB programmable conversion gain, with a 40-dB minimum in-band image rejection ratio (IRR). The downconversion path shows a 29-dB programmable conversion gain and a minimum measured NF and IRR of 8.5 and 30 dB, respectively, while consuming 110 mW.

Sub-6 GHz Noise-cancelling Balun-LNTA with Dual-band Q-enhanced LC Notch Filter for 5G New Radio Cellular Applications

This paper presents a blocker-tolerant broadband balun-low-noise transconductance amplifier (LNTA) with a high-Q dual-band LC notch filter for 5G new radio (NR) sub-6GHz cellular applications. The proposed balun-LNTA employs a noise-cancelling 1:5 CG-CS balun-LNA topology with local feedback gm-boosting and modified current-bleeding techniques to support entire bands of sub-6 GHz 5G NR application with less than 5 dB NF performance and balanced output of balun-LNTA. The dual-band Q-boosted LC notch filter with a band-switchable differential inductor is also proposed to enhance blocker tolerance of the receiver by removing out-of-band blockers and strong transmitter leakage signals. Simulated in a 65-nm CMOS process, the designed balun-LNTA achieves a minimum noise figure of 2.38 dB, a maximum transconductance gain of 44 mS, an S11 of less than -10 dB over the frequency range of 50 MHz-6 GHz, an input-referred third-order intercept point of 1.82 dBm, and blocker rejection ratios of more than 15 dB. It consumes 5.9 mA from a nominal supply voltage of 1 V. Its active die area is 0.55 mm².

Low noise amplifier design with enhanced noise and gain performance using transformer boosting method for millimeter‐wave applications

AbstractIn low noise amplifier (LNA) design, achieving minimum noise figure (NF) and enhanced gain is equally important in the field of communication. The major aim of this design with previous methods are those having implemented in the topology of design like metal oxide semiconductor field effect transistor at common source connection topology, pole‐based transformer boosting, and dual feedback technique. However, these methods fail to reach the desired performance due to their low NF and low gain. In order to overcome these failures and their causes, this article presented a topology in LNA design using a transformer as boosting component to improve the performance of NF and gain for millimeter‐wave applications. It has three common gate stages connected in cascode form, and three transformers are acquired to link the drain to the input signal. Transformers permit radio frequency feeding signal from drain to source, and output from the previous stage is connected to the input of the next stage. This connection increases the gain of the circuit and an enlarged coupling coefficient of value “1,” which minimizes noise. The unilateral coefficient remains to be 1, to make the circuit stable throughout execution. NF value can be minimized by properly selecting conductance coefficient and S‐parameter values. Since the transformer is used to provide feedback in this circuit, stability condition has to be analyzed carefully. Output load value is selected optimum as it creates an impact on the stability of LNA. This topology implemented in LNA design helps to increase the gain by boosting the signal input, and hence, in turn, it increases overall gain performance. Similarly, while executing this optimal LNA design using transformer boosting technique in CADENCE software, this LNA exhibits a minimum NF of 3 dB at 30 GHz and power gain of 12.2 dB at 50 GHz in measurement. Comparatively, the proposed LNA design overruns conventional methods and consumes a power supply of 1.1 V.

유도성 소스 축퇴를 이용한 X-대역 GaN MMIC 저잡음 증폭기

In this study, an X-band GaN monolithic microwave integrated circuit (MMIC) low-noise amplifier is designed and fabricated for RF transceiver modules using a 0.2 μm ETRI GaN HEMT process. Through the application of a feedback microstrip line at the source of the transistor, the amplifier operation is stabilized, and a compromised impedance trace of the input impedance and noise matching is obtained, which minimizes the degradation of the maximum available gain and minimum noise figure. The developed MMIC low noise amplifier, which uses simple matching and biasing circuits as matching elements, exhibits a linear gain of more than 20 dB and a noise figure of 1.5～2.0 dB from 8.7 to 11.5 GHz. A single-tone power test shows an output P1dB of 17.1～24.3 dBm, and a two-tone IMD measurement shows an output IP3 of 27.4～32.4 dBm in the same frequency range.

A Wideband Low-Power Balun-LNA with Feedback and Current Reuse Technique

This paper presents a low-noise amplifier (LNA) with single to differential conversion (Balun) for multi-standard radio applications. The proposed LNA combines a common-gate (CG) stage for wideband input matching and a common-source (CS) stage to cancel the noise and distortion of the CG stage. Using the proposed technique, a low noise figure (NF) is achieved while providing a wideband of operation. Furthermore, a feedback connection from the CS stage to the gate of the CG is employed to boost the transconductance of the CG stage (gmCG), and an additional complementary transistor is applied at the CS stage using current reuse to increase the overall transconductance of the CS stage (gmCS) without increasing the power consumed by the stage. This LNA was designed using TSMC 65 nm technology, and post-layout simulation results show operation across 0.5–5 GHz, a maximum power gain of 20 dB, 4 dB minimum NF, and third-order intercept point (IIP3) of −10 dBm while consuming only 5 mW of power from a 1.2 V supply.

Performance Optimization of Holmium Doped Fiber Amplifiers for Optical Communication Applications in 2–2.15 μm Wavelength Range

In this paper, we address the performance optimization of Holmium doped fiber amplifier (HDFA) for optical communications in 2–2.15 μm wavelength range based on a single in-band forward pump source. The performance of the HDFA is analyzed with the help of theoretical simulations by considering an optimized length of Holmium doped fiber (HDF), doping concentration of Ho3+, and pump power. The impact of signal wavelength and power on gain, amplified spontaneous emission (ASE) noise, and noise figure (NF) of the amplifier is investigated. Furthermore, we investigate the variations in the gain of the amplifier, its output power, and NF by varying the power and wavelength of the pump source. After optimizing the parameters of the amplifier, the peak gain observed is around 56.5 dB, the 3 dB saturated output power obtained is 33.3 dBm, and the output power is 3 W at signal wavelength of 2.0321 μm for HDF having an optimized length of 12 m and pump power of 3.5 W. Minimum NF of around 8.2 dB is observed at 2.0321 μm for signal power of −5 dBm. The impact of ion-ion interaction on the performance of HDFA is also investigated. A reduction of 24.2 dB and 0.051 W is observed in peak gain and output power of HDFA, respectively by considering the ion-ion interaction.

Dual-Resistive Feedback Wideband LNA for Noise Cancellation and Robust Linearization

Input-matching, gain, noise figure (NF), linearity, and power consumption are crucial performance metrics that are tightly coupled in a typical low-noise amplifier (LNA). In this article, a self-forward-body-bias (SFBB) inverter-based dual-resistive feedback structure incorporating a linearity feedback-bias scheme with optimal transistor size is proposed to address the performance trade-offs for improving gain, NF, and linearity with minor impacts on other performance characteristics. The proposed structure cancels the noise and nonlinearity of the input stage simultaneously, and partially improves the noise and nonlinearity of the output stage, as shown in theoretical analyses and simulations. In contrast to the conventional linearization technique, the resulting linearity improvement is robust against process, voltage, and temperature variations. Fabricated in a 65 nm triple-well RF complementary MOS (CMOS) process, the proposed LNA achieves a minimum NF of 1.56 dB and power gain of 12.8 dB over a 3 dB bandwidth of 0.02&#x2013;2.6 GHz while consuming 6 mW from a low supply voltage of 0.9 V. The measured input second- and third-order intercept points (IIP2 and IIP3) are 29.5 and 2 dBm at 1 GHz, respectively.

On‐chip multiple‐coupled inductors modeling on silicon for millimeter‐wave applications

AbstractThis study proposes an improved broadband equivalent circuit model for millimeter‐wave and illustrates that the real part of the Z‐parameter (like Z21, Z31, and Z41) cannot be neglected. This improved model contains multiple‐coupled inductors on silicon with effective substrate current loops. And it is fabricated and measured in four‐port and in two‐port on the basis of 0.18 μm and 40 nm CMOS technology, respectively. Moreover, this proposed model is applied to a 22–31 GHz three common‐source stages differential gm‐boost low‐noise amplifier for 5G communication in 65 nm CMOS process. According to the measurement, the minimum noise figure is 2.5 dB at 23 GHz and the maximum gain is 22.2 dB at 24.5 GHz. The chip size is 0.5 mm × 0.92 mm with all pads.

A 60‐GHz low‐noise amplifier with +7.258‐dBm third‐order input intercept point using current reuse feedforward distortion cancellation for 5G emerging communication

AbstractIn the ever‐growing 5G technology, the millimetre‐wave (mmWave) frequency spectrum is the inevitable mainstream for high‐speed wireless communication. The wide‐ranging spectrum bandwidth of the mmWave frequency attracts interest in radio frequency (RF) front‐end design which will be very much beneficial for security and cellular‐based applications such as intersatellite communication and automotive vehicle‐to‐vehicle communication. The RF front end requires low‐power and low‐noise receiver architecture for effective satellite communication, and it needs high throughput with maximum data transfer for cellular‐based applications. To address these challenges, this paper presents a novel low‐noise amplifier (LNA) operating from 57.12‐ to 66.25‐GHz frequency. The design is implemented using UMC 65‐nm CMOS process technology, and the post‐layout simulations are carried out using the Cadence Spectre RF tool. At 60 GHz, the LNA exhibits a power gain of 15.46 dB, minimum noise figure (NF) of 1.32 dB while consuming 6.59 mW from a 1.2‐V supply. The LNA employs the current reuse feedforward distortion cancelation technique to improve the third‐order input intercept point (IIP3) to +7.258 dBm. The proposed LNA provides a relatively better figure of merit compared to some of the recently proposed mmWave LNA architectures.

Two-Stage Ku-Band Graphene Low Noise Amplifier MMIC With Improved Fabrication Process

Graphene has great application potential in radio frequency (RF) electronics such as low-noise amplifier (LNA) due to its amazing electrical properties. In this work, a graphene-transfer after process was developed to fabricate two-stage graphene LNA monolithic microwave integrated circuits (MMICs) on sapphire substrate to reduce possible damage to the graphene material in the device fabrication process. Using microstrip lines, inductances, and capacitances as input–output, and interstage impedance match networks, the two-stage <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ku</i> -band graphene LNA MMIC was obtained with a 10.2 dB maximum gain at 12.7 GHz, and 4.2 dB minimum noise figure at 12.5 GHz.

Low-noise-figure and high-purity 10 vortex modes amplifier based on configurable pump modes.

We have explored an orbital angular momentum (OAM) amplifier of 10 vortex modes under different-order OAM pump modes, i.e. OAM0, OAM1, and OAM2. The all-fiber amplification system consists of an active few-mode erbium-doped fiber (FM-EDF), a mode selective pump (MSP), and a mode selective signal (MSS). These mode selective components are based on fused-taper mode selective couplers (MSC) under different wavelengths fabricated by a passive ring-core fiber (RCF). Under different-order mode pumps, the OAM amplifier experimentally exhibits mode gains (MGs) above 15 dB for 10 vortex modes with the mode purities only 89%, essentially in line with the simulation results. Especially when the signal-mode profiles are better matched to the pump-mode profiles, i.e. the OAM pumps with the same order as signals, the obtained MGs are all over 20.2 dB and the amplified OAM mode purity is up to 97%; the acquired noise figures (NFs) are <4.9 dB and even the minimum NF is 3.2 dB. The results reveal that the OAM amplifier shows low-NF and high-purity characteristics under configurable pump modes in C-band. The amplified high-order OAM mode could be promising for uses in the long-distance mode division multiplexing (MDM) and in mitigation of the upcoming capacity crunch in optical fiber communication.

A Wideband E/W-Band Low-Noise Amplifier MMIC in a 70-nm Gate-Length GaN HEMT Technology

This article reports on a gallium-nitride (GaN) low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with a 3-dB gain bandwidth (BW) from 63 to 101 GHz. The MMIC is fabricated in the Fraunhofer IAF 70-nm GaN-on-silicon-carbide (SiC) high-electron-mobility transistor (HEMT) technology. The four-stage common-source LNA exhibits an average noise figure (NF) of 3 dB for a measured frequency range from 75 to 101 GHz. The MMIC reaches a minimum NF of 2.8 dB at an operating frequency of 83 GHz. A mapping of two 100-mm wafers shows an excellent homogeneity with an 86% yield and an average NF of 3–3.3 dB. At 100 GHz, the LNA obtains output-referred 1-dB compression and third-order intercept points of 12.1 and 14.4 dBm, respectively. Furthermore, comprehensive investigations of the bias dependence of all measured performance parameters provide an insight into the presented device and LNA. To the best of the authors’ knowledge, this MMIC demonstrates the lowest NF among GaN LNAs at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}/{W}$ </tex-math></inline-formula> -band frequencies.

χ2-based AlGaAs phase sensitive amplifier with record gain, noise, and sensitivity

Phase sensitive amplifiers (PSAs) have the potential to empower substantial advances in emerging generations of optical communication systems as well as classical and quantum on-chip signal processing. While second order nonlinearity ( χ 2 ) is stronger than third order nonlinearity ( χ 3 ), it is seldom utilized in semiconductors to realize PSAs owing to the challenges of effectively phase matching the interacting waves as well as countering the two-photon absorption of the pump. In this work, we demonstrate the successful design, fabrication, and characterization of, to our knowledge, the first χ 2 -based semiconductor PSA using an efficient phase matching approach and a pulsed pump, in an AlGaAs Bragg reflection waveguide. The reported AlGaAs PSA achieves on-chip in-phase gain approaching 30 dB, with a sensitivity of 0.005 photons per pulse. Its performance also approaches the theoretical minimal noise figure of 0 dB. With such performance metrics and its capability to operate in the single mode regime, this PSA could usher in a new era of on-chip quantum circuits.

Impact of AlGaN Barrier Thickness and Substrate Material on the Noise Characteristics of GaN HEMT

In this paper, the impact of AlGaN barrier thickness (tAlGaN) and substrate leakage on the noise conductance and noise figure in GaN High Electron Mobility Transistor (HEMT) is investigated. The investigation and analysis in this paper are targeting the Low Noise Amplifier (LNA) applications. The noise analysis is carried out using Technology Computer-Aided Design (TCAD) physical simulator. Initially, the DC, RF, and noise simulations are validated against measurements of a GaN device. AlGaN barrier thickness (tAlGaN) is varied and its impact on the minimum noise figure (NFmin) is analyzed. It is observed that the NFmin decreases with tAlGaN reduction at the typical bias conditions of LNA. This observation on the impact of tAlGaN on the NFmin follows Fukui&#x2019;s model, which states that the NFmin decreases with the increase in transconductance. In addition, the impact of the substrate material on noise performance is analyzed. The substrates used for the investigation are Silicon (Si) and Silicon Carbide (SiC). At 40 GHz, it is found that the noise conductance and the NFmin of GaN HEMT on SiC substrate is reduced by 13% and 12%, respectively, in comparison with GaN HEMT on Si substrate. This could be attributed to the lower gate-to-substrate capacitance of the GaN HEMT on SiC substrate.

Performance Enhancement of Praseodymium Doped Fiber Amplifiers

In this paper, we report a simulation study on the performance enhancement of Praseodymium doped silica fiber amplifiers (PDFAs) in O-band (1270–1350 nm) in terms of small signal gain, power conversion efficiency (PCE), and output optical power by employing bidirectional pumping. The PDFA performance is examined by optimizing the length of Praseodymium doped silica fiber (PDF), its mode-field diameter (MFD) and the concentration of Pr3+. A small-signal peak gain of 56.4 dB, power conversion efficiency (PCE) of 47%, and output optical power of around 1.6 W (32 dBm) is observed at optimized parameters for input signal wavelength of 1310 nm. Minimum noise figure (NF) of 4.1 dB is observed at input signal wavelength of 1310 nm. Moreover, the effect of varying the pump wavelength and pump power on output optical power of the amplifier and amplified spontaneous emission (ASE) noise is also investigated, respectively. Finally, the impact of ion-ion interaction (up-conversion effect) on small-signal gain of the amplifier is also studied by considering different values of up-conversion coefficient.

A GaAs Low Noise Amplifier for 2.4 GHz ISM band Applications

In this paper, a Low Noise Amplifier (LNA) operating in the Industrial Scientific and Medical (ISM) band of 2.45 GHz is proposed. The designed LNA is based on GaAs ATF21170 active device. To improve gain and matching parameters, a hybrid matching technique based on smith chart and optimization is used. The proposed biasing network as well as the stabilization circuit allow achieving a minimum noise figure with an unconditionally stability over the whole operating frequency ranging from 2.25 GHz to 2.55 GHz. Finally, some tradeoffs were done to obtain the minimum noise figure with the greatest available power gain. In terms of performances, the proposed structure shows an excellent noise figure of ~1Db.The simulated results show an excellent input/output return loss under -15 dB over the operation frequency band with an excellent small signal gain ranging between 17 dB and 15 dB. In terms of large signal performance, the proposed LNA achieves an output power of 17 dBm (52 mW) with a PAE of 22% and an output intercept IP3 around 27 dBm.

A Ka-Band CMOS Phase-Invariant and Ultralow Gain Error Variable Gain Amplifier With Active Cross-Coupling Neutralization and Asymmetric Capacitor Techniques

This article presents a 23-28-GHz digital-controlled phase-invariant and ultralow gain error variable gain amplifier (VGA) for 5G applications. The mechanisms of gain control and phase variation in CMOS VGA based on single-level transistor structure are analyzed in detail. According to the analysis, an active cross-coupling neutralization (ACCN) technique is proposed. The ACCN technique not only compensates for phase variation, but also makes phase compensation insensitive to the process, supply voltage, and temperature (PVT) variations. For achieving ultralow gain error, an asymmetric capacitive gain resolution improvement (ACGRI) technique is adopted, which realizes a fine gain step with low control circuit complexity. Further to reduce gain error, greatly improving the accuracy and robustness against PVT of gain control is necessary. With regard to this, a current-type digital-to-analog converter (DAC) is also integrated onto the chip. The proposed VGA is demonstrated in 65-nm CMOS technology with a core chip area of 0.14 mm². Under 5-b digital gain control conditions, the presented VGA achieves a measured linear gain tunability range of 6.2 dB with a 0.2-dB fine tuning step. The measured root mean square (rms) phase error is less than 0.92° across 24-28 GHz with a minimum value of 0.63° at 27.8 GHz. The rms gain error is less than 0.13 dB, with a minimum value of only 0.03 dB at 25 GHz. At the maximum gain state, the proposed CS VGA exhibits a peak gain of 29.4 dB with 3-dB bandwidth of 23.5-27.5 GHz and the minimum noise figure is 4.8 dB at 26 GHz. Besides, the measured OP <formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex>$_{{1 dB}}$</tex> </formula> and OP <formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex>$_{{3 dB}}$</tex> </formula> are 6.3 and 9.6 dBm, respectively. The influence of VT variations on the phase compensation and gain tuning is also measured, and the proposed VGA exhibits strong robustness.

A 7.2–27.3 GHz CMOS LNA With 3.51 ±0.21 dB Noise Figure Using Multistage Noise Matching Technique

A wideband low-noise amplifier (LNA) with low and flat noise figure (NF) is presented in this article. For conventional wideband noise matching, the noise performance in the high-frequency region of the entire wideband is usually deteriorated due to the frequency-dependent nature of the minimum noise figure (NF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> ) for a MOSFET. To address this issue, a novel wideband noise matching approach aiming at noise matching in high band is proposed. This approach can reduce the NF in high band at the cost of a slight NF increase in low band, eventually achieving a low and flat NF and thus a better overall noise performance for a wideband LNA. In addition, the multistage noise matching technique is employed at high frequencies to further reduce the NF caused by the second amplification stage. To validate the proposed techniques, a two-stage LNA prototype was designed and fabricated using a 65 nm CMOS process. The experimental results indicate a peak gain of 16.6 dB with a −3 dB bandwidth (BW) from 7.2 to 27.3 GHz (a fractional BW of 116%). Within the entire band of interest, the simulated NF is low and almost constant (3.3–3.4 dB), while the measured NF falls within the range of 3.30–3.72 dB. Considering the uncertainty of NF measurement, a 0.21 dB NF flatness is one of the best results among the reported millimeter-wave wideband LNAs. The measured third-order input intercept point (IIP3) is −6 dBm at 20 GHz, while the power consumption is 13.2 mW. In addition, only two passive transformers are used in this design, leading to a compact chip core area (0.14 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ).