Microelectronic Design Research Articles

Comments on the BCS Lecture 'The Future of Computer Technology and its Implications for the Computer Industry' by Professor Steve Furber

Department of Electrical and Electronic Engineering, Imperial College London, UK Email: p.cheung@imperial.ac.uk Professor Furber has, in a clear and succinct manner, provided us with a pragmatic and honest overview of the challenges facing the computer industry in the future. We have had a brief history of its development. Most of us in the audience, I am sure, are encouraged by achievements made in the last 60 years. Some may even feel proud knowing that they have made their personal contributions. We have been warned of the imminent danger facing the industry, on reliability (or more accurately, unreliability), on escalating costs and on challenging business models that the industry operates under. We are illuminated with some light at the end of the tunnel. In particular, we learn about the UK's efforts in setting up the Microelectronics design Grand Challenges, and the interesting paradigm in computing by learning from nature through the working of the brain.

Specification management for the cost constraint optimisation in microelectronic design

In the preliminary design phase the integration of the economic constraints of a product is a difficult engineering task since there is a real lack of dedicated tools. This paper illustrates a specification software solution method making it possible to meet this need, applied to the microelectronics field.

HDL modeling of convective accelerometers for system design and optimization

This study concerns the integration of convective accelerometers on CMOS. The design approach is based on an HDL modeling of the sensing cell. The development of a monolithic system is then undertaken, using multi-domain simulations, within the microelectronics design environment. For illustration, the sensor equivalent input noise (i.e. the resolution) is computed for various readout circuitry configurations: a simple instrumentation amplifier, a customized low-noise amplifier and a chopper-stabilized amplifier with a track-and-hold signal demodulator. Finally, a noise equivalent acceleration below 1 mg/√Hz has been reached, which is interesting for applications in consumer electronics.

Highly Efficient Detector of the Neurotransmitter ACh and AChE Inhibitors

AbstractAmong the variety of applications for biosensorsone of the exciting frontiers is to utilize those devices as post-synaptic sensing elements in chemical coupling between neurons and solid-state systems. The first necessary step to attain this challenge is to realize highly efficient detector for neurotransmitter acetylcholine (ACh). Herein, we demonstrate that the combination of floating gate configuration of ion-sensitive field effect transistor (ISFET) together with diluted covalent anchoring of enzyme acetylcholinesterase (AChE) onto device sensing area reveals a remarkable improvement of a four orders of magnitude in dose response to ACh. This high range sensitivity in addition to the benefits of peculiar microelectronic design show, that the presented hybrid provides a competent platform for assembly of artificial chemical synapse junction. Furthermore, our system exhibits clear response to eserine, a competitive inhibitor of AChE, and therefore it can be implemented as an effective sensor of pharmacological reagents, organophosphates, and nerve gases as well.

Limits of Heat Removal in Microelectronic Systems

Thermal management issues play an increasingly prominent role in microelectronic system design. The constraints on heat removal are a major factor limiting the performance of a microelectronic system. This work presents the thermodynamic limit of performance for a thermal solution utilizing air cooling to reject thermal energy as the inverse of its mass flow-heat capacity product. The minimum resistance to heat flow offered by a thermal solution is further refined by including the effects of thermal interface materials, substrate materials, and the impact of nonuniform device layer heating. Active cooling solutions may offer additional needed cooling for microelectronics systems, but the system thermal resistances limit its applicability. This work describes the minimum efficiency that an active cooling solution must provide to offer a thermal advantage over passive cooling. This minimum efficiency is dictated by the thermal resistances involved in drawing heat into the active cooler and expelling heat to the ambient environment. Knowledge of the fundamental limitations of thermal solutions gives system designers realistic expectations to set roadmaps, define architecture specifications, and evaluate the validity of thermal system performance claims

UHF RFID tag-antenna matching optimization using VHDL-AMS behavioral modeling

In order to generate a first-time right design, system level modeling and simulation is a major step. Thus, optimization of integrated wireless systems requires the development of behavioral models of the RF link (antenna-medium-antenna) compatible with the microelectronic design tools. Firstly, this paper shows the need of such models within the Top-Down design flow of an UHF RFID system. Then, a behavioral model of a narrow band far field RF link is presented and validated. This model is associated with a new behavioral model of an RFID tag and finally, several examples of tag-antenna matching optimization simulations are presented in order to demonstrate the interest of our approach.

Improvements to a Microelectronic Design and Fabrication Course

This paper presents improvements made to a complimentary metal-oxide-semiconductor (CMOS) fabrication laboratory course to increase student learning and student impact (enrollment). The three main improvements to the course discussed include: 1) use of a two-mask MOS process that significantly reduced the time students took previously to design, fabricate, and verify the electrical properties of a metal-oxide-semiconductor field-effect transistor (MOSFET) process; 2) students' use of a semicustom integrated circuit (IC) design that significantly reduced the average design and processing time of previous years; and 3) development and implementation of a system of course prerequisites, which allowed a larger number of students to enroll in the course.

Design of CMOS MEMS Based on Mechanical Resonators Using a RF Simulation Approach

This paper, which is mostly tutorial in nature, deals with the design of CMOS microelectromechanical systems MEMS using standard microelectronic computer-aided design tools. The proposed case study is an on-chip spectrum analyzer with an electronic mixer and a mechanical filter. Based on both analytical modeling and characterization, the filter is described using an analog hardware description language. System level simulations are then performed using a recently released simulation tool that offer new possibilities regarding the analysis of multidomain, multifrequency designs. Presented results include periodic steady state determination, small-signal analysis and noise investigation. The simulations demonstrate the ability of the proposed system to identify the harmonics of a 50-Hz square-wave signal, owing to the selectivity of the mechanical filter.

Measurement and analysis of thermal properties of SiNx thin films

The thermal conductivity, emissivity, specific heat capacity and thermal diffusivity of SiNx thin films which are widely used in semiconductor and microelectronics MEMS are measured using a novel experimental method which combines the heater and the bolometer in one unit. The obtained reliable thermal properties are very useful for microelectronic circuits design and mask processing. The experimental data show that the thermal conductivity, emissivity and thermal diffusivity of SiNx thin films are much lower than those of the bulk and depend on the temperature and thickness of the thin films, and the size effect of SiNx thin films is notable. However, the specific heat capacity of SiNx thin films is almost the same as that of the bulk.

Performance evaluation of an Active Pixel Sensor Test Structure for space science applications

An Active Pixel Sensor Test Structure, commissioned by the Rutherford Appleton Laboratory CCD Technology Group and designed by the Microelectronics Design Group, is being tested and evaluated by the University of Birmingham. The Test Structure includes four 16×16 pixel arrays, each array featuring a different 25 μm pixel design: Photogate, QuadruDot, n-type diffusion [ Diode( ndps)] and p-type diffusion [ Diode( pdNw)] photodiodes. Measurements are currently underway to characterize the Active Pixel Sensor performance. Initial measurements indicate pixel array gains of 2.9, 3.4, 38 and 50 electrons per ADC unit, for the QuadruDot, Photogate, Diode(ndps) and Diode(pdNw) arrays. The test-structure architecture, experimental set-up, results and conclusions are discussed, with reference to the performance benefits of this technology for future space applications.

On the use of path integrals in micro‐electronic design

AbstractThe design of micro‐electronic processes is done by running process splits that either consist of laboratory or clean‐room experiment or of computer experiments. In order to obtain optimal designs, in terms of high yield and having the specifications on target, the design space is explored using design‐of‐experiment and response‐surface methods. In this paper we present a new technique for performing continuous interpolation between the experimental points in order to determine non‐explored input settings. The method eliminates all bias which is traditionally built into the surface construction by assuming polynomial behavior by using the maximum entropy principle and by constructing numerical interpolation hyper surfaces. The technique is generic and can be applied also outside the field of microelectronic design.

Accelerated Life Testing (ALT) in Microelectronics and Photonics: Its Role, Attributes, Challenges, Pitfalls, and Interaction With Qualification Tests1

Accelerated life tests (ALTs) are aimed at revealing and understanding the physics of the expected or occurred failures, i.e., are able to detect the possible failure modes and mechanisms. Another objective of the ALTs is to accumulate representative failure statistics. Adequately designed, carefully conducted, and properly interpreted ALTs provide a consistent basis for obtaining the ultimate information of the reliability of a product—the predicted probability of failure after the given time of service in the given conditions. Such tests can dramatically facilitate the solution to the cost effectiveness and time-to-market problems. ALTs should play an important role in the evaluation, prediction and assurance of the reliability of microelectronics and optoelectronics devices and systems. In the majority of cases, ALTs should be conducted in addition to the qualification tests required by the existing standards. There might also be situations when ALTs can be (and, probably, should be) used as an effective substitution for such standards, or, at least, as the basis for the improvement of the existing qualification specifications. We describe different types (categories) of accelerated tests, with an emphasis on the role that ALTs should play in the development, design, qualification, and manufacturing of microelectronics and photonics products. We discuss the challenges associated with the implementation and use of the ALTs, potential pitfalls (primarily those associated with possible “shifts” in the mechanisms and modes of failure), and the interaction of the ALTs with other types of accelerated tests. The role of the nondestructive evaluations is also briefly outlined. The case of a laser welded optoelectronic package assembly is used to illustrate some concepts addressed. “All life is an experiment. The more experiments you make the better” Ralph Waldo Emerson “In the long run we are all dead” John Maynard Keynes

Economic Evaluation of Design-for-Test Alternatives for Microelectronics Products

Cost-of-Ownership (COO) models, developed for integrated circuit (IC) fabrication equipment, can be extended to the various cost domains of microelectronics design and development cycles. Details of a COO model developed to evaluate design for test (DFT) alternatives are given, together with the results of application to case studies of different test scenarios. Scan and Built-in-Self-Test (BIST) are popular DFT solutions. Mixed scan/BIST alternatives are shown to reduce overall costs through improved fault coverage, which justifies extra design overhead and slight performance degradation in most cases. For all but relatively simple IC products economic benefits from DFT solutions are demonstrated.

High field breakdown of narrow quasi uniform field gaps in vacuum

The challenge in vacuum microelectronic device design is to be able to stress a given micrometric gap to relatively high voltages without threat of a breakdown, which, in effect could destroy the device. In order to obtain basic vacuum insulation data related to the regime of vacuum microelectronics, the prebreakdown and breakdown characteristics of narrow gaps in the range of 3–25 μm were extensively investigated. The observed prebreakdown current was related to field emission from atomic scale microprotrusions or planar emission sites; the emission from these sites eventually produces breakdown. A single spark breakdown caused damage to both the anode and cathode. The dc glow discharge conditioning in air improved the insulation capability of narrow gaps (3–25 μm) significantly. The breakdown strength of a 5 μm gap after conditioning was as high as 5×108 V/m, which is the highest value reported in literature for broad area electrodes. It is shown that the electric field evaporation of metal ions from the electrode surface at an electric field E≅1010 V/m is able to instigate breakdown of the gap even under high vacuum conditions. Electric field evaporation can occur both at the cathode and anode surfaces to create the breakdown conditions. The breakdown data obtained in the micrometric gap regime is very valuable in the design of field emission displays and other vacuum microelectronic devices.

Hardware/software communication and system integration for embedded architectures

Embedded system architectures comprising of software programmable components (e.g. DSP, ASIP, and micro-controller cores) and customized hardware co-processors, integrated into a single cost-efficient VLSI chip, are emerging as a key solution to today's microelectronics design problems. This trend is being driven by new emerging applications in the areas of wireless communication, high-speed optical networking, and multimedia computing, fueled by increasing levels of integration. These applications are often subject to stringent requirements in terms of processing performance, power dissipation, and flexibility. A key problem confronted by embedded system designers today is the rapid prototyping of an application-specific embedded system architecture where different combinations of programmable processor components, library hardware components, and customized hardware components must be integrated together, while ensuring that the hardware and software parts communicate correctly. Designers often spend an enormous time on this highly error proned task. In this paper, we present a solution to this embedded architecture co-synthesis and system integration problem based on an orchestrated combination of architectural strategies, parameterized libraries, and software CAD tools.

Microfluidic system modeling using VHDL-AMS and circuit simulation

It is demonstrated that the operation of electrofluidic microsystems such as micropumps can be efficiently modeled by standard electrical circuit simulators, using the analog hardware description language (VHDL-AMS) to describe the models. As a representative example, compact models were developed for all constituent parts of an electromechanical micropump fabricated by silicon-based microstructure technology, including electrostatically actuated membrane drives, membrane valves and tubes together with the power supply and control circuitry. With the resulting macromodel of the micropump, the static characteristics as well as the dynamic behavior is correctly reproduced. Thus, with this approach it is possible to include fluidmechanical system components straightforwardly in conventional microelectronic design environments, allowing for easy full system analysis and optimization of even complex microsystems.

Direct Imaging of Device Characteristics In a Focused ion Beam System

Abstract A great deal can be learned about integrated circuits (ICs) and microelectronic structures simply by imaging them in a focused ion beam (FIB) system. FIB systems have evolved during the past decade from something of a curiosity to absolutely essential tools for microelectronics design verification and failure analysis. FIB system capabilities include localized material removal, localized deposition of conductors and insulators, and imaging. A major commercial driver for FIB systems is their usefulness in the design debugging cycle by (1) rewiring ICs quickly to test design changes and (2) making connection to deep conductors to facilitate electrical probing of complex ICs. FIB milling is also used for making precision cross sections and for TEM sample preparation of microelectronic structures for failure analysis and yield enhancement applications.

Non-contact probing of high speed microelectronics using electrostatic force sampling

The ability to perform non-invasive high-frequency measurements at the internal points of an integrated circuit is important for the design and failure analysis of advanced microelectronics. As integrated circuit densities and speed increase, obtaining information on their internal operation becomes extremely difficult using conventional probing methods due to parasitic loading and low spatial resolution. We present a non-contact probing technique based on a nonlinear Coulomb force interaction for extracting high-frequency signals at internal points of an integrated circuit. Internal circuit voltages are measured by sensing the local electrostatic force on a small micromachined probe that is held in close proximity to the circuit measurement point. The bandwidth of force measurements made using proximal probes are typically limited by the mechanical frequency response of the probe. In the presented instrument high frequency waveform measurements are enabled by using a pulse sampled heterodyne technique. The probing instrument has a bandwidth of 3 GHz and is capable of internal circuit delay measurements with a resolution of less than 10 ps. Measurement of the internal propagation delays and rise times of a complementary metal-oxide-semiconductor inverter chain are given.

Hardware/Software Communication and System Integration for Embedded Architectures

Embedded system architectures comprising of software programmable components (e.g. DSP, ASIP, and micro-controller cores) and customized hardware co-processors, integrated into a single cost-efficient VLSI chip, are emerging as a key solution to today's microelectronics design problems. This trend is being driven by new emerging applications in the areas of wireless communication, high-speed optical networking, and multimedia computing, fueled by increasing levels of integration. These applications are often subject to stringent requirements in terms of processing performance, power dissipation, and flexibility. A key problem confronted by embedded system designers today is the rapid prototyping of an application-specific embedded system architecture where different combinations of programmable processor components, library hardware components, and customized hardware components must be integrated together, while ensuring that the hardware and software parts communicate correctly. Designers often spend an enormous time on this highly error proned task. In this paper, we present a solution to this embedded architecture co-synthesis and system integration problem based on an orchestrated combination of architectural strategies, parameterized libraries, and software CAD tools.

Position-sensitive MCP-based detectors with high timing resolution: some results and perspectives

The microelectronic design and some results of experimental tests of three types of coordinate-sensitive Micro-Channel-Plane (MCP) based detectors with good timing properties are presented. The electrodynamic structures that could be used for the MCP fast signal readout (strips, delay lines and discrete pads) are always a compromise between the amplitude of the induced signal, propagation time delay, cross-talk and distortions of the signal at the output. In-lab tests of these structures and experimental tests of the detectors done with the beams of MIPs and with the alpha-source, have shown a 130 μm spatial resolution and a 110 ps timing resolution obtained simultaneously for one detector.