Metal Stack Research Articles

Demonstration of aluminum nitride metal oxide semiconductor field effect transistor on sapphire substrate

Abstract Aluminum nitride (AlN) is a promising ultrawide bandgap material with significant advantages for power electronics and optoelectronic applications due to its high breakdown voltage, mobility, and thermal conductivity. AlN Schottky barrier diodes (SBDs) and metal semiconductor field effect transistors (MESFETs) have shown potential but are limited by issues such as high off-state leakage current and complex structures to achieve ohmic contacts. To address these challenges, we report on the fabrication and characterization of an AlN metal oxide semiconductor field effect transistor (MOSFET) with a recessed gate structure. The source and drain contacts were fabricated on n-doped AlN epitaxy using Ti-based contacts with a Ti/Al/Ti/Au metal stack. To evaluate the performance of these contacts, a circular transmission line model (CTLM) was employed, and contacts were annealed at various temperatures ranging from 750 to 950 °C in a nitrogen ambient. Our results reveal that unannealed Ti-based contacts on AlN showed no current conduction. However, annealing these contacts at 950 °C for 30 s significantly reduced the specific contact resistance to 0.148 Ω·cm2, achieving an ~80% reduction compared to samples annealed at 750 °C. Utilizing these optimized contact conditions, we fabricated, to the best of our knowledge, the first AlN MOSFET. The fabricated AlN MOSFET exhibits a threshold voltage of −10.91 V, an effective mobility of 2.95 cm2/Vs, an on-off current ratio spanning two orders of magnitude, and a reverse breakdown voltage of approximately ~250 V in air without a field plate. 

The mechanism of degradation and failure in NiO/ β -Ga2O3 heterojunction diodes induced by the high-energy ion irradiation

This work investigated the single-event effects (SEE) of NiO/β-Ga2O3 heterojunction diodes (HJDs) irradiated by 1.86 GeV tantalum ions with linear energy transfer over 80 MeV cm2/mg. The HJDs exhibited radiation responses with the early single-event leakage current (SELC) degradation until the fatal single-event burnout (SEB) failure, which was far below their breakdown voltages. Meanwhile, the surface morphology revealed the SELC damage expressed as burnout of topside NiO and metal stacks, while the SEB damage was observed as a burned hole in the β-Ga2O3 epitaxial layer. According to technology computer aided design simulations, the thicker p-type region in HJDs could further alleviate the electric field crowding effect exacerbated by the heavy-ion strike because of the extension of charge distribution in the p-type region. The SEB threshold was raised to 250 V by thickening the NiO layer to 300 nm. As for the SELC degradation process along with the burnout of topside stacks in HJDs, we supposed the probable reason was the intolerance of NiO to the high electric field under the SEE. This paper analyzed the SEE mechanism in β-Ga2O3 diodes and paved the way for heavy-ion irradiation hardening.

A 220 GHz GaN‐based monolithic integrated frequency doubler delivering over 0.25 W output power

AbstractA 220 GHz GaN‐based monolithic integrated frequency doubler with high continuous‐wave output power has been developed. The doubler achieves improved heat dissipation by establishing the terahertz (THz) monolithic integrated circuit topology with GaN Schottky barrier diodes integrated on a high thermal conductivity SiC substrate. It features six anodes to enhance the power‐handling capabilities. A refractory Schottky metal stack is adopted for better thermal stability. The doubler realizes satisfactory performance by introducing the suspended microstrip and an all‐in‐one output structure. For verification, a prototype of the proposed frequency doubler was fabricated and tested. Measured results show that the proposed doubler produces a continuous‐wave output power of 255 mW at 220 GHz with an efficiency of 14.6%, exhibiting excellent potential for powerful THz sources.

Optimization of Non-Alloyed Backside Ohmic Contacts to N-Face GaN for Fully Vertical GaN-on-Silicon-Based Power Devices.

In the framework of fully vertical GaN-on-Silicon device technology development, we report on the optimization of non-alloyed ohmic contacts on the N-polar n+-doped GaN face backside layer. This evaluation is made possible by using patterned TLMs (Transmission Line Model) through direct laser writing lithography after locally removing the substrate and buffer layers in order to access the n+-doped backside layer. As deposited non-alloyed metal stack on top of N-polar orientation GaN layer after buffer layers removal results in poor ohmic contact quality. To significantly reduce the related specific contact resistance, an HCl treatment is applied prior to metallization under various time and temperature conditions. A 3 min HCl treatment at 70 °C is found to be the optimum condition to achieve thermally stable high ohmic contact quality. To further understand the impact of the wet treatment, SEM (Scanning Electron Microscopy) and XPS (X-ray Photoelectron Spectroscopy) analyses were performed. XPS revealed a decrease in Ga-O concentration after applying the treatment, reflecting the higher oxidation susceptibility of the N-polar face compared to the Ga-polar face, which was used as a reference. SEM images of the treated samples show the formation of pyramids on the N-face after HCl treatment, suggesting specific wet etching planes of the GaN crystal from the N-face. The size of the pyramids is time-dependent; thus, increasing the treatment duration results in larger pyramids, which explains the degradation of ohmic contact quality after prolonged high-temperature HCl treatment.

Lift-Off Process for Patterning of a Sputter-Deposited Thick Metal Stack for High Temperature Applications on 4H-SiC

With the rising need for power devices suitable for harsh environment conditions like high temperature applications, contact materials and packaging of the devices have become critical factors in device fabrication [1, 2]. Therefore, a contact metal stack containing silver and titanium nitride which can be used at elevated temperatures under oxygen atmosphere was investigated. For patterning of the approx. 2 µm thick sputter-deposited metal stack on the wafer front side, a lift-off process using a negative photoresist was established. Characterization of the photoresist sidewall shape was performed by cross-sectional views prepared with SEM and top view images taken on a microscope. It was found that for a successful lift-off, a distinct undercut is needed so no metal is deposited at the downside of the undercut, ensuring a metal-free surface for the solvent to reach the photoresist. To obtain this, most influencing factors are exposure dose and development time, which were optimized considering the undercut shape as well as pattern fidelity. Lift-off with acetone proved to be good for the fabricated 4H-SiC MOSFET devices.

Long Term Reliability and Deterioration Mechanisms of High-Temperature Metal Stacks on 4H-SiC

In order to make SiC devices more accessible for high-temperature applications, reliable ohmic contacts and metallization systems which can also withstand extended operation at high temperatures are needed. In this work, metal layer stacks containing Ag, Ti, TiN, Ni and NiAl, where NiAl refers to a mixture of 97,4 wt% Ni and 2,6 wt% Al, were deposited on Si and SiC samples and consecutively thermally aged at 400 °C for 100 h in air. Mesa structures were found to be challenging for keeping oxygen from diffusing through the metal stack to the substrate. On flat surfaces, diffusion barriers were successfully used to protect the ohmic contact on 4H-SiC samples from oxidizing. Diffusion barriers made of TiN were found to show pore formation after the thermal treatment. The reason for the pores is thought to be gas formation, which is believed to be the result of the TiN layers containing too much nitrogen. The exact chemical composition of TiN layers therefore seems to be of vital importance for high-temperature applications.

Optimization of submicron Ni/Au/Ge contacts to an AlGaAs/GaAs two-dimensional electron gas

We report on fabrication and performance of sub-micrometer Ni/Au/Ge contacts to a two-dimensional electron gas in an AlGaAs/GaAs heterostructure. Utilizing scanning transmission electron microscopy, energy dispersive x-ray spectroscopy, and low temperature electrical measurements, we investigate the relationship between contact performance and the mechanical and chemical properties of the annealed metal stack. Contact geometry and crystallographic orientation significantly impact performance. Our results indicate that the spatial distribution of germanium in the annealed contact plays a central role in the creation of high transmission contacts. We characterize the transmission of our contacts at high magnetic fields in the quantum Hall regime. Our work establishes that contacts with an area of 0.5 μm2 and resistance less than 400 Ω can be fabricated with high yield.

Engineering High-K Switching Devices for in-Memory Computing

Selecting and processing of appropriate stack materials for HfO2-based RRAM devices significantly influences the distribution of defects and oxygen vacancies (Vo) within the switching layer, thereby playing an important role in their switching behavior (1). Controlling this distribution to have more oxygen vacancies near the top electrode (TE) while reducing them near the bottom electrode (BE) results in reduced switching power and enhanced multilevel cell characteristics (MLC) of RRAM devices (2) and that makes them as promising options for in-memory computing. Since RRAM devices fabricated as metal-insulator-metal stack, exploring the impact of each layer remains an active area of research.In this work, we compared different devices by varying the materials of each layer. The first comparison is by varying the oxide layer with same TE (Ru) and BE (TiN) by (i) using stoichiometric HfO2 and (ii) employing HfO2 treated with hydrogen plasma at the midpoint. The device treated with hydrogen plasma consumed nanowatts power compared to the stoichiometric device that consumed hundreds of microwatts to be switched. The introduction of hydrogen plasma treatment at the midpoint of the HfO2layer redirects more Vo towards the TE, explaining the reduction in the switching power (1). While applying pulse SET operation, the hydrogen plasma-treated device exhibited excellent conductance quantization, whereas the stoichiometric device quickly saturated and remaining stuck in a low-resistance state (LRS) due to a lack of Vo (3). Introducing a bilayer Al2O3/HfO2 dielectric significantly decreased switching power consumption to a few microwatts range compared to the stoichiometric device. This reduction is attributed to the rapid formation of Vo within the Al2O3 layer, subsequently stimulating Vo formation within the HfO2layer (4). However, the hydrogen plasma-treated device still maintains the lowest power consumption.Further investigation involved in changing the TE material, Ru and TiN to understand the impact of the TE, given its working function and interface barriers significantly affect the distribution of Vonear the TE. The device using Ru as the TE switched with a 3nA compliance current (1). Introducing nitrogen plasma treatment to the bottom electrode of the TiN device improved its switching behavior due to the reduction Vo near the BE because of formation of the Hf-N bond and led to increase the Vo near the TE (5). This enhancement was marked by a reduction in switching power to picowatts and stabilization of the conductive filament within the oxide. This device demonstrated improved conductance quantization.REFERENCES Patel, Y.; Misra, D.; Triyoso, D.; Clark, R.; Tapily, K.; Consiglio, S.; Wajda, C.; and Leusink, G., "RRAM devices with plasma treated hfo2 with Ru as top electrode for in-memory computing hardware," ECS Transactions, 104(3), p. 35, 2021, DOI: 10.1149/10403.0035ecst.Wong, H.-S. P.; Lee, H. Y.; Yu, Sh.; Chen,Y.; Wu, Y.; Chen, P. Ch.; Lee, B.; Chen, F.T.; Tsai, M. G., "Metal–Oxide RRAM," Proceedings of the IEEE, 2012, DOI: 10.1109/JPROC.2012.2190369.Zeinati, A., Misra, D., Triyoso, D.H., Clark, R.D., Tapily, K., Consiglio, S., Wajda, C.S., Leusink, G.J. "Process Optimization to Reduce Power in hfo2-Based RRAM Devices for in-Memory Computing," ECS Meeting s, vol. MA2022-02, 806 (2022). Doi: 10.1149/MA2022-0215806mtgabsMisra, D.; Zhao, P.; Triyoso, D.; Clark, R.; Tapily, K.; Consiglio, S.; Wajda, C.; Leusink, G., "Dielectrics and Metal Stack Engineering for Multilevel Resistive Random-Access Memory," ECS Journal of Solid-State Science and Technology, 9, 05300, 2020. DOI: 10.1149/2162-8777/ab9dc5.Wang, M.-H.; Chang, T.-Ch.; Shih, Ch.-Ch., "Performance improvement after nitridation treatment in hfo2-based resistance random-access memory," Applied Physics Express, 2018. DOI: 10.7567/APEX.11.084101.

Using Nanoscale Metal Oxide Films to Investigate the Influence of Anode Interfaces on Lithium Battery Performance

As renewable energy and battery-powered technologies become more widespread, high energy-density and high-performing batteries are required to meet society’s needs. While lithium-ion batteries have been the staple, their energy density development has been slow, and at gravimetric energy densities of around 250 Wh/kg, they are approaching their theoretical limit.1 The lithium-metal battery (LMB) is considered a next-generation battery due to high theoretical energy densities (ex: Lithium-Sulfur, 2600 Wh/kg), and lithium metal’s high gravimetric capacity (3860 mAh/g) and low reduction potential (-3.04 V vs S.H.E.). However, commercialization of LMBs has been limited due to various issues.Two properties that dictate the performance of the LMBs are: 1. The composition of the solid electrolyte interphase (SEI), an electronically conducting, yet passivating, layer at the anode-electrolyte interface, and 2. The morphology of the lithium deposited at the anode. Morphological studies focus on creating dense, low surface area, deposits that limit SEI fracturing and the formation of electronically disconnected lithium. SEI quality is improved by incorporating inorganic or anion-rich SEIs, formed from the electrolyte salt, to promote SEIs that are mechanically robust, ionically conducting, and homogeneous. Our group’s previous work aimed to improve LMB performance via both routes by growing resistive Al2O3 coatings on the copper (Cu) current collector using atomic layer deposition (ALD). Defects in the thin film create areas of low resistance that behave like ultramicroelectrodes which encourage radial diffusion of lithium ions to the nuclei promoting lateral growth and producing low surface area, dense, planar lithium deposits. Simultaneously, the Al2O3 coating’s Lewis acidic properties promote the decomposition and subsequent incorporation of inorganic electrolyte species into the SEI.We present a study of how the different interfaces present at the anode in LMBs impact SEI composition and battery performance. To hold the Li nucleation morphology at the anode constant, we deposit metal oxide films of a fixed resistance onto the Cu current collector, generating planar, low surface area, lithium deposits. This experimental design allows us to decouple the effect of the metal oxide thin film-electrolyte interface on SEI quality and battery performance from that of the lithium morphology. First, as shown in Fig. 1a, different metal oxide films of equal resistance, but different thicknesses, are grown via ALD, confirmed by measuring the first-cycle nucleation overpotential. The resistive metal oxides investigated are Al2O3, HfO2, AlHfxOy, and ZrO2. Scanning electron microscopy results indicate that all cells modified with equal resistance metal oxide films exhibit the same low surface area, dense, planar Li nucleation morphology. However, long-term cycling tests show differences in cell performance and life cycle. Subsequently, the composition of the SEI is investigated using X-ray photoelectron spectroscopy (XPS). Through XPS, an elemental atomic ratio analysis is conducted to investigate the relative number of species derived from the anion of the electrolyte versus the solvent of the electrolyte to reflect the anion-derived nature of the SEI. Additionally, high-resolution peaks are used to determine the relative abundance of high-quality SEI species such as lithium fluoride. This analysis confirms that the metal oxide thin film tunes the SEI composition. Additionally, we identify trends present between the SEI quality of the ALD-modified cell and its performance.To further investigate the thin film-electrolyte interface, a set of cells modified with binary stacked metal oxide thin films with two different stack orders were created, as shown in Fig. 1b. Investigating SEI composition and LMB performance, with the morphology fixed by the nucleation overpotential, allowed for deconvolution of the impact of the Cu-thin film interface and thin film-electrolyte interface. Both interfaces can in principle impact the battery’s function because 1. The Cu-thin film interface controls the electron transport to form Lio from Li+ ion during electrodeposition, and 2. The thin film-electrolyte interface can modulate the SEI. Our results indicated that the SEI and performance were both primarily regulated by the thin film-electrolyte interface. Based on our fixed-resistance and binary stack experimental design, we propose that modulation of the SEI composition by the metal oxide coating controls LMB performance when the Li nucleation morphology is fixed. This result suggests the potential for tuning LMB performance by careful selection of the metal oxide interfacial coating. References (1) Cheng, X.-B., et al. Toward Safe Lithium Metal Anode in Rechargeable Batteries: A Review. Chem. Rev. 2017, 117 (15), 10403–10473. https://doi.org/10.1021/acs.chemrev.7b00115.(2) Oyakhire, S. T., et al. Electrical Resistance of the Current Collector Controls Lithium Morphology. Nature Communications 2022, 13 (1), 3986. https://doi.org/10.1038/s41467-022-31507-w. Figure 1

Impact of stacking sequence and sulfurization duration on the growth of pyrargyrite Ag3SbS3 absorber layers

Pyrargyrite Ag3SbS3 is a promising absorber for thin-film solar cells. In this study, the impact of precursor stacking sequence and sulfurization duration on the growth and properties of Ag3SbS3 films was investigated. Initially, the Ag3SbS3 films produced by depositing Sb/Ag and Ag/Sb/Ag metal stacks and then sulfurizing at 300 °C crystallized in rhombohedral structure with (113) preferred orientation. The film produced from the Sb/Ag stack had a uniform and large-grained morphology up to a thickness of 1150 nm, and a direct bandgap of 1.65 eV; whereas the film prepared with the Ag/Sb/Ag stack exhibited nonuniform grain morphology with decreased film thickness, and increased bandgap energy (1.70 eV). Secondly, the Ag3SbS3 films produced from the Sb/Ag stack by increasing sulfurization duration from 10 to 90 min increases the crystallite size from 26 to 27 nm, enhances the grain compactness and uniformity, varies the bandgap in the range of 1.65–1.69 eV, and electrical resistivity. The solar cells fabricated using the films produced by sulfurizing the Sb/Ag stack for 30 min duration exhibited a maximum power conversion efficiency of 0.52% with an VOC of 471.6 mV, JSC of 2.0 mA/cm2, and FF of 55.0%. This study offers a pathway for the advancement of Ag3SbS3 thin-film solar cells.

Experimental investigation on the effects of stainless-steel mesh reinforcing layers on low-velocity impact response of hybrid thermoplastic glass fiber composites

This study aims to assess the hybridization effect on the perforation threshold of Low-Velocity Impact (LVI) in thermoplastic glass composite laminates, incorporating layers of resin-impregnated stainless-steel mesh. Reinforcing methodologies such as hybridization are recently being adopted as a practical approach to increasing the energy-absorbing capacity of polymer composites. In the current paper, a multi-step hot press lamination method has been employed to fabricate the hybrid composite laminates strengthened with stainless-steel mesh layers. Several stacking sequences, metal mesh wire sizes, orientation and position relative to the impactor have been examined under various LVI energies. It was revealed that the LVI penetration energy was increased for the thermoplastic-based composite laminates reinforced with stainless-steel mesh layers. Furthermore, the LVI penetration energy threshold was significantly influenced by the metal mesh wire size, orientation and stacking sequence. Finally, the backlight method capability was assessed to detect the after-impact interlaminar damages.

Impact of work function metal stacks on the performance and reliability of multi-Vth RMG CMOS technology

Multi-Vth CMOS device technologies have become standard for System-on-Chip designs. In Replacement Gate technologies, distinct device Vth’s are achieved by deploying different work function metal stacks, and thus concerns exist about the possible chemical interaction of different gate metals with the underlying dielectrics potentially affecting the device performance and reliability. We present a comprehensive study, comprising both electrical measurements and simulations, carried out on a planar transistor platform with state-of-the-art gate stacks. Two different metal stacks are deployed to fabricate low-Vth and ultra-high Vth pMOS and nMOS device flavors. The study provides fundamental insights on the impact of TiAl-based gate metal on EOT, gate leakage, interface quality, carrier mobility, short channel performance, PBTI and NBTI reliability.

Investigation of dual work function metal (DWFM) gate stacks with ALD TaAlN and TaAlC for multi threshold voltages (VTHs) engineering in MOS device integration

This study investigates methods to modulate the effective work function (EWF) and control the multiple threshold voltages (VTHs) of metal-oxide-semiconductor (MOS) devices by applying metal electrodes with different work function materials (WFMs), including a single layer of n-type (TaAlC) and p-type (TaAlN) as well as their stacked structures, through atomic layer deposition (ALD). Dual-Work-Function-Metal (DWFM) gate is a crucial aspect of confirming the feasibility of metal gate stacks in MOS devices for a complementary metal-oxide-semiconductor (CMOS) integration scheme. The gate stack structure of p-Si/IL (Inter layer)/HfO2/DWFM (p/n-type compatible metal stack)/W exhibits good adhesion and even chemical composition distribution, as evidenced by transmission electron microscope (TEM) and energy dispersive spectrometer (EDS) analysis. By fabricating MOS capacitors using this WFM structure and extracting EWF from the measured capacitance-voltage (C–V) characteristics, EWF values of 4.62 eV and 4.99 eV were identified both before and after annealing using forming gas, indicating pWFM-like properties. These properties are attributed to the strengthened Al–O bonds and reduced CO peaks seen in x-ray photoelectron spectroscopy (XPS) analysis. The use of different Ta precursor from Tris(diethylamido)(tert-butylimido)tantalum(V) (TBTDET) as well as TaCl5 resulted in the increase of the EWF following the unique p-WFM like feature. As candidates for WFM electrode in metal-oxide-semiconductor field effect transistor (MOSFET) with the DWFMs (n/p stacks) were evaluated, resulting in a VTH of 0.84 V that places in the middle of the VTH shift range from 0.6 V (nWFM) to 1.16 V (pWFM), approximately. The DWFMs allow for modulation of the EWF, which in turn reduces ambiguity in addressing replacement metal gate (RMG) challenges and opens up new avenues for achieving multi-VTH solutions in CMOS integration schemes.

CuSbS2 thin films and solar cells produced from Cu/Sb/Cu stacks via sulfurization

Phase-pure crystalline chalcostibite (CuSbS2) thin films were prepared by depositing Cu/Sb/Cu metal stacks using a thermal evaporation method, followed by sulfurization at 400oC and 430oC for different durations. The investigation revealed the formation of a dominant orthorhombic CuSbS2 phase accompanied by a minor Sb2S3 phase in the film stacks sulfurized at 400oC for 10–60 min. Extending the reaction time to 90 min triggered a decrease in the Sb2S3 phase and the emergence of an additional famatinite (Cu3SbS4) phase alongside the dominant CuSbS2 phase. Sulfurization of the film stack at 430oC for 10 min similarly produced a Cu3SbS4 secondary phase. When sulfurization was maintained beyond 30 min at 430oC, it resulted in phase-pure CuSbS2 films, characterized by a crystalline grain size of 25.9 nm, direct bandgap of 1.41 eV, and hole mobility ranging from 0.6–1.0 cm2V−1s−1. Thin film solar cells fabricated using the CuSbS2 absorbers grown at 430oC for 30–90 min displayed exceptional device efficiency due to the formation of phase-pure and highly crystalline films. Specifically, solar cells fabricated using the CuSbS2 absorber sulfurized for 60 min demonstrated a peak device efficiency of 2.2%, featuring an open-circuit voltage of 546.6 mV, short-circuit current density of 12.8 mA/cm2, and a fill factor of 31.3%. This study provides a reference for preparing highly crystalline CuSbS2 thin films for efficient solar cells.

Realization of low specific-contact-resistance on N-polar GaN surfaces using heavily-Ge-doped n-type GaN films deposited by low-temperature reactive sputtering technique

We developed a low-temperature ohmic contact formation process for N-polar GaN surfaces. Specific-contact-resistances of 9.4 × 10−5 and 2.0 × 10−5 Ω cm2 were obtained using Ti/Al metal stacks on heavily-germanium-doped GaN films, which were deposited at 500 °C and 600 °C using a radical-assisted reactive sputtering method, respectively. The electrode sintering temperature was as low as 475 °C. Carrier concentrations for the 500 °C and 600 °C samples were 2.6 × 1020 and 1.8 × 1020 cm−3, respectively. These results suggest that this method is highly effective in reducing the contact resistance of GaN devices with low thermal budgets.

Low resistance ohmic contact of multi-metallic Mo/Al/Au stack with ultra-wide bandgap Ga2O3 thin film with post-annealing and its in-depth interface studies for next-generation high-power devices

Ultra-wide band gap materials like β-Ga2O3 is considered as a potential candidate for power devices owing to their high breakdown voltage in contrast to the conventional semiconductors. The performance and the figure-of-merit for power devices critically depend on resistance offered by ohmic contact of metal with ultra-wide gap materials. However, high-quality ohmic contacts with Ga2O3 presents a significant challenge due to Fermi-level pinning and formation of Schottky barriers for the majority of metal contacts. Here, we investigated the electrical characteristics and interfacial reactions of Au/Al/Mo metal stack with β-Ga2O3 thin film at various annealing temperatures to demonstrate the ohmic contact formation mechanism. In-depth surface-sensitive XPS and UPS are employed to study the interface of metallic stack/Ga2O3 thin film. Our results indicate that post-annealing at high temperatures led to the intermixing of the metallic stack and results in the formation of binary intermetallic compounds of Al and Au. The intermetallic compound diffuses into the Ga2O3 layer and resulting in the creation of an oxygen-deficiency near the interface and helping to achieve contact resistance of 7.15 × 10−6 Ω cm2. This study establishes a robust foundation for the expanded utilization of Ga2O3 in power electronics and optoelectronics devices, emphasizing the vital role of interface engineering.

A robust Ni/Au process and mechanism for p-type ohmic contact applied to GaN p-FETs

In this study, a new robust ohmic contact preparation process for GaN p-FETs application is developed on p-GaN/AlGaN/GaN, which excluded the commonly used descum step. A specific contact resistivity of approximately 2.0×10–3 Ω·cm2 is obtained based on Ni/Au metal stack. X-ray photoelectron spectroscopy (XPS) analysis revealed that the p-GaN surface underwent oxidation by O2 plasma in the descum step, forming Ga2O3 as a barrier layer between the metal and p-GaN. The resulting Ga2O3 could not be completely removed using a hydrochloric acid solution, resulting in a Schottky contact. Moreover, the Ni/Au ohmic contact mechanism was revealed for the first time by varying the O2 content in the annealing atmosphere. The X-ray transmission electron microscopy–energy-dispersive X-ray spectroscopy and XPS results proved that the Ni (III) oxide or Ni2O3 present at the metal/p-GaN interface and the Ga vacancies formed on the p-GaN surface played a crucial role in facilitating the formation of ohmic contacts.

Ta/Al/CuW low temperature ohmic contacts for GaN-on-Si HEMT

We proposed a low temperature Au-free ohmic contacts of GaN-on-Si HEMT with the Ta/Al/CuW metal stack. The CuW was deposited by using the dual-target magnetron sputter deposition method. The annealing conditions and recess depth of ohmic area were systematically investigated. By utilizing the Ta/Al/CuW structure, an improved contact characteristic (0.49 Ω·mm) is obtained following annealing at 550 °C for 10 min in vacuum, with the recess depth of 30 nm(±2 nm). This performance surpasses that of Ta/Al/W Au-free contacts (1.07 Ω·mm). Furthermore, both the Ta/Al/CuW ohmic contacts (RMS = 6.3 nm) and the Ta/Al/W ohmic contacts (RMS = 6.0 nm) exhibit smooth surface morphology. Compared to Ti contact layer, Ta demonstrates superior performance in low temperature contact and breakdown test. Amorphous Ta layer can effectively suppress Cu diffusion. The GaN-on-Si HEMT was also fabricated based on Ta/Al/CuW Au-free ohmic contacts, exhibiting excellent DC characteristics.

Improvement of Ti/Al/Ti Ohmic contacts on AlGaN/GaN heterostructures by insertion of a thin carbon interfacial layer

This Letter reports on the improvement of the morphological and electrical behavior in Ti/Al/Ti Ohmic contacts on AlGaN/GaN heterostructures by the insertion of a thin carbon interfacial layer. In particular, the presence of a carbon layer between the Ti/Al/Ti metal stack and the AlGaN surface leads to the lowering of the annealing temperature (down to 450 °C) required to obtain linear I–V curves and to the improvement of the contacts surface morphology. The temperature dependence of the specific contact resistance was explained by the thermionic field emission, with a reduction in the barrier height ΦB down to 0.62 eV in the annealed contacts with the interfacial carbon layer. The experimental evidence has been justified with the formation of a thin low work function TiC layer, which enhances the current conduction through the metal/AlGaN interface.

A comparative study of hole integrity performance in composite‐metal stacks using coated and uncoated tungsten carbide drill bits

AbstractThis study aims to develop tetrahedral amorphous carbon nanocomposite layer coated tungsten carbide drill bits for single shot drilling of composite metal stack. Different coatings were tested for hole integrity performance compared to an uncoated tool and the results were validated using process capability six‐pack analysis. The drilling process employed a 4.85 mm twist drill with a feed rate of 0.05 mm/rev and spindle speed of 2600 rev/min. The experimental results indicate that, all the coated tools produce H9 tolerance holes while uncoated tool produced H7 tolerance holes with 18 % to 35 % better results. But statistical results show that all the tools including uncoated tool require improvement to stay within the control limits. The hole circularity error obtained by all the tools were below 24 μm in both the panels and is supported by the statistical results as well. The uncoated tool exhibited 17.91 % better surface roughness in aluminium panel compared to coated tools, while coated tools produced 17.2 % to 22.3 % better surface roughness in composite panel. Statistical results suggested that, improvement is necessary when drilling aluminium panel by all the tools while dopant added coated tools produce better results in composite panel.