Metal-semiconductor Field-effect Transistor Devices Research Articles

Novel graphene-based OPFET for optoelectronic applications

Graphene-based FET (Field Effect Transistor) has been widely explored for high speed optical applications such as photodetectors, terahertz modulators etc. On the other hand, graphene MESFET (Metal-Semiconductor Field Effect Transistor) which is not yet explored bears a thin line of distinction with respect to the graphene FET i.e. the oxide/insulator capacitance in graphene FET is replaced with dipole capacitance in graphene MESFET. This thin difference creates a significant variation in the characteristics of both the devices. In this paper, we comparatively analyze the photogating, high frequency amplification, inter-band, and intra-band performance of graphene FET and graphene MESFET devices for photodetection and terahertz modulation applications.

A novel SOI MESFET to spread the potential contours towards the drain

ABSTRACT This paper presents a new structure of Metal Semiconductor Field Effect Transistor (MESFET) for high power applications. One of the problems that we face in the design of the MESFET devices is that in most cases, the increase of breakdown voltage is accompanied by a decrease in the saturation drain current. Our aim to propose this structure is to improve these two parameters simultaneously. Using the insulator region under the sides of the gate (IR) and the hide field plate (HFP) in the buried oxide (BOX) are the fundamental solution for improving these parameters. We named the proposed structure as spread potential contours towards the drain MESFET (SPC-MESFET). By applying the proposed structure, the drain current and the breakdown voltage improve 20 and 27 percent compared to a conventional structure (C-MESFET), respectively. Therefore, the proposed device has a higher maximum power density than the C-MESFET structure. Also, this idea reduces the gate capacitance and thus the frequency characteristics such as cut off frequency (fT), maximum oscillation frequency (fmax), and Maximum Available Gain (MAG) improve in comparison with the C-MESFET structure.

MoOx/Au Schottky‐Gated Field‐Effect Transistors and Their Fast Inverters

Abstract2D transition‐metal dichalcogenides (TMDs) are considered to have high potential for application in consumer electronics. For such applications, they require low threshold, fast operation, and simple fabrication processes. Previously reported 2D TMD metal–insulator–semiconductor field‐effect transistors (MISFETs) usually suffer from high operating voltages and interfacial trap‐induced scattering as their dielectric layer reduces the applied gate voltage and introduces interfacial defects. In order to avoid such problems, 2D MoS2‐based Schottky‐gated metal–semiconductor field‐effect transistors (MESFETs) are developed. Such devices rely on the newly developed MoOx/Au gate electrode. They obtain superior transport mobility, up to 160 cm2 V−1 s−1, compared to an equivalent channel back‐gated MISFET, which only reaches 6.9 cm2 V−1 s−1. Furthermore, the back electric field is utilized to tune the on–off current, SS, and threshold voltage of the MESFET to adapt to different operation requirements. In an integrated prototype device, a MESFET‐based inverter exhibits a faster switching behavior than a mirrored inverter driven by a MISFET. This work provides a reliable strategy for high‐performance MESFET devices, which may expand the 2D material device applications into future consumer electronics.

The effect of the undoped GaN/buffer-layer interface on the operation of Schottky diodes and MESFET devices

The effect of the interfacial region lying in between undoped GaN (u-GaN) and the buffer-layer on the forward current properties of lateral-type GaN Schottky diodes and planner GaN metal-semiconductor-field-effect-transistors (MESFETs) grown on sapphire substrates has been investigated. Experimental results have revealed higher current densities for devices grown on patterned sapphire substrates (PSS) compared to flat sapphire substrates (FSS) owing to the different carrier transport properties of the interfacial regions. Simulations using the charge transport model showed a good agreement with the experimental results. It is disclosed that the interfacial region is acting as channel in which the current passes in between the device metallic contacts. Owing to the presence of the interfacial regions, the lateral Schottky diodes exhibit high current densities but without change in their on-state-voltage, whereas the planar MESFETs could hardly reach cut-off or show saturation behavior. Studying the effect of the interfacial region on the operation of GaN power devices would help in optimizing the device design and efficiency, and further facilitate their monolithic integration with GaN-based LEDs.

Monolithically Integrated MESFET Devices on a High-Speed Silicon Photonics Platform

We present the design and fabrication of complimentary metal-semiconductor field-effect transistors (MESFETs) monolithically integrated on a high-speed silicon photonics platform. The transistors were built in an existing silicon photonics process without any additional process steps or modifications to maintain consistent photonics performance. The MESFETs showed a threshold voltage of -1.4 and 2.0 V for NMES and PMES, respectively. The NMES transconductance was measured to be 46.4 μS/μm, and the cutoff frequency was shown to be 2.2 GHz. Transistors of this design can be simply integrated into silicon photonics platforms for on-chip feedback circuits.

Physically based model for trapping and self-heating effects in 4H-SiC MESFETs

In order to accurately and simply extract the trapping parameters in SiC metal semiconductor field effect transistors (MESFETs) a method is proposed based on device dc and ac small-signal models. By combining modeling techniques, material physics, and measured device characteristics, we are able to estimate the important information about the trap property and heat flow in 4H-SiC material and their influences on performance of MESFET devices, including gate lag, frequency-related dispersion, and the self-heating effect. Simulations indicate that the gate lag is due to the traps located at the channel/buffer interface and the transition frequency is up to ∼ MHz at 600 K.

Effect of interface roughness on silicon-on-insulator–metal-semiconductor field-effect transistor mobility and the device low-power high-frequency operation

We have developed a simulation model based on the solution of the Boltzmann transport equation (BTE) for modeling n-channel silicon-on-insulator (SOI) metal-semiconductor field-effect transistor (MESFETs) using the ensemble Monte Carlo device simulation technique. All relevant scattering mechanisms for the silicon material system have been included in the model. In addition to phonon scattering, to properly describe the operation of the SOI MESFET devices, in our theoretical model we have also included surface or interface-roughness scattering. Following Fischetti and Laux[J. Appl. Phys. 89, 1205 (2001)] we first model interface roughness as a real space scattering event, separated into specular and diffusive (isotropic) type of reflection from an ideal atomically flat interface. This model gives rise to low-field silicon electron mobility values in agreement with available experimental data. To further verify our mobility results, we also treat interface roughness as a boundary condition based on the Boltzmann-Fuch method. To examine the performance improvement of this device structure, in contrast to some previous studies, here we have simulated analogous SOI MESFET and SOI MOSFET devices. The results of these investigations suggest that the mobility of the SOI MOSFET device follows the experimental values and the mobility of the SOI MESFET is three to five times higher than that of the SOI MOSFET in the subthreshold and the on-state regime. These high mobility values suggest that this device structure is a promising candidate for low-power high-frequency applications.

Microwave power SiC MESFETs and GaN HEMTs

We have fabricated SiC metal semiconductor field effect transistors (MESFETs) with more than 60 W of output power at 450 MHz from single 21.6 mm gate periphery devices (2.9 W/mm) and 27 W of output power at 3 GHz from single 14.4 mm SiC MESFET devices (1.9 W/mm). We have also demonstrated more than 6.7 W/mm CW power from 400 μm GaN/AlGaN high electron mobility transistors devices for X band (10 GHz) applications. These excellent device performances have been attributed to the improved substrate and epitaxial films quality, optimized device thermal management, and enhanced device fabrication technologies. The substrates and epitaxial films from different sources were compared and some showed significant less SiC substrate micropipes confirmed by X-ray topography and epitaxial defects characterized by optical defect mapping.

A parallel implementation of an electrothermal simulation for GaAs MESFET devices

This paper describes the implementation of a Gallium Arsenide (GaAs) Metal-Semiconductor Field Effect Transistor (MESFET) device simulation on a relatively low cost transputer-based parallel system. The physical modeling consists of a comprehensive two-dimensional energy transport time-dependent model taking into account thermal heating effects within the device lattice suitable for steady-state and transient analysis. The semiconductor equations are solved by a Gauss-Seidel point iterative method with successive relaxation and discretised using a finite-difference scheme on a nonuniform grid. Algorithms targeted at message passing Multiple-Instructions Multiple Data (MIMD) distributed memory architectures are described. The efficiency and stability of the parallel algorithms are briefly discussed. A performance model which characterizes the simulation in terms of its efficiency and speed-up for any problem size on any number of processors is presented. A parallel speed-up of 14 is feasible on an array of 16 transputers for a typical MESFET simulation.

Metal semiconductor field effect transistor based on single crystal GaN

In this letter we report the fabrication and characterization of a metal semiconductor field effect transistor (MESFET) based on single crystal GaN. The GaN layer was deposited over sapphire substrate using low pressure metalorganic chemical vapor deposition. MESFET devices were fabricated on isolated mesas using TiAu for the source and drain ohmic contacts and silver for the gate Schottky. For devices with a gate length of 4 μm (channel opening, i.e., source to drain separation of 10 μm), a transconductance of 23 mS/mm was obtained at −1 V gate bias. Complete pinch-off was observed for a gate potential of −12 V.

Characterization of ion-implanted InxGa1−xAs/GaAs 0.25 μm gate metal semiconductor field-effect transistors with F t≳100 GHz

This work presents millimeter wave performance achieved by ion-implanted InGaAs/GaAs metal semiconductor field-effect transistor devices. A current gain cutoff frequency ft of 126 GHz and maximum frequency of oscillation fmax of 232 GHz have been measured for 0.20 μm gate length devices. The ft and low-field Hall mobility data, measured at 300 and 112 K, lead us to conclude that the average electron velocity under the gate is mainly due to the high-field velocity rather than low-field electron mobility.

Instability and gate voltage noise in GaAs metal-semiconductor field-effect transistors

GaAs metal-semiconductor field-effect transistor devices grown on semi-insulating substrates are shown to display noise spectra with a f−3/2 high-frequency roll-off. This is interpreted as diffusion noise from generation-recombination events at traps in the semi-insulating substrate. This interpretation is confirmed by the instabilities and oscillations that occur when the devices are operated under a large drain bias.

A novel basis set for quantum calculations in MESFET and JFET devices

Sub-band occupation in MESFET (metal-semiconductor field-effect transistors) and JFET (junction field-effect transistor devices) has been modelled by use of a simple (sinusoidal) basis set. Such a simple basis set has easily evaluated matrix elements, allowing calculations to be easily performed. The authors have calculated sub-band energies and Fermi energy against electron concentration in these devices and find good agreement with previously calculated results. They have compared gate voltage/electron concentration curves calculated in their quantum model with the abrupt depletion approximation. The quantum curves show no structure and good agreement with the abrupt depletion model. This shows the abrupt depletion model to be an excellent approximation in these devices for electrostatic problems, even in the quantum limit (one occupied sub-band).

The effects of heavy doping on I– V characteristics of GaAs JFET and MESFET devices

The effects of heavy doping on the I– V characteristics and the transconductance of a heavily doped GaAs junction field-effect transistor (JFET) and a metal-semiconductor field-effect transistor (MESFET) are analyzed. Calculations were carried out by taking into account the heavy doping effects such as carrier degeneracy and bandgap narrowing. The results show that carrier degeneracy has a strong influence on the built-in potential in the junction between gate and channel and on the I– V characteristics of the heavily doped enhancement-mode JFET (E-JFET) and MESFET (E-MESFET) devices. These findings are important for modeling and design of heavily doped GaAs JFETs and MESFETs as well as other types of GaAs devices for VLSI applications.