Metal Oxide Semiconductor Capacitor Structure Research Articles

Hf–O–N and HfO 2 barrier layers for Hf–Ti–O gate dielectric thin films

Hf–O–N and HfO 2 thin films were evaluated as barrier layers for Hf–Ti–O metal oxide semiconductor capacitor structures. The films were processed by sequential pulsed laser deposition at 300 °C and ultra-violet ozone oxidation process at 500 °C. The as-deposited Hf–Ti–O films were polycrystalline in nature after oxidation at 500 °C and a fully crystallized ( o)-HfTiO 4 phase was formed upon high temperature annealing at 900 °C. The Hf–Ti–O films deposited on Hf–O–N barrier layer exhibited a higher dielectric constant than the films deposited on the HfO 2 barrier layer. Leakage current densities lower than 5 × 10 A/cm 2 were achieved with both barrier layers at a sub 20 Å equivalent oxide thickness.

Proposal of a Metal–Oxide–Semiconductor Silicon Optical Modulator Based on Inversion-Carrier Absorption

A novel silicon optical modulator, originally based on inversion-carrier absorption, with a metal–oxide–semiconductor capacitor structure has been proposed and successfully developed. In this report, we will describe experimental results for a modulator that is fabricated on a silicon-on-insulator (SOI) substrate. The device consists of a 2- to 5-mm-long and 1.5-µm-thick (110) SOI core and a surrounding clad of 1.0-µm-thick buried oxide underneath and doped polysilicon on top. Infrared light absorption by inversion carriers is not large enough in the 1.55 µm wavelength regime. However, an optical response of 0.24% at a gate voltage of 11.5 V is obtained. Preliminary analysis has been also conducted for the potentiality of the optical modulator based on inversion-carrier absorption. It is predicted that this modulator will be more effective in deeper infrared regions unlike other modulators such as the Mach–Zehnder interferometer.

Novel Dry-Type Glucose Sensor Based on a Metal–Oxide–Semiconductor Capacitor Structure with Horseradish Peroxidase + Glucose Oxidase Catalyzing Layer

In this paper, we present a novel dry-type glucose sensor based on a metal–oxide–semiconductor capacitor (MOSC) structure using SiO2 as a gate dielectric in conjunction with a horseradish peroxidase (HRP) + glucose oxidase (GOD) catalyzing layer. The tested glucose solution was dropped directly onto the window opened on the SiO2 layer, with a coating of HRP + GOD catalyzing layer on top of the gate dielectric. From the capacitance–voltage (C–V) characteristics of the sensor, we found that the glucose solution can induce an inversion layer on the silicon surface causing a gate leakage current flowing along the SiO2 surface. The gate current changes ΔI before and after the drop of glucose solution exhibits a near-linear relationship with increasing glucose concentration. The ΔI sensitivity is about 1.76 nA cm-2 M-1, and the current is quite stable 20 min after the drop of the glucose solution is tested.

Comparative Studies of Atomic Layer Deposition and Plasma-Enhanced Atomic Layer Deposition Ta2O5 and the Effects on Electrical Properties of In situ Nitridation

Ta2O5 and TaOxNy thin films were deposited by atomic layer deposition (ALD) from Ta(NMe2)5 (PDMAT) with water, oxygen plasma, and nitrogen added oxygen plasma. The film properties were comparatively investigated focusing on the electrical properties from metal oxide semiconductor capacitor structure with 10 nm Ta2O5 or TaOxNy. The results show that plasma-enhanced ALD (PE-ALD) Ta2O5 film has better electrical properties including lower interface state density and leakage current than thermal ALD. Moreover, PE-ALD TaOxNy shows the best properties, indicating the beneficial effects of in situ nitridation. Especially, time dependent dielectric breakdown was significantly improved up to 4000 times of thermal ALD Ta2O5. These results show that, intentional in situ nitrogen incorporation with good electrical properties was successfully achieved by PE-ALD using nitrogen–oxygen mixture.

Fabrication and charging characteristics of MOS capacitor structure with metal nanocrystals embedded in gate oxide

Metal–oxide–semiconductor capacitor structure with metal nanocrystals embedded in the gate oxide for the application of nonvolatile memory (NVM) is fabricated. Optimal process parameters are investigated and Au nanocrystals are adopted in this paper. High-frequency capacitance versus voltage (C–V) and conductance versus voltage (G–V) measurements demonstrate the memory effect of the structure which is shown to originate from the confined states of metal nanocrystals. Capacitance versus time (C–t) measurement under a constant gate bias is executed to evaluate the retention performance and an exponential decaying trend is observed and discussed. It is found that with respect to semiconductor counterparts, Au nanocrystals can provide enhanced retention performance, which confirms the high capacity of Au nanocrystals for NVM applications.

Examination and evaluation of La 2O 3 as gate dielectric for sub-100 nm CMOS and DRAM technology

High- k gate dielectric La 2O 3 thin films have been deposited on Si(1 0 0) substrates by molecular beam epitaxy (MBE). Al/La 2O 3/Si metal-oxide–semiconductor capacitor structures were fabricated and measured. A leakage current of 3 × 10 −9 A/cm 2 and dielectric constant between 20 and 25 has been measured for samples having an equivalent oxide thickness (EOT) 2.2 nm. The estimated interface state density D it is around 1 × 10 11 e V −1 cm −2. EOT and flat-band voltage were calculated using the NCSU CVC program. The chemical composition of the La 2O 3 films was measured using X-ray photoelectron spectrometry and Rutherford backscattering. Current density vs. voltage curves show that the La 2O 3 films have a leakage current several orders of magnitude lower than SiO 2 at the same EOT. Thin La 2O 3 layers survive anneals of up to 900 °C for 30 s with no degradation in electrical properties.

Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure

Dual model describing effects of evaporated metal gate on low-k dielectric methylsilsesquioxane in metal oxide semiconductor capacitor structure

Characterisation of metal oxide semiconductor capacitor structure using low- k dielectric methylsilsesquioxane with evaporated aluminium and copper gate

Spin-on methylsilsesquioxane (MSQ) exhibits low dielectric constant and is an important and promising material to reduce the capacitive coupling between metal layers in semiconductor integrated circuits. However, MSQ has lower film density and therefore more porous than the traditional silicon dioxide film and could pose reliability issues. This paper characterises the MSQ using a metal oxide semiconductor capacitor (MOSC) structure with evaporated aluminium (Al) and copper (Cu) using the filament evaporation method deposited on top of a spin-on MSQ layer. Bias-temperature stressing was performed to understand the reliability of this MOSC structure with thin film MSQ as dielectric. Electrical characterisation with the aid of C– V and I– V measurements were used to understand the effect of evaporated Al and Cu on MSQ thin film. This study shows that Cu + injection through the MSQ from the evaporated Cu gate could induce electrons trapping generated from the silicon substrate. However, there is little effect observed from the evaporated Al gate on MSQ thin film. Therefore, a suitable barrier layer is necessary to stop Cu + injection through MSQ thin film before it can be integrated in very large scale integration circuit as an inter-layer dielectric material.

Properties of Polycrystalline Si1 − xGex Films Grown by Ultrahigh Vacuum CVD Using Si2 H 6 and GeH4

Polycrystalline films have been suggested as a promising alternative to the currently employed polycrystalline silicon (poly-Si) gate electrode for complementary metal oxide semiconductor field effect transistor technology due to lower resistivity, less boron penetration, and less gate depletion effect than that of poly-Si gates. We investigated the formation of poly- films by using ultrahigh vacuum chemical vapor deposition CVD with and gases, and studied their physical properties as well as electrical characteristics. The deposition rate and Ge content of poly- films increased linearly with the flux of up to a critical flux, while, above this critical flux, it is slightly changed. The resistivity of poly- films decreased as the Ge content increased, and was about one-half of that of poly-Si films at a Ge content of 45%. The capacitance-voltage measurements of metal oxide semiconductor capacitor structures with gates demonstrated that the flatband voltage of the films was lower than that of poly Si films by 0.2 V. In addition, the changes of flatband voltage with the dosage of boron and the sudden decrease of accumulation capacitance in the gate structure were investigated. Leakage current levels increased slightly due to the difference in with the increase of Ge content in poly films. © 2003 The Electrochemical Society. All rights reserved.

Characteristics of LaAlO3/Si(100) deposited under various oxygen pressures

High-k dielectric LaAlO3 (LAO) thin films were deposited by laser molecular-beam epitaxy under various oxygen pressures. X-ray diffraction showed that the LAO films were amorphous. The chemical compositions and thickness of the LAO thin films were measured using Rutherford backscattering spectrometry. Al/LAO/Si metal–oxide–semiconductor capacitor structures were fabricated and measured. The leakage current density versus voltage curves showed that the leakage current of the LAO thin films decreased by increasing the oxygen pressure of the preparation. Specifically, when prepared under the active oxygen (containing atom oxygen), the leakage current of the LAO sample was lower than that prepared under the general oxygen. All of the capacitance–voltage curves have a positive shift along the voltage axis and the flatband voltage decreased with increasing oxygen pressures during the LAO thin-film preparation.

Correlation between oxide breakdown and defects in SiC wafers

A correlation between gate oxide breakdown in metal oxide semiconductor (MOS) capacitor structures and structural defects in SiC wafers is reported. The oxide breakdown under high applied fields, in the accumulation regime of the MOS capacitor structure, is observed to occur at locations corresponding to the edge of bulk structural defects in the SiC wafer such as polytype inclusions, regions of crystallographic misorientation, or different doping concentration. Breakdown measurements on more than 50 different MOS structures did not indicate any failure of the oxide exactly above a micropipe. The scatter in the oxide breakdown field across a 10 mm × 10 mm square area was about 50%, and the highest breakdown field obtained was close to 8 MV/cm.

Plasma immersion ion implantation reactor design considerations for oxide charging

The effects of wafer bias and plasma parameters on thin oxide charging during plasma immersion ion implantation (PHI) are simulated. The simulator has been shown to determine accurately the charging currents generated during PHI. The dependence of the plasma electron temperature, ion density and plasma uniformity on charging damage in metal oxide semiconductor capacitor structures is investigated. A lower plasma electron temperature is shown to reduce charging damage. Simulation and experimental results show that for a given voltage pulse waveform there is a range of bias repetition rates allowed by limiting the charging damage below a threshold value. Within this range there exists a switch-over repetition rate that minimizes the charging damage.

Characterization of metal–oxide–semiconductor capacitors, fabricated on (111) β-SiC epilayers grown on (111) TiC

Metal–oxide–semiconductor (MOS) capacitors, fabricated on two n-type and one p-type (111) β-SiC epilayers, were characterized by C–V measurements. The β-SiC epilayers were grown on (111) bulk TiC substrates, by pyrolysis of disilylethane. Inversion, in the dark, was obtained in MOS capacitor structures on both n-type epilayers; demonstrating the feasibility of inversion mode MOS field effect transistors in β-SiC grown on TiC. The Terman method was used to estimate the interface trap density (Dit) at between 2×1011 cm−2 eV−1 and 1.4×1012 cm−2 eV−1; where Dit increased with carrier concentration.

Transport in refractory metals and their interaction with SiO 2: Comparison of tungsten and molybdenum

We have investigated sputtered and electron-beam-evaporated thin films of tungsten and molybdenum deposited onto 100 Å SiO 2. These two refractory metals have comparable room temperature resistivities (5–6 μΩ cm) and a work function at the midgap between n + and p + polycrystalline silicon. Therefore both can be considered for application as a gate electrode in submicron very large scale integration technology. We have probed their interaction with SiO 2 using Auger spectroscopy, cross-sectional transmission electron microscopy (CTEM) and with current-voltage ( I-V) characteristics of molybdenum and tungsten metal/oxide/ semiconductor (MOS) capacitors as a function of the annealing temperature. We have also measured electrical resistivity in the 4.2–300K temperature range to ascertain the differences and the similarities between the two. We find that, in terms of resistivity, the difference between the two metals is slight. Although at room temperature, ρ Mo is 10% higher than ρ w, at liquid nitrogen, molybdenum is around 30% more conductive after a 900–1000°C anneal. The interface with SiO 2 appears in CTEM to be very smooth for both. Auger depth profiling, however, reveals some interface interaction for molybdenum, but not tungsten. This is confirmed with leakage and breakdown measurements on an MOS capacitor structure 32 mm in diameter. After anneals at and above 900°C, molybdenum capacitors on 100 Å oxide are all shorted. The same annealing schedule produces a reasonable distribution of breakdown voltages for tungsten capacitors.