Metal-insulator-semiconductor High-electron-mobility Transistors Research Articles

Comparative study on characteristics of Si-based AlGaN/GaN recessed MIS-HEMTs with HfO2 and Al2O3 gate insulators**Project supported by the National Natural Science Foundation of China (Grant Nos. 61974111, 11690042, and 61974115), the National Pre-research Foundation of China (Grant No. 31512050402), and the Fund of Innovation Center of Radiation Application, China (Grant No. KFZC2018040202).

Two types of enhancement-mode (E-mode) AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) with different gate insulators are fabricated on Si substrates. The HfO2 gate insulator and the Al2O3 gate insulator each with a thickness of 30 nm are grown by the plasma-enhanced atomic layer deposition (PEALD). The energy band diagrams of two types of dielectric MIS-HEMTs are compared. The breakdown voltage (VBR) of HfO2 dielectric layer and Al2O3 dielectric layer are 9.4 V and 15.9 V, respectively. With the same barrier thickness, the transconductance of MIS-HEMT with HfO2 is larger. The threshold voltage (Vth) of the HfO2 and Al2O3 MIS-HEMT are 2.0 V and 2.4 V, respectively, when the barrier layer thickness is 0 nm. The C–V characteristics are in good agreement with the Vth’s transfer characteristics. As the barrier layer becomes thinner, the drain current density decreases sharply. Due to the dielectric/AlGaN interface is very close to the channel, the scattering of interface states will lead the electron mobility to decrease. The current collapse and the Ron of Al2O3 MIS-HEMT are smaller at the maximum gate voltage. As Al2O3 has excellent thermal stability and chemical stability, the interface state density of Al2O3/AlGaN is less than that of HfO2/AlGaN.

Modeling the Influence of the Acceptor-Type Trap on the 2DEG Density for GaN MIS-HEMTs

In this article, an analytical model on the influence of the acceptor-type trap on the 2-dimensional electron gas (2DEG) density is proposed for GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs). Based on the charge-control method, a numerical analysis of the 2DEG in both the subthreshold and above-threshold regions is carried out with the deep-level and band-tail acceptor-type traps at the AlGaN/insulator interface and the AlGaN/GaN interface. In particular, the influence of the acceptor-type trap on the 2DEG density and the gate-control capability in the subthreshold region is modeled for the first time. The results have shown that the acceptor-type trap plays an important role in weakening the gate-control capability of the 2DEG density in the subthreshold region. The experimental results, together with the modeling and numerical calculations, have shown consistent 2DEG density values under various gate voltages, which verify the proposed model.

Effects of Recessed-Gate Structure on AlGaN/GaN-on-SiC MIS-HEMTs with Thin AlOxNy MIS Gate.

This study investigated the effects of a thin aluminum oxynitride (AlOxNy) gate insulator on the electrical characteristics of AlGaN/GaN-on-SiC metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs). The fabricated AlGaN/GaN-on-SiC MIS-HEMTs exhibited a significant reduction in gate leakage and off-state drain currents in comparison with the conventional Schottky-gate HEMTs, thus enhancing the breakdown voltage. The effects of gate recess were also investigated while using recessed MIS-HEMT configuration. The Johnson’s figures of merit (= fT × BVgd) for the fabricated MIS-HEMTs were found to be in the range of 5.57 to 10.76 THz·V, which is the state-of-the-art values for GaN-based HEMTs without a field plate. Various characterization methods were used to investigate the quality of the MIS and the recessed MIS interface.

Fabrication of AlGaN/GaN MISHEMT with dual-metal gate electrode and its performances

In this study, we investigated AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MISHEMTs) with single-metal gate (SMG) and dual-metal gate (DMG) structures through experimental measurements and technology computer-aided design simulation. The DMG structure consists of nickel (Ni) in the source-side gate and titanium (Ti) in the drain-side gate metals for the distribution of an electric field. The measurement results demonstrate that the fabricated AlGaN/GaN DMG–MISHEMT produces improved device performances; this includes higher drain current (ID), higher transconductance (gm), and higher breakdown voltage than the SMG–MISHEMT. The improvement is due to the distribution of an electric field. In addition, in terms of current collapse characteristics, the DMG–MISHEMT exhibited a small change rate in ID at various quiescent bias points. These results mean that a DMG structure leads to excellent electrical characteristics.

Layered boron nitride enabling high-performance AlGaN/GaN high electron mobility transistor

The authors proposed a novel α-BN/h-BN dual-layered dielectric to fabricate AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT). In contrast to the Schottky-HEMT, the gate leakage current was suppressed by more than 6 orders of magnitude at forward voltage of 5V. An atomically smooth interface and low interface state density were obtained, benefiting from the quasi-zero lattice mismatch and the passivation effect of α-BN on AlGaN. Electrical analyses demonstrated that boosted gate drive capability, enhanced output current, and high field effect mobility were realized with inserted BN. The electrical breakdown behaviors of BN were investigated with regard to Frenkel-Poole emission mechanism and Fowler-Nordheim tunneling theory for the low and high electric field regime, respectively. This work rendered BN as a perfect candidate for dielectric insulator used in field-effect transistors.

Comparative Study of Characteristics and Interface States with and without Post‐Gate‐Annealing Treatment for AlGaN/GaN‐Recessed Metal–Insulator–Semiconductor High Electron Mobility Transistors Using HfO2 Gate Insulator on Si Substrates

Three types of enhancement‐mode (E‐mode) AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS‐HEMTs) with different barrier depths are fabricated on Si substrates. A HfO2 gate insulator with a thickness of 30 nm is grown by plasma‐enhanced atomic layer deposition (PEALD) at 300 °C. The drain current density and transconductance increase greatly after post‐gate‐annealing (PGA, 400 °C, 5 min) treatment. The Vth of the MIS‐HEMT decreases after PGA treatment and the C–V characteristics are a good match to the Vth change of the transfer characteristics. The interface states are in the form of trap states and fixed charges. The trap states at the HfO2/AlGaN interface are measured by the frequency‐ and voltage‐dependent conductivity method. The trap state density and time constant decrease after the PGA treatment. The fixed charge density can be calculated by the Vth shift. According to the calculation results, the fixed charge density also decreases. The PGA treatment can reduce the interface state density effectively and is a significant process for the gate‐recessed MIS‐HEMT.

High-performance dual-gate-charge-plasma-AlGaN/GaN MIS-HEMT

This paper presents a novel structure of dual-gate-charge-plasma (DG-CP) AlGaN/GaN metal–insulator–semiconductor high electron mobility transistor (MIS-DG-CP-HEMT) with gate oxides employing Al2O3. AlN as an interfacial layer between dielectric and semiconductor. Dual-gate technique for both CP and doped HEMT is used to improve the transport characteristics in the channel. CP-HEMT is used to enhance the conductance charge density and electron concentration at the interface of AlGaN and GaN. The DG-CP-HEMT is compared with DG-doped HEMT. The dual-gate structure helps in incorporating the two different layers of 2-dimensional electron gas (2DEG) for higher current density. Results showed a better performance of DG-CP-HEMT in term of various analog and RF parameters. HEMT gives better transconductance (29 mS), Cutoff frequency (11 GHz) and ON-state-to-OFF-state current ratio (1011), ON-resistance (6 Ω-cm2) and subthreshold slope (63 mV/dec). The proposed HEMT architecture can be used for RF applications due to its exemplary characteristics.

Investigation of Recessed Gate AlGaN/GaN MIS-HEMTs with Double AlGaN Barrier Designs toward an Enhancement-Mode Characteristic.

In this work, recessed gate AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with double AlGaN barrier designs are fabricated and investigated. Two different recessed depths are designed, leading to a 5 nm and a 3 nm remaining bottom AlGaN barrier under the gate region, and two different Al% (15% and 20%) in the bottom AlGaN barriers are designed. First of all, a double hump trans-conductance (gm)–gate voltage (VG) characteristic is observed in a recessed gate AlGaN/GaN MIS-HEMT with a 5 nm remaining bottom Al0.2Ga0.8N barrier under the gate region. Secondly, a physical model is proposed to explain this double channel characteristic by means of a formation of a top channel below the gate dielectric under a positive VG. Finally, the impacts of Al% content (15% and 20%) in the bottom AlGaN barrier and 5 nm/3 nm remaining bottom AlGaN barriers under the gate region are studied in detail, indicating that lowering Al% content in the bottom can increase the threshold voltage (VTH) toward an enhancement-mode characteristic.

InAlN/GaN metal–insulator–semiconductor high-electron-mobility transistor with plasma enhanced atomic layer-deposited ZrO2 as gate dielectric

In this letter, we present the electrical properties of the InAlN/GaN metal–insulator–semiconductor high-electron-mobility transistor (MISHEMT) with plasma enhanced atomic layer-deposited ZrO2 as the gate dielectric. The InAlN/GaN MISHEMT with an on/off current (Ion/Ioff) ratio of 1.46 × 109 as well as a subthreshold swing of 85 mV/dec was achieved. The interface trap density (Dit) decreased from 1.16 × 1012 eV−1 cm−2 (at EC − ET = 0.26 eV) to 4.68 × 1011 eV−1 cm−2 (at EC − ET = 0.40 eV), indicating a good interface property. This study suggests a feasible way for the application of ZrO2/InAlN/GaN MISHEMTs.

Effect of overdrive voltage on PBTI trapping behavior in GaN MIS-HEMT with LPCVD SiNx gate dielectric**Project supported by the National Key Research and Development Program, China (Grant No. 2017YFB0402800), the Key Research and Development Program of Guangdong Province, China (Grant No. 2019B010128002), the National Natural Science Foundation of China (Grant No. U1601210), and the Natural Science Foundation of Guangdong Province,

The effect of high overdrive voltage on the positive bias temperature instability (PBTI) trapping behavior is investigated for GaN metal–insulator–semiconductor high electron mobility transistor (MIS-HEMT) with LPCVD-SiNx gate dielectric. A higher overdrive voltage is more effective to accelerate the electrons trapping process, resulting in a unique trapping behavior, i.e., a larger threshold voltage shift with a weaker time dependence and a weaker temperature dependence. Combining the degradation of electrical parameters with the frequency–conductance measurements, the unique trapping behavior is ascribed to the defect energy profile inside the gate dielectric changing with stress time, new interface/border traps with a broad distribution above the channel Fermi level are introduced by high overdrive voltage.

Efficient Modeling of Barrier Resistance for an Improved Lumped Element Model of GaN-Based MIS-HEMT Gate Stack

A methodology has been proposed to accurately model the gate stack of Gallium Nitride (GaN) based metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs). Small-signal analysis has been performed for the device biased in the spill-over region, where electrons accumulate at the insulator/III-Nitride ’critical’ interface. Accounting for the barrier layer resistance with an accurate model yields a near but inexact match between simulation and measurement. It is found that the border trap admittance and the energy distribution of the interface trap capture cross section ( $\sigma $ ) need to be included in order to achieve a very close one. It is concluded that the interface trap density, extracted using conventional small-signal admittance methods, can be significantly off if these non-ideal effects are not incorporated within the equivalent circuit models of GaN-based MIS-HEMTs.

Mechanical tensile strain for AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors on a silicon-on-insulator substrate

The impacts of various tensile strains on both DC and RF performance of AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) on a silicon-on-insulator (SOI) substrate were investigated using pulsed-IV and pulsed-S-parameter tests. The sensitivity of MIS-HEMTs to various tensile strains was observed via pulse measurements because of the improved self-heating effect. The DC and RF performance of MIS-HEMTs on a SOI substrate were found to be enhanced with the pulse width decreasing under small tensile strain. A significant hot phonon effect was observed for MIS-HEMTs under larger tensile strain, particularly for shorter pulse widths. Additionally, an obvious reduction of fmax was observed under larger tensile strain because the channel resistance increased via the hot phonon effect, despite the increase in ft. The results indicated that tensile strain in the ultra-thin thinned substrate of AlGaN/GaN HEMTs should be carefully monitored in compact packages for high-power and high-frequency applications.

Study of E-Mode AlGaN/GaN MIS-HEMT with La-silicate Gate Insulator for Power Applications

An enhancement-mode (E-mode) AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) with La2O3/SiO2 gate insulator is investigated for high power application. The La2O3/SiO2 composite oxide formed amorphous La-silicate after post deposition annealing. Good oxide film quality and excellent La-silicate/AlGaN interface properties were achieved as evidenced by the capacitance–voltage (C–V) curves and hysteresis effect of the La-silicate on AlGaN/GaN metal–oxide–semiconductor capacitors. As a result, the E-mode AlGaN/GaN MIS-HEMT with La-silicate gate insulator shows good threshold voltage (Vth) stability and demonstrated only slightly increase in the dynamic on-resistance (Ron) after high drain bias stress test. The device also exhibits high current density of 752 mA/mm, high maximum transconductance of 210 mS/mm, low subthreshold swing of 104 mV/decade, and ION/IOFF = 107 when tested at VDS = 10 V. Furthermore, low on-resistance of 7.6 Ω mm, high breakdown voltage of 670 V, and excellent delay time of 4.2 ps were achieved, demonstrating the La-silicate MIS-HEMTs have the potential to be used for power electronic applications.

Limitations for Reliable Operation at Elevated Temperatures of Al2O3/AlGaN/GaN Metal–Insulator–Semiconductor High‐Electron‐Mobility Transistors Grown by Metal‐Organic Chemical Vapor Deposition on Silicon Substrate

Herein, the gate degradation mechanisms of gallium nitride (GaN)‐based metal–insulator–semiconductor high‐electron‐mobility transistors (MISHEMTs) utilizing Al2O3 grown by plasma‐enhanced atomic layer deposition (PEALD) are systematically investigated. By applying constant voltage stress and the time‐dependent dielectric breakdown (TDDB) methodology under variation of bias and temperature, an activation energy of 1.25 eV for the time to breakdown and a 1/E model extrapolating the lifetime are found. A maximum gate operation voltage at 298 K of 4.9 V is extrapolated, which decreases to a projected voltage of 3.5 V at 598 K operation temperature, due to an accelerated defect generation. The physical origin of the TDDB of Al2O3 is related to the formation of a percolation path by randomly generated defects in the oxide under stress bias. This mechanism, which also requires the presence of an initial defect density in Al2O3, is confirmed by Monte Carlo simulations, which are in agreement with the experimental data.

Design and Experimental Demonstration of Integrated Over-Current Protection Circuit for GaN DC–DC Converters

This article reports the design and the first experimental demonstration of the monolithically integrated over-current protection (OCP) circuit in GaN power converters. The design criteria and protection time estimation methods are proposed. Through the GaN integration platform based on normally-OFF AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MIS-HEMTs), the OCP circuit is monolithically integrated with the gate driver and GaN switches. At the over-current incident, the current sensing signal is compared with over-current thresholds, and then the generated protection action signal is clamped to disable the high-side gate driver and shut down the GaN dc-dc buck converter. The analysis of current paths, SPICE-based simulations, and numerical description of the protection process are carried out to support the proposed design criteria and estimation methods. The experimental results show that the GaN dc–dc buck converter can be protected within one duty cycle period according to the desired preset over-current thresholds. The consistent results of the calculated and measured time periods in the OCP process have verified the proposed design criteria and estimation methods. The proposed OCP circuit together with the analysis can help researchers to design and estimate the OCP process in integrated GaN power converters.

Time-dependent characteristics and physical mechanisms of AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors under different bias conditions

We experimentally investigate the time-dependent degradation of AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors subjected to different bias conditions. By means of the combined performance under OFF/SEMI-ON/ON state bias conditions, the dependence of threshold voltage (Vth), maximum transconductance (gm) and saturation drain current (Idsat) on stress mode are revealed. In the OFF-state, with the high temperature reverse bias stress, the main mechanism is the charge-trapping in the gate dielectric layer, leading to the recoverable negative shift of the Vth. In the SEMI-ON-state, because of the hot-carrier injection, the hot electrons could break the Si–H bonds, resulting in the generation of interface states and can also be captured by the trap states in the AlGaN barrier or GaN buffer. This effect will cause the decrease of saturation drain current and an unrecoverable Vth negative shift. In the ON-state, due to the attenuation of hot electrons effect, Vth hardly changes, while Idsat has a dramatic decrease caused by the self-heating effect. Low frequency noise characteristics were used to extract the defect state density, which then increases by about three orders of magnitude after SEMI-ON-state stress.

The effect of negative substrate bias on the electrical characteristics of InAlN/GaN MIS-HEMTs

The effect of the negative substrate bias (Vsub) on the device performance of the InAlN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) is studied. When the Vsub decreased from 0 V to −40 V, the two-dimensional electron gas (2DEG) electron density (n2D) under the gate region decreased, while the 2DEG electron mobility (µ2DEG) under the gate region was significantly improved. Due to the InGaN back barrier layer and the thin GaN channel layer (15 nm), the 2DEG electrons in the channel are injected into the InGaN back barrier layer with negative Vsub, leading to the decreased n2D. The decrease of the n2D caused the decrease of the collision probability between the polar optical phonon (POP) and the 2DEG electrons, and the enlarged distance between the 2DEG electrons and the AlN/GaN interface, resulting in the weaker POP and interface roughness scatterings and higher µ2DEG. This provides a possible way to increase 2DEG electron mobility and further improve the device performance of InAlN/GaN MIS-HEMTs.

Investigation of the degradations in power GaN-on-Si MIS-HEMTs subjected to cumulative γ-ray irradiation

In this work, GaN-on-Si power Metal-Insulator-Semiconductor High Electron Mobility Transistors (MIS-HEMTs) are irradiated through different regimes of cumulative γ-ray irradiation, namely 1, 2, 3, 4, and 5 kGy for the first sample; 1, 3, and 5 kGy for the second sample; 1, 5, and 10 kGy for the third sample; and 1, 10, and 20 kGy for the fourth sample. After each irradiation dose, drain current (ID), threshold voltage (VTh), and gate leakage current (Ig) are electrically characterized in all the samples. An improvement in ID with a shift in VTh is observed in all the samples, which saturates after a higher irradiation dose. X-ray photoelectron spectroscopy (XPS) analysis confirms creation of nitrogen vacancies that act as donor and improves the ID. No significant change in Ig is observed except for an increase in noise in gate leakage current. Scanning electron microscopy (SEM) shows the Al-based metallization pad degrades due to formation of small cavities. Finally, energy dispersive X-ray (EDX) analysis confirms the formation of Al native oxides due to γ-ray irradiation.

Investigation of the Trap States and $V_{\text{TH}}$ Instability in LPCVD Si3N4/AlGaN/GaN MIS-HEMTs with an In-Situ Si3N4 Interfacial Layer

A novel gate and passivation dielectric stack consisting of a thin metal-organic chemical vapor deposition (MOCVD) grown in-situ Si3N4 (3 nm) and a thick low-pressure chemical vapor deposition (LPCVD) grown Si3N4 (30 nm) in AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistor (MIS-HEMT) is proposed. The quality of the Si3N4/(Al)GaN interface and the effect on threshold voltage ( ${V}_{\text {TH}}$ ) instability and dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ in the MIS-HEMTs with/without the in-situ Si3N4 layer are investigated by high-frequency capacitance-voltage (HFCV), quasi-static (QS) ${C}$ – ${V}$ (QSCV), time-of-fly (TOF) stress/measure, and QS ${I}_{\text {D}}$ – ${V}_{\text {DS}}$ methods. It is founded that the in-situ Si3N4 interfacial layer is effective in improving the dielectric/III-N interface morphology. As a result, better ${V}_{\text {TH}}$ stability and lower ${R} _{ \mathrm{\scriptscriptstyle ON},\text {D}}/{R} _{ \mathrm{\scriptscriptstyle ON},\text {S}}$ ratio are observed in devices with the in-situ Si3N4 interfacial layer due to the reduced density of traps close to the dielectric/III-N interface. Time-dependent dielectric breakdown and Weibull performance further verified that the proposed bilayer gate dielectric stack is a promising structure for the high-reliability power transistors.

Normally-Off Tri-Gate GaN MIS-HEMTs with 0.76 mΩ·cm2 Specific On-Resistance for Power Device Applications

A GaN metal–insulator–semiconductor high electron mobility transistor (MIS-HEMT) using tri-gate architecture and hybrid ferroelectric charge trap gate stack is demonstrated for normally-off operation. Compared with the conventional planar device, the tri-gate device has the 2-D electron gas (2-DEG) channel exposed on the nanowire sidewalls, so that the trapped charges in the HfON charge-trapping layer can easily deplete the channel from the sidewalls, leading to a high positive threshold voltage ( ${V}_{\text {th}}$ ) to realize the normally-off operation. Moreover, through this electrostatic control on the sidewall, a high density of negative charge caused by hybrid ferroelectric charge trap gate stack with the optimized tri-gate structure, the tri-gate device can achieve normally-off GaN device with both low on-resistance ( ${R}_{ \mathrm{ON}}$ ) and high positive ${V}_{\text {th}}$ . The designed tri-gate device exhibits a high ${V}_{\text {th}}$ of +2.61 V at current density ( ${I}_{\text {DS}}) = 1\,\,\mu \text{A}$ /mm, a high maximum current density ( ${I}_{\text {DS, MAX}}$ ) of 896 mA/mm, a low ${R}_{ \mathrm{ON}}$ of $5.0~\Omega \!\!\cdot \!\!\text {mm}$ and a high breakdown voltage (BV) of 788 V. To the best of our knowledge, the proposed tri-gate device shows the lowest specific on-resistance ( ${R}_{ \mathrm{ON}, \text {SP}}$ ) among reported normally-off GaN device results with BV >650 V.