Metal Gate Electrode Research Articles

Two-dimensional-materials-based transistors using hexagonal boron nitride dielectrics and metal gate electrodes with high cohesive energy

Two-dimensional-materials-based transistors using hexagonal boron nitride dielectrics and metal gate electrodes with high cohesive energy

Sensitivity Analysis of a Double Source Stack Lateral TFET-Based Gas Sensor

Metal oxide semiconductor gas sensors are used recently in various roles and sectors for environmental safety as compared to other sensing technology due to its low cost, durability, longevity, and rapid sensing capability under humid condition. The current work proposes a dual stacked heterogeneous source lateral n type tunnel field-effect transistor (DSHS-nTFET) for gas sensing applications. The proposed device investigates the characteristics of the gas response. The stack source is designed to make it easier for electrons to tunnel through the tunnel barrier effectively so that the device sensitivity can be enhanced. In the device’s tunneling junction, the presence of the source stack boosts the electric field, reduces tunneling width, and then enhances the band-to-band tunneling. The gas density can be detected by modulating the work function of the metal gate present in the device. Catalytic metals used as gate contacts for this proposed double source stacking TFET design are explored for the purpose of detecting specific gases. Platinum (Pt), Cobalt (Co), Palladium (Pd), and Silver (Ag) are the metal gate electrodes utilised in this work to sense the target gases, like Carbon-mono Oxide (CO), Ammonia (NH3), Hydrogen (H2), and Oxygen (O2) respectively. The detection has been done by the electrodes work function variation due to the presence of gas density of the target gases. With the aid of the Sentaurus TCAD simulator, the suggested structure has been examined for a number of electrical parameters including electric field, surface potential, drain current, and numerous sensing characteristics pertaining to adsorption of gas molecules. According to the data achieved, the suggested DSHS-nTFET device displays a high Ion of 5.06 × 10−5 A/μ m, a low Ioff current of 3.76 × 10−20 A/μm, and also the Ion/Ioff ratio in the range of 1014. Furthermore, sensitivity parameters for DSHS-nTFET have also been examined and shown to be significantly improved. The sensitivity and reliability of the proposed sensor have also been investigated with respect to temperature fluctuations. It has been shown that the device is largely stable over the 200 K-400 K range.

Fully 3D-printed organic electrochemical transistors

Organic electrochemical transistors (OECTs) are being researched for various applications, ranging from sensors to logic gates and neuromorphic hardware. To meet the requirements of these diverse applications, the device fabrication process must be compatible with flexible and scalable digital techniques. Here, we report a direct-write additive process to fabricate fully 3D-printed OECTs, using 3D printable conducting, semiconducting, insulating, and electrolyte inks. These 3D-printed OECTs, which operate in the depletion mode, can be fabricated on flexible substrates, resulting in high mechanical and environmental stability. The 3D-printed OECTs have good dopamine biosensing capabilities (limit of detection down to 6 µM without metal gate electrodes) and show long-term (~1 h) synapse response, indicating their potential for various applications such as sensors and neuromorphic hardware. This manufacturing strategy is suitable for applications that require rapid design changes and digitally enabled direct-write techniques.

Electron-beam lithography of nanostructures at the tips of scanning probe cantilevers

We developed a process to fabricate nanoscale metallic gate electrodes on scanning probe cantilevers, including on the irregular surface of protruding cantilever tips. The process includes a floating-layer technique to coat the cantilevers in an electron-beam resist. We demonstrate gate definition through a lift-off process and through an etching process. The cantilevers maintain a high force sensitivity after undergoing the patterning process. Our method allows the patterning of nanoscale devices on fragile scanning probes, extending their functionality as sensors.

Performance Study of DM-DG-OS JL-MOSFET based Biosensor in Detecting Charged Nanometric Biospecies

In this paper, for the first time, a dual-metal double-gate with oxide stack (low-k/high-k) junctionless MOSFET (DM-DG-OS JL-MOSFET) based sensor device has been explored for finding its suitability in detecting charged nanometric biospecies under dry environment condition. The analysis of sensing performance of the device for such detection is made in terms of the absolute and the relative changes in threshold voltage (Vth). The influence of work-function difference of dual metal gate electrodes, along with the position of nanogap cavity, on the sensing metrics has been thoroughly investigated. The impact of the cavity dimensions on sensitivity parameters of the projected device is also studied. An optimum cavity dimension, for channel length (Lch) of 1 µm, is found to be 400 nm × 10 nm in yielding measurable sensitivity parameters for charged nanometric biospecies detection. A device with 1-µm Lch exhibits superior sensitivity performance in terms of percentage improvements in the absolute and the relative changes in Vth for a higher drain-side gate-metal work-function (ϕM2) relative to source-side gate-metal work-function (ϕM1) for source-side cavity (400 nm × 10 nm) compared to the case when ϕM1>ϕM2 and the cavity is located near drain-side. Respective performance enhancements are found to be 30.7% and 74% for detection of negatively charged nanometric biospecies. The sensor devices with Lch of 50 nm show the similar trend.

WSe2 as Transparent Top Gate for Infrared Near-Field Microscopy.

Independent control of carrier density and out-of-plane displacement field is essential for accessing novel phenomena in two-dimensional (2D) material heterostructures. While this is achieved with independent top and bottom metallic gate electrodes in transport experiments, it remains a challenge for near-field optical studies as the top electrode interferes with the optical path. Here, we characterize the requirements for a material to be used as the top-gate electrode and demonstrate experimentally that few-layer WSe2 can be used as a transparent, ambipolar top-gate electrode in infrared near-field microscopy. We carry out nanoimaging of plasmons in a bilayer graphene heterostructure tuning the plasmon wavelength using a trilayer WSe2 gate, achieving a density modulation amplitude exceeding 2 × 1012 cm-2. The observed ambipolar gate-voltage response allows us to extract the energy gap of WSe2, yielding a value of 1.05 eV. Our results provide an additional tuning knob to cryogenic near-field experiments on emerging phenomena in 2D materials and moiré heterostructures.

Negative Capacitance Dual Electrode Junctionless TFET Based on Si Doped HfO 2 Ferroelectric Layer: Proposal and Optimization

This work reports negative capacitance dual electrode junctionless tunnel field effect transistor (NC-DE-JLTFET) based on Si doped HfO 2 ferroelectric (FE) layer as gate-stack. This FE layer is sandwiched between conventional gate dielectric layer and gate metal electrode. As the domains of FE get aligned due to polarization in the applied electric field directions it realizes intrinsic voltage amplification. This facilitates the smaller voltage swing in the gate voltage resulting in a larger swing in drive current. This enhances gate controlability, improves scalability, lowers threshold voltage and steepers sub-threshold slope (SS). However the most crucial designing aspect of negative capacitance (NC) based device is stabilizing the net capacitance of the structure otherwise it can cause system instability due to the NC behavior. In order to stabilize this NC effect here optimization of FE layer thickness has been carried out by parametric sweep optimization. The study reported minimum SS as 20 mV/dec with FE thickness of 2.5 nm. As JLTFET is a dopingless structure, source and drain side dielectric oxide thicknesses dictate the source and drain side induced doping, respectively. Hence the device performance estimation in terms of these thickness variations is also presented here in detail.

Comparative Study of AlGaN/AlN/GaN Metal-Oxide-Semiconductor High Electron Mobility Transistors with Ni/Au Gate Electrode

In this article, Al0.28Ga0.72N/AlN/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) with Ni/Au gate metal electrode are demonstrated. NiO or Al2O3 gate oxide layer is employed as a gate dielectric layer effectively decreases the gate leakage current, enhances drain current density, and transconductance, simultaneously. As compared with the metal-semiconductor (MS) Schottky-gate device, excellent characteristics are achieved for the MOS-HEMT with NiO (Al2O3) gate oxide layer, which include maximum drain-to-source saturation current density of 626.5 (692.0) mA mm−1, maximum transconductance of 87.6 (94.2) mS mm−1, gate-to-drain leakage current of 1.47 × 10−7 (8.21 × 10−11) mA mm−1, threshold voltage of −3.48 (−3.45) V, gate voltage swing of 2.88 (3.08) V, respectively. Experimentally, the MOS-HEMT with an Al2O3 gate oxide layer shows good potential for signal amplification and circuit applications.

Design and Analysis of Junctionless Based Symmetric Nanogap-Embedded TFET Biosensor

In the present paper, symmetrical configuration of dual material double gate dielectric modulated junctionless TFET (DM DG JLTFET) for biosensor applications is explored. The JLTFET consists of Si material with an intensely doped n-type substrate. In this work, the JLTFET utilizes the dielectric modulation method which aids the bio-transistor to recognize neutral and charged analytes (biomolecules). A double metal gate structure is designed by employing two dissimilar metal gate electrodes to reduce short channel impact on device characteristics. The proposed device includes a nanogap region (cavity) which is framed for biomolecules to immobilize. Surface potential and their sensitivity are examined for neutral and charged-neutral analytes. The effects of structure parameters such as nanogap region length and fill-in factor have been analyzed through simulation. The paper examines the behavior of DM DG JLTFET for biological molecules sensing via change in relative permittivity and charge density. The proposed device shows noticeable sensitivity results for charged biomolecules (especially for positively charged analytes). The present work has analyzed the different parameters affecting the sensitivity of the biosensor which includes structural geometric variations like change in cavity length, cavity thickness and fill-in factor. The sensitivity of the neutral biomolecules having higher dielectric constant is observed higher; the surface potential sensitivity of the Gelatin (k = 12) is estimated as 3.75 × 10 3 which is 45%, 55%, and 135% higher than the sensitivity of Keratin (k = 7), Bacteriophage T7 (k = 6), and Glucose Oxidase (k = 3), respectively at the cavity length of 7 nm.

SOI n- and pMuGFET devices with different TiN metal gate thickness and crystallographic orientation of the sidewalls

This work presents an analysis of SOI p- and nMuGFET devices with different TiN metal gate electrode thickness for rotated and standard structures.Thinner TiN metal gate allows achieving a higher intrinsic voltage gain in spite of the reduced variation observed of the gm/IDS characteristics. This effect can be attributed to the increased Early voltage values observed for thinner TiN metal gate. Even with the larger mobility of the rotated nMuGFET devices when compared with the standard ones, the larger output conductance degradation resulted in an almost similar intrinsic voltage gain. P-channel devices, when implemented on the rotated layout, offer a lower intrinsic voltage gain.The GIDL current was also analyzed on these devices, indicating to be larger in thinner metal gate and rotated configuration.

Analog Performance of SOI nMuGFETs with Different TiN Gate Electrode Thickness and High-k Dielectrics

This work presents an analysis of the analog performance of SOI MuGFET devices and the impact of different TiN metal gate electrode thickness.Thinner TiN metal gate allows achieving large gain and this effect can be attributed to the increased Early voltage values observed for thinner TiN metal gate. This VEA increase suggests an increase of the transversal electrical field for thin TiN metal gate (reduced gate oxide thickness) that is confirmed with the increment of the GIDL current.This impact on the voltage gain is maintained for short channel length.The impact of different gate dielectrics was also studied where high-k dielectric indicated a higher VT due to a VFB variation. Additionally, lower intrinsic voltage gain was observed for hafnium dielectric and this can be related to the lower Early voltage (VEA) present in this devices.

High-mobility pentacene organic thin-film transistors achieved by reducing remote phonon scattering and surface-roughness scattering

Pentacene organic thin-film transistors (OTFTs) with very high carrier mobility have been achieved on both rigid and flexible substrates by using high-k gate dielectric and metal gate. The high-k gate dielectric with suitable thickness can reduce the surface-roughness scattering, while the metal gate can suppress the remote phonon scattering. As a result, based on NbLaO gate dielectric, OTFTs with high carrier mobility of 10.6 cm2 V−1 s−1 (7.99 cm2 V−1 s−1) with the capacitance per unit area measured at frequency of 1 kHz and small threshold voltage of −0.92 V (−0.74 V) fabricated on Pd-coated Si substrate (Pd-coated vacuum tape) are realized, though they have rougher dielectric surface and smaller pentacene grains than their counterparts fabricated on n-Si substrate. Moreover, with the addition of 13-nm SiO2 interlayer between the NbLaO gate dielectric and metal gate electrode, the carrier mobility decreases by 71% and 65% for the OTFTs on Si and V.T. substrates, respectively, highlighting the importance of the RPS.

Low-voltage controlling high order plasmonic modes based on graphene/metal electrodes

To improve the compatibility of the nanophotonic device with the electronic device, a kind of hybrid system based on graphene/metal electrode is demonstrated and characterized by both coupled mode theory and numerical simulation. Our results show that, assisted by metallic slits, multiple high order plasmonic resonant modes, including even and odd ones, are efficiently excited in graphene ribbons. The slits perforated in a metal electrode act as magnetic dipole sources and break the structural symmetry in individual graphene ribbons. Due to nano-sized space between graphene and metal gate electrodes, low voltages are required to dynamically control plasmonic modes of such hybrid system. At last, based on Salisbury effect, a low-voltage controlling multi-band absorber are successfully designed. The proposed structure would find potential applications in the field of integrated photonics which are compatible with electronic technology, specifically in low-voltage controlled plasmonic devices such as tunable multiband mid-infrared absorbers, modulators, biosensors, photonic memory cells etc.

Voltage stress induced interface states and hole trapping in germanium pMOSFETs with high-k gate dielectric and metal-gate electrode

In this work, p-channel MOSFETs with the metal-gate electrode and high-k gate stack of ZrO2/Al2O3/GeO2 on n-Ge substrate are fabricated and investigated. The interface state generation (ΔNit) and hole trapping (ΔNot) during voltage stresses are examined. According to the time dependence on the subthreshold swing and the threshold voltage, both ΔNit and ΔNot can be extracted during the gate voltage stresses, which is characterized by the power-low (tn) model. The time exponent of ΔNit is in the range of 0.48-0.65 which is approximately two times that of ΔNot. Based on the Si/oxide model, the charged H+ diffusion may be the dominant process in the degradation of interface states. In the early stressing, the device degradation of threshold voltage shift mainly results from the hole trapping in the gate dielectrics. However, the long-term trend indicates that ΔNot will be overwhelmed by ΔNit after a characteristic time (tc). This implies, for the device degradation during gate voltage stresses, the contribution of ΔNot decreases with time, meanwhile, the contribution of ΔNit increases with time. According to the experimental results, the characteristic time is approximately independent of stress voltage and is about 106 s.

Photoelectric properties of MIS structures on high-resistivity p-type silicon with aluminium nitride tunnelling insulator

Photoelectric properties of MIS tunnel diodes produced on high-resistive p-type silicon wafers with thin aluminium nitride AlN insulator layer and Pd or Al metal gate electrodes were investigated. It was found that synthesized AlN films possess a fixed positive charge, which leads to the creation of near-surface inversion layer in silicon substrate. The ratio of the photocurrent to the dark current K = Iph / Idark (on / off ratio) was found to depend on the gate electrode material, illumination intensity and the applied reverse bias. For studied MIS structures K ratio varied from 10 4 to 10 5 and was two orders of magnitude higher than that for the control MS structure without the insulator layer. High on / off ratio of such MIS structures with AlN tunnelling insulator promotes their application as an effective photodetectors in optoelectronics.

Effect of Channel Engineering on Quasi-Static Capacitance-Voltage Characteristics of Double-Gate MOSFET

The quasi-static capacitance–voltage (QSCV) characteristics of 10-nm-gate-length double-gate N-type metal–oxide–semiconductor field-effect transistors (NMOSFETs) with Si, Ge, InAs, $$ {\hbox{In}}_{0.53} {\hbox{Ga}}_{0.47} {\hbox{As}} $$ , and GaAs as channel materials are studied and simulated using Silvaco ATLAS three-dimensional (3D) technology computer-aided design (TCAD) software. The QSCV approach offers the advantage of immunity against frequency dependence effects and the ability to measure small capacitances in the 100 fF range. In this device, we consider the self-consistent solution of Schrodinger’s equation with Poisson’s equation. The splitting of the conduction band into multiple subbands is considered, while there is no doping in the channel region. The effects of metal gate electrode engineering, channel engineering (Si, Ge, GaAs, $$ {\hbox{In}}_{0.53} {\hbox{Ga}}_{0.47} {\hbox{As}} $$ , and InAs), and different channel thicknesses with $$ \left( {{\hbox{Al}}_{2} {\hbox{O}}_{3} } \right) $$ as gate oxide having thickness of 0.8 nm on the QSCV characteristics are studied. A comparison of the QSCV characteristics is carried out for the above-mentioned channel materials, revealing a significant reduction in the inversion-mode QSCV characteristics for all the materials due to quantization that results in a decrease in the overall gate-to-channel capacitance and hence increases the threshold voltage of the MOS device. The QSCV characteristics are also useful to measure the oxide thickness, flat-band voltage, threshold voltage, maximum depletion region thickness, charge distribution in the dielectric, interface trap charge, and interface states between the channel and gate oxide before device fabrication.

Metal gate electrode, channel and gate oxide engineering to improve DC and analog/RF performance of double-gate MOSFET for high-speed applications

In the present work, for high-speed and high-frequency applications, various DC and analog/RF parameters like drain current ( $$I_{{\text{D}}}$$ ), transconductance $$(g_{m} )$$ , output conductance $$(g_{d} )$$ , transconductance generation factor (TGF), the cutoff frequency $$(f_{T} )$$ , transit time $$\left( \tau \right)$$ , frequency transconductance product (FTP), channel resistance $$(R_{{{\text{ch}}}} )$$ , direct tunneling current ( $$I_{{\text{G}}}$$ ) and quasi-static capacitance–voltage (QSCV) characteristics for 10-nm double-gate NMOSFETs of Si and $${\text{In}}_{0.53} {\text{Ga}}_{0.47} {\text{As}}$$ have been studied and simulation results are reported using Silvaco ATLAS 3D TCAD. In this device, we consider the drift diffusion approach and the self-consistent solution of Poisson’s equation with Schrodinger’s equation (to account for quantization). The effect of including conduction band splitting into multiple sub-bands has been taken into account, and the channel region is very lightly doped. The effect of metal gate electrode, channel and gate oxide engineering on $$I_{{\text{D}}}$$ , $$g_{m}$$ , TGF, $$g_{d}$$ , $$f_{T}$$ , $$\tau$$ , TFP, $$R_{{{\text{ch}}}}$$ , $$I_{{\text{G}}}$$ and QSCV has been simulated. Also, a comparison of these parameters has been done between Si and $${\text{In}}_{0.53} {\text{Ga}}_{0.47} {\text{As}}$$ . It was found that except TGF at the higher $$V_{{{\text{GS}}}}$$ and $$I_{{\text{G}}}$$ values for Si, all the other above-mentioned parameters are higher for $${\text{In}}_{0.53} {\text{Ga}}_{0.47} {\text{As}}$$ . It was found that there is about 7.99 × 105% increase in $$I_{{{\text{ON}}}}$$ for $${\text{In}}_{0.53} {\text{Ga}}_{0.47} {\text{As}}$$ as compared to Si. Also, the device has a small drain-induced barrier lowering ~ 8.44 mV/V, almost an ideal subthreshold slope ~ 60 mV/dec and high ION/IOFF ratio ~ 6.30 × 107.

Core-Shell Junctionless Nanotube Tunnel Field Effect Transistor: Design and Sensitivity Analysis for Biosensing Application

In this paper, the structure of Core-Shell Junctionless Nanotube Tunnel Field Effect Transistor is proposed and investigated to minimize the fabrication steps and fabrication complexity of the device. The proposed junctionless device is implemented as a biosensor. The core-source metal and shell gate electrode are created using suitable work function. The p-type source region is created by using metal of work function 5.93eV and the shell gate is created by using a metal of work function 4.5eV, over the silicon surface. For biosensing application, a nano cavity is introduced between core-source metal and source region. The device is vertically aligned which provides stability to the biomolecules within the structure. For the investigation of biosensing application, three biomolecules of different dielectric constants, streptavidin (k = 2.1), 3-aminopropyltriethoxysilane (k = 3.57), and protein (k = 8), are used. The performance of the device for biosensing application is analyzed for both neutral and charged biomolecules. To examine the efficiency of the device, various characteristics are studied based on parametric variations, the effect of charged biomolecules, and sensitivity of the device and so on. The motivation behind our work is to design a device having optimum performance attributes without sacrificing the performance parameters of the device such as the ON-state current, subthreshold slope, ION/IOFF ratio, etc.

Carbonized silk fabric-based flexible organic electrochemical transistors for highly sensitive and selective dopamine detection

In this work, Nafion and reduced graphene oxide-wrapped carbonized silk fabric (Nafion/rGO/CSF) were fabricated into a precious metal-free gate electrode for organic electrochemical transistor (OECT) sensors. The hierarchical structure of CSF can effectively increase the conductivity of the electrode and avoid the aggregation of rGO and Nafion, giving the Nafion/rGO/CSF-based OECT sensors excellent detection capability towards dopamine (DA) with an ultralow detection limit of 1 nM, a broad detection range from 1 nM – 30 μM and a high selectivity. Moreover, the outstanding electrochemical sensing behaviors of the Nafion/rGO/CSF-based OECT sensor are retainable under bent states and in artificial urine, which will greatly facilitate its application in flexible electronics. The abovemenitoned results indicate that OECT sensors with carbon-based gate electrodes can also obtain high sensitivity comparable to that of precious metal gate electrodes, which, therefore, provides an unprecedented strategy for manufacturing flexible OECT sensors with high performance and low cost.

Design and performance analysis of GAA Schottky barrier-gate stack-dopingless nanowire FET for phosphine gas detection

This paper proposed a Gate-All-Around (GAA) Schottky Barrier (SB)-Gate Stack (GS)-based Dopingless Cylindrical Nanowire Field-Effect Transistor (SB-GS-DNWFET) for the application of phosphine (PH3) gas detection. The Schottky barrier nanowire FET is used over a conventional nanowire FET at nanometer scale due to its inherent advantages such as low parasitic resistance and higher ON-state current. In this sensor, the changes in the work function of the metal gate electrode have been used for the detection amount of gas. Three different catalytic metals such as platinum, rhodium, and iridium are preferred as gate electrodes for PH3 gas detection because of their reactivity and sensitivity towards that gas. The sensitivity can be measured in terms of change in ON-state current (ION), subthreshold leakage current (IOFF), ON-state current-to-OFF-state current ratio (ION/IOFF), and threshold voltage (Vth) for sensing the gas molecules. The work function of these catalytic metals at gate electrode is varied as 50, 100, 150, and 200 meV to investigate the change in sensitivity parameters. In this work, the sensitivity of the Schottky barrier GAA-NWFET gas sensor with different catalytic metals (Pt, Rh, Ir) is compared and the impact of process parameters such as channel length and gate stacked (GS = SiO2 + high-k dielectric) on the sensitivity parameters is also studied.