Merged PiN Schottky Diode Research Articles

The significant improvement of surge reliability for the SiC merged PiN Schottky diode (MPS) by forming a P+ zone on the P zone surface

Abstract Due to its great application prospect in new energy vehicles, the silicon carbide Schottky barrier diodes (SBD) are the most popular wide bandgap power devices. Compared to the JBS SiC diode, the induced large P zone improves the surge current, but the rating of the surge current does not satisfy the need. Recently, many efforts have been proposed to improve the surge current for the MPS diode, such as introducing surge trigger structure from the layout perspective, optimizing the design of the cell, and reducing the defect density to form ohmic contacts. However, these efforts bring about the sacrifice of switching characteristics, adding additional process steps, and increasing manufacturing instability. Here, we propose a new cell design whose Ohmic and Schottky contact are simultaneously formed using a one-step ohmic process. The results show that the MPS surge current is three times higher than the fabricated JBS diodes. The resolution of challenges can improve the reliability of the use of SiC SBD and accelerate their application in various fields.

Effects of athermal carrier injection on Co-60 gamma-ray damage in SiC merged-PiN Schottky diodes

Co-60 gamma irradiation of SiC merged-PiN Schottky (MPS) diodes up to fluences of 1 Mrad (Si) produces increases in both forward and reverse current, with less damage when the devices are biased during irradiation. Subsequent injection of minority carriers by forward biasing at 300 K can partially produce some damage recovery, but at high forward biases also can lead to further degradation of the devices, even in the absence of radiation damage. Recombination-enhanced annealing by carrier injection overall is not an effective technique for recovering gamma-induced damage in SiC MPS diodes, especially when compared to other near athermal methods like electron wind force annealing.

Design and modelling of SiC MPS diodes with superior surge current robustness

The investigation and modelling of the 4H–SiC merged PiN/Schottky (MPS) diode are presented for superior surge current capability design. A bipolar current transmission (BCT) model is proposed for investigating the current transport mechanism of MPS diodes under bipolar operation. The knee voltage (Vturn) defining the conversion from unipolar to bipolar operation is precisely modelled for controlling surge current. According to the proposed model, the method of designing a SiC MPS diode with high robustness against surge current is discussed and concluded primarily, which has great significance for improving the reliability of SiC MPS diodes. Meanwhile, we propose a new hybrid stripe cell design according model calculation and simulation for enhancing the surge current capability of the diode while maintaining high forward current capability. The proposed model and design method are verified by experimental results. And the proposed hybrid stripe cell design has superior surge current robustness while it almost avoids the forward current degradation in experiment.

Reliability investigation of repeated unclamped inductive switching in a diode-clamped SiC circuit breaker

This paper investigates the reliability of a solid-state circuit breaker with a clamped SiC diode as avalanche voltage after repeated cutoff operations. In solid-state circuit breakers, a clamping element is connected in parallel with a power semiconductor switch to divert the cutoff current. The SiC merged PiN Schottky (MPS) diode is one of the candidates for clamping elements in solid-state circuit breakers because of its high avalanche tolerance and good robustness after the shocks. Reliability tests indicate that no significant electrical characteristics are found for both the SiC MOSFET and the SiC MPS diode in the proposed circuit breaker, even after more than 10,000 unclamped inductive switching (UIS) cycles. These results are based on a 400V, 50A DC distribution system with the UIS condition. The results show that the SiC MPS diode works well as a clamped element for the long-term reliability of the solid-state circuit breaker.

Novel layout design of 4H-SiC merged PiN Schottky diodes leading to improved surge robustness

A method to improve the surge current capability of silicon carbide (SiC) merged PiN Schottky (MPS) diodes is presented and investigated via three-dimensional electro-thermal simulations. When compared with a conventional MPS diode, the proposed structure has a more uniform current distribution during bipolar conduction due to the help of the continuous P+ surface, which can avoid the formation of local hotspots during the surge process. The Silvaco simulation results show that the proposed structure has a 20.29% higher surge capability and a 15.06% higher surge energy compared with a conventional MPS diode. The bipolar on-state voltage of the proposed structure is 4.69 V, which is 56.29% lower than that of a conventional MPS diode, enabling the device to enter the bipolar mode earlier during the surge process. Furthermore, the proposed structure can suppress the occurrence of ‘snapback’ phenomena when switching from the unipolar to the bipolar operation mode. In addition, an analysis of the surge process of MPS diodes is carried out in detail.

Electrothermal Coupling Model With Distributed Heat Sources for Junction Temperature Calculation During Surges

High junction temperature is usually the main factor leading to device failures in high-power working conditions, such as surges or avalanches. It is of great significance to obtain the junction temperature quickly and accurately. Direct measurement of junction temperature is inconvenient, and usually indirect electrical measurement combined with model calculation is used. An electrothermal coupling junction temperature calculation model with distributed heat sources is proposed in this article. This model can accurately and quickly predict the device behavior during the surge process, as well as the voltage drop and temperature changes of each part of the device, without actually performing surge tests. This article describes the theoretical basis and calculation principles of the model. By taking a commercial SiC merged PiN Schottky diode as an example, this article also explains the details of the establishment of the electrical and thermal characteristic models of the device, as well as the calculation steps of the junction temperature by the thermal coupling model. The calculated device voltage drop curve of the device is in good agreement with the measured ones, and the calculated junction temperature curve is more consistent with the device failure mechanism than the one by the traditional RC thermal circuit model.

A 4H–SiC double trench MOSFET with split gate and integrated MPS diode

A 4H–SiC double trench MOSFET with split gate and integrated MPS(Merged PiN Schottky) diode (MPS-SGMOS) is proposed, and simulated by Sentaurus TCAD tools. The introduction of the P+ shielding region ensures the reliability of the gate oxide of the device, reduces the electric lines of force gathered at the bottom of the gate oxide, and improves the withstand voltage of the device; the introduction of the Schottky diode enables the device to obtain better reverse recovery performance; adding a source electrode between the split gate reduces the Cgd greatly and the switching losses of the device, so that the device is more suitable for high frequency applications. As a result, comparing to conventional double-trench MOSFET (Con-DTMOS), MPS-SGMOS owns comparable on-state characteristics, while its breakdown voltage is increased by 10.5%. The FOM(figure of merit) of Ron,sp × Qgd, sp is decreased by 78.2% compared to the traditional device, moreover the peak reverse recovery charge is decreased by 32.7%.

The Impact of the Hexagonal and Circular Cell Designs on the Characteristics and Ruggedness for 4H-SiC MPS Diodes

In this article, SiC Merged PiN Schottky (MPS) diodes with hexagonal and circular cell designs are investigated and compared in terms of characteristics and ruggedness. It is demonstrated by experimental and simulated methods that the circular cell design brings better performance than the hexagonal one. Owing to the almost simultaneously triggering of the P+ island and the P+ ring of the circular cell under high current stress, the current distribution is more balanced, which significantly reduces forward voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{F}$ </tex-math></inline-formula> ) and lower energy-dissipated heat, and further enhances the surge current capability. Moreover, the circular shape can relieve the curvature effect and electric field crowding under reverse blocking conditions, thereby improving breakdown voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BV</i> ) and avalanche capability. These results suggest that circular cell design can be employed to improve the performance and ruggedness of the SiC MPS diodes.

An ultrahigh-voltage 4H-SiC merged PiN Schottky diode with three-dimensional p-type buried layers

An ultrahigh-voltage 4H-SiC merged PiN Schottky diode with three-dimensional p-type buried layers

Plasma Spreading Layers: An Effective Method for Improving Surge and Avalanche Robustness of SiC Devices

This article investigates the reliability issues of silicon carbide (SiC) merged p-i-n Schottky (MPS) diodes. Aiming at the current imbalance issue in surge event and electric field crowding issue under avalanche shock for MPS diodes, plasma spreading layer (PSL) structure is proposed and its performance in alleviating such issues are studied via simulation and experiments. From the simulation, the PSL structure can provide an interconnection between P+ hexagonal islands and P+ rings, and allow bipolar current to spread from the wide P+ region to the other parts of the device during the surge pulse. Under avalanche shock, the PSL structure can relieve the electric field crowding at the corners of the P+ hexagonal island/ring. In both cases, it can relieve the current crowding issue and increase the effective energy dissipating area. It is demonstrated by the experimental results that adding PSL structure can improve both surge and avalanche reliability. Different configurations of PSL (i.e., P+ cross lines and P+ diagonal lines) are studied. The P+ cross-line configuration is proved to have ~20% improvement in surge capability, and the other one achieves ~11% improvement in avalanche capability. The PSL concept can also be applied to optimizing P well/P+ layers in SiC MOSFET for its robustness enhancement.

The Impact of Process Conditions on Surge Current Capability of 1.2 kV SiC JBS and MPS Diodes.

This paper demonstrated the impact of process conditions on the surge current capability of 1.2 kV SiC junction barrier Schottky diode (JBS) and merged PiN Schottky diode (MPS). The influence of ohmic contact and defect density produced by implantation was studied in the simulation. The device fabricated with high temperature implantation had less defect density in the implant region compared with room temperature implantation, which contributed to higher hole injection in surge current mode and 20% surge capability improvement. In addition, with lower P+ ohmic contact resistance, the device had higher surge capability. When compared to device fabrication with a single Schottky metal layer in the device active area, adding additional P+ ohmic contact on top of the P+ regions in the device active area resulted in the pn junctions sharing a greater portion of surge current, and improved the devices’ surge capability by ~10%.

Parameter extraction method for a physics‐based lumped‐charge SiC MPS diode model

A practical parameter extraction method for physics-based lumped-charge silicon carbide (SiC) merged PiN Schottky (MPS) diode model is presented. The physical parameters of a device model are necessary for accurate simulation but are usually not provided as these parameters are the core business profits of the manufacturers. The values of SiC MPS diode parameters are often based on assumptions or given in a wide range, thus the accuracy of the model simulation is compromised and the application of the model is also limited. The proposed method includes semiconductor physical and structural parameters and only some basic experiments are needed, such as reverse recovery and static characteristic experiments. Based on the lumped-charge SiC MPS diode model, reasonable assumptions are used and simple mathematical formulas are derived for the extraction of the parameters. Finally, the method is validated by two different SiC MPS diodes from CREE and CETC having the ratings of 1200 V/300 A and 3300 V/60 A.

1200-V 4H-SiC Merged p-i-n Schottky Diodes With High Avalanche Capability

In this article, the avalanche capability of the 1.2-kV 4H-SiC junction barrier Schottky (JBS) and merged p-i-n Schottky (MPS) diodes is investigated through simulation and experiments. For MPS diodes, the width of the wide P+ region (W) is found to have great effects on the device avalanche capability. MPS diodes with varied W-values (3-20 μm) and JBS diode are designed and fabricated, and their avalanche energy/current capability is tested with unclamped inductive switching tests. The experimental results show that the MPS diode has an optimized avalanche capability at W = 8-μm design. Simulation study reveals that the avalanche current is mainly distributed at the edges of the P+ regions in the JBS/MPS diodes as a result of the curvature-effect-induced electric field crowding. The localized current crowding and unbalanced current distribution in the avalanche mode contribute to a reduced effective power dissipation area and a weaker avalanche capability. The current nonuniformity coefficient (k) is used to characterize the severity of the current unbalance, and it is found that kdeclines as Wincreases when W = 3-8 μm and then gets increased when W exceeds 8 μm. Both the experimental and simulation results indicate that the MPS diode is superior to the JBS diode in avalanche capability, and the width of the wide P+ region in the MPS diode has an optimal design (8 μm in this article) which corresponds to the alleviated current crowding issue and 9%-19% improvement of the avalanche capability.

A Comparative Study of Silicon Carbide Merged PiN Schottky Diodes with Electrical-Thermal Coupled Considerations.

A comparative study of surge current reliability of 1200 V/5 A 4H-SiC (silicon carbide) MPS (Merged PiN Schottky) diodes with different technologies is presented. The influences of device designs in terms of electrical and thermal aspects on the forward conduction performance and surge current capability were studied. Device forward characteristics were simulated and measured. Standard single-pulse surge current tests and thermal impedance measurements were carried to show their surge capability and thermal design differences. An advanced thermal RC (thermal resistance-capacitance) model, with the consideration of current distribution non-uniformity effects, is proposed to accurately calculate the device junction temperature during surge events. It was found that a thinner substrate and a hexagonal layout design are beneficial to the improvement of the bipolar conduction performance in high current mode, as well as the surge current capability. The thinner substrate design also has advantages on thermal aspects, as it presents the lowest thermal resistance. The calculated failure temperature during the surge tests is consistent with the aluminum melting phenomenon, which is regarded as the failure mechanism. It was demonstrated that, for a SiC MPS diode, higher bipolar conduction performance is conducive to restraining the joule heat, and a lower thermal resistance design is able to accelerate the heat dissipation and limit the junction temperature during surge events. In this way, the MPS diode using a thinner substrate and advanced layout design technology is able to achieve 60% higher surge current density capability compared to the other technologies.

Improving Surge Current Capability of SiC Merged PiN Schottky Diode by Adding Plasma Spreading Layers

In this article, a novel structure design concept [plasma spreading layer (PSL)] is introduced into silicon carbide (SiC) merged PiN Schottky (MPS) diode to improve the surge current capability. Compared to the isolated P+ island design in traditional MPS diode, the P+ islands in the proposed new structure are connected by the P+ plasma spreading layers which can spread bipolar current from P+ islands to the other parts of the device during the surge pulse. Therefore, the effective conducting area of the device is increased and the energy dissipation capability can be improved. In this article, 1.2-kV SiC MPS diodes with two types of plasma spreading layers are designed and fabricated. Their forward characteristics and surge current capability are compared to traditional stripe cell and hexagonal cell designed MPS diodes. The experimental results show that, with the help of the plasma spreading layers, a 20% increase of energy dissipation capability is achieved by the new structure design, which results in a 10% improvement of the surge current capability.

Device Design Assessment of GaN Merged P-i-N Schottky Diodes

Device characteristics of GaN merged P-i-N Schottky (MPS) diodes were evaluated and studied via two-dimensional technology computer-aided design (TCAD) after calibrating model parameters and critical electrical fields with experimental proven results. The device’s physical dimensions and drift layer concentration were varied to study their influence on the device’s performance. Extending the inter-p-GaN region distance or the Schottky contact portion could enhance the forward conduction capability; however, this leads to compromised electrical field screening effects from neighboring PN junctions, as well as reduced breakdown voltage. By reducing the drift layer background concentration, a higher breakdown voltage was expected for MPSs, as a larger portion of the drift layer itself could be depleted for sustaining vertical reverse voltage. However, lowering the drift layer concentration would also result in a reduction in forward conduction capability. The method and results of this study provide a guideline for designing MPS diodes with target blocking voltage and forward conduction at a low bias.

The On-Resistance Model of Silicon Carbide Merged PiN Schottky (MPS) Diodes

A novel resistance model of silicon carbide (SiC) merged PiN Schottky diodes (MPS) is presented in this study. With this model, the device characteristics and power dissipation can be predicted. The on-resistance in the three operating modes, namely, unipolar, low-injection and high-injection modes, is calculated. In the unipolar and low-injection modes, the effect of temperature on carrier mobility and conduction angle are added to the factors that need to be considered, whereas the influence of current density is considered in the high injection mode. The carrier distribution in the high injection mode is analyzed and applied to determine the resistance. The model is verified experimentally via comparison of the calculated and measured characteristics.

Analysis and Modeling of SiC MPS Diode and Its Parasitic Oscillation

SiC merged p-i-n Schottky (MPS) diodes have great potential in the construction of multiple power electronic circuits for their excellent static and dynamic characteristics. The ultrafast switching speed is unfortunately accompanied by undesirable parasitic oscillations, which have direct impact on the stability and reliability of these circuits. The wide use of SiC diodes is still limited by their uncertain reliability and a comprehensive diode physical model, which can be used to describe the device characteristics, including parasitic oscillations during reverse recovery, is still missing for the device safe operation. In this article, an accurate dynamic physical model based on the lumped-charge technique which can accurately estimate the switching oscillations is first developed for an SiC MPS diode considering all parasitic elements. Furthermore, the original static model is improved and many important semiconductor physical phenomenon are also included. In the end, simulation and experiments are carried out by a CETC WCSD60D330F19P SiC MPS diode to verify the proposed model.

1.2-kV 4H-SiC Merged PiN Schottky Diode With Improved Surge Current Capability

This paper presents the design and experimental analysis of 1200-V 4H-silicon carbide (SiC) merged PiN Schottky (MPS) diodes. Design considerations and device performances of the MPS diodes are compared with those of the junction barrier Schottky (JBS) diodes via numerical simulation and experiments. Due to the limited P+ width/ratio in JBS diodes, p-n junction is not turned on until very high current/voltage bias is applied. This increases the device voltage drop and energy dissipation in high current stress conditions. Thanks to the wide P+ region design and the ohmic contact on the P +regions, the p-n junction turn-on voltage in MPS diodes is substantially decreased, and the surge current capability is improved accordingly. Furthermore, the surge capability of two layouts of the MPS diodes are compared. Layout A with ~60% high P+ ratio can improve the surge current capability by 10% and 20% compared with layout B design (with ~50% P+ ratio) and pure JBS diode (with ~40% P+ ratio), respectively. The reliability of the MPS diodes is studied by repetitive pulse surge current tests. No obvious degradation appears after 5500 test cycles under a surge current stress 20 times the device nominal current rating.

A Physics-Based Lumped-Charge Model for SiC MPS Diode Implemented in PSPICE

This paper presents a physical lumped-charge model for an SiC merged p-i-n Schottky (MPS) diode. According to the MPS chip configuration, this paper divides the model into two parts: the bipolar subcircuit and the unipolar subcircuit. Both the two parts are modeled by the lumped-charge approach. The proposed physics-based model is also temperature dependent. The model is implemented into the PSPICE simulator in the form of an equivalent circuit. For the characterization of surge current condition that will cause chip temperature changes significantly, an accurate lumped thermal model of the module is established by the structural parameters extraction with a scanning electron microscope. Finally, the developed model is verified by Cree CAS300M12BM2 SiC power module with a 2000-A surge current through the electro-thermal co-simulation. Besides, a test setup is built up with an ultrafast infrared (IR) camera to validate the electro-thermal model in the circuit-level simulation.