Memristor Resistance Research Articles

Memristor‐Based Reconfigurable True Time Delay Circuit

ABSTRACTA memristor‐controlled CMOS reconfigurable true time delay circuit is introduced in this paper. The delay circuit includes three stages of ‐C all‐pass filter delay elements connected in cascade and memristor‐based tunable DC voltage sources. The memristor value variation changes the DC bias voltage inputs of the delay elements and thus controls the delay time indirectly: The memristor resistance changes in analogue from 10 to 17 k, changing the tunable DC voltage source output from 584‐ to 711‐mV DC voltage and the delay from 269 to 632 ps. The delay circuit can work in a frequency range from 50 MHz to 1.6 GHz with gain ripple smaller than 3 dB. The resolvable delay time step across the delay range is < 8.7 ps, troughing at as low as 0.4 ps. A delay circuit working in the MHz region is also designed to compare the performance with the GHz circuit, and a memristor‐programming circuit is built to change the resistance levels of memristors.

VO2 memristor-based frequency converter with in-situ synthesize and mix for wireless internet-of-things

Wireless internet-of-things (WIoT) with data acquisition sensors are evolving rapidly and the demand for transmission efficiency is growing rapidly. Frequency converter that synthesizes signals at different frequencies and mixes them with sensor datastreams is a key component for efficient wireless transmission. However, existing frequency converters employ separate synthesize and mix circuits with complex digital and analog circuits using complementary metal-oxide semiconductor (CMOS) devices, naturally incurring excessive latency and energy consumption. Here we report a highly uniform and calibratable VO2 memristor oscillator, based on which we build memristor-based frequency converter using 8×\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$\ imes$$\\end{document}8 VO2 array that can realize in-situ frequency synthesize and mix with help of compact periphery circuits. We investigate the self-oscillation based on negative differential resistance of VO2 memristors and the programmability with different driving currents and calibration resistances, demonstrating capabilities of such frequency converter for in-situ frequency synthesize and mix for 2 ~ 8 channels with frequencies up to 48 kHz for low frequency transmission link. When transmitting classical sensor data (acoustic, vision and spatial) in an end-to-end WIoT experimental setup, our VO2-based memristive frequency converter presents up to 1.45× ~ 1.94× power enhancement with only 0.02 ~ 0.21 dB performance degradations compared with conventional CMOS-based frequency converter. This work highlights the potential in solving frequency converter’s speed and energy efficiency problems in WIoT using high crystalline quality epitaxially grown VO2 and calibratable VO2-based oscillator array, revealing a promising direction for next-generation WIoT system design.

Fully printed memristors made with MoS2 and graphene water-based inks.

2-Dimensional materials (2DMs) offer an attractive solution for the realization of high density and reliable memristors, compatible with printed and flexible electronics. In this work we fabricate a fully inkjet printed MoS2-based resistive switching memory, where graphene is used as top electrode and silver is used as bottom electrode. Memristic effects are observed only after annealing of each printed component. The printed memory on silicon shows low SET/RESET voltage, short switching times (less than 0.1 s) and resistance switching ratios of 103-105, comparable or superior to the performance obtained in devices with both printed silver electrodes on rigid substrates. The same device on Kapton shows resistance switching ratios of 102-103 and remains stable at least up to 2% of strain. The memristor resistance switching is attributed to the formation of Ag conductive filaments, which can be suppressed by integrating graphene grown by chemical vapour deposition (CVD) onto the silver electrode. Temperature-dependent electrical measurements starting from 200 K show that memristic behavior appears at a temperature of ∼300 K, confirming that an energy threshold is needed to form the conductive filament. This work shows that inkjet printing is a very powerful technique for the fabrication of 2DMs-based resistive switches onto rigid and flexible substrates.

Research Progress on the Application of Topological Phase Transition Materials in the Field of Memristor and Neuromorphic Computing.

Topological phase transition materials have strong coupling between their charge, spin orbitals, and lattice structure, which makes them have good electrical and magnetic properties, leading to promising applications in the fields of memristive devices. The smaller Gibbs free energy difference between the topological phases, the stable oxygen vacancy ordered structure, and the reversible topological phase transition promote the memristive effect, which is more conducive to its application in information storage, information processing, information calculation, and other related fields. In particular, extracting the current resistance or conductance of the two-terminal memristor to convert to the weight of the synapse in the neural network can simulate the behavior of biological synapses in their structure and function. In addition, in order to improve the performance of memristors and better apply them to neuromorphic computing, methods such as ion doping, electrode selection, interface modulation, and preparation process control have been demonstrated in memristors based on topological phase transition materials. At present, it is considered an effective method to obtain a unique resistive switching behavior by improving the process of preparing functional layers, regulating the crystal phase of topological phase transition materials, and constructing interface barrier-dependent devices. In this review, we systematically expound the resistance switching mechanism, resistance switching performance regulation, and neuromorphic computing of topological phase transition memristors, and provide some suggestions for the challenges faced by the development of the next generation of non-volatile memory and brain-like neuromorphic devices based on topological phase transition materials.

The Coupled Reactance-Less Memristor Based Relaxation Oscillators for Binary Oscillator Networks

This paper discusses the application of coupled reactance-less memristor-based oscillators (MBO) with binary output signals in oscillatory networks. A class of binary-coupled memristor oscillators provides simple integration with standard CMOS logic elements. Combining MBOs with binary logic elements ensures the operation of complex information processing algorithms. The analysis of the simplest networks based on MBOs is performed. The typical reactance-less MBO with current and potential inputs is considered. The output responses for input control signals are analyzed. It is shown that the current input signal impacts primarily the rate of memristor resistance variation, while the potential input signal changes the thresholds. The exploit of the potential input for the synchronization of coupled MBOs and current control input in order to provide the necessary encoding of information is suggested. The example of the application of coupled MBOs in oscillatory networks is given, and results of simulation are presented.

Selecting a Programming Scheme for Memristor Elements

Introduction. An array of memristive elements can be used in prospective neural computing systems as a programmable resistance (analog multiplication factor) when performing operations of analog vector multiplication, discrete in time. To form the required resistance, the memristor should be subjected to a programming procedure. This article discusses conventional programming schemes and proposes a new versatile programming scheme for memristor elements.Aim. To identify or develop an optimal programming scheme for memristors by analyzing the advantages and disadvantages of existing methods.Materials and methods. The programming procedure can be carried out using either SET or RESET, depending on a different direction of movement according to the volt-ampere characteristic of the memory and its transfer to a particular state. The programming process is controlled in the LTspice circuit modeling program.Results. Typical programming schemes of memristors were analyzed; advantages and disadvantages of existing methods were revealed. A new versatile circuit based on a variable resistor was proposed. The circuit was simulated both under a fixed resistance of the variable resistor and when varying the memristor resistance values within their permissible range.Conclusion. In comparison with the RESET mode, the SET programming mode provides for a greater linearity of variations in the memristor resistance. The use of a circuit based on a variable resistor and a bipolar voltage source allows programming of any type and eliminates the need for recommutation of the memristor. The simulation results confirm the feasibility of the proposed method. The proposed circuit can be complemented not only with a comparator, but also with an ADC. This will provide the possibility of selecting various means for measuring the memristor resistance both during programming and for the purpose of monitoring the memristor resistance at the end of the procedure.

A discrete memristive neural network and its application for character recognition

Design of artificial neural networks based on memristor has attracted increasing attentions from researchers. However, there are no reports on the discrete memristor based neural network. In this work, a novel discrete memristor BP neural network is designed. Firstly, a discrete memristor is introduced, in which the internal state can be controlled by the input discrete current signal. Secondly, theoretical basis of the proposed discrete memristor BP neural network is given where the weights are defined by the memristor resistance and can be adjusted according to discrete feedback errors. Finally, a three layers discrete memristor BP neural network is built to perform MNIST-10 handwriting recognition. Numerical results show a high classification accuracy of 97.16% and it verifies the effectiveness of the proposed method.

Edge of Chaos Explains Prigogine’s Instability of the Homogeneous

One of the complex phenomena, which most attracted the attention of the scientific community over the past few decades, is the emergence of diffusion-driven instabilities in homogeneous cellular media. Explaining this symmetry-breaking process, which the Russian luminary Ilya Prigogine referred to as the Instability of the Homogeneous, is only possible upon invoking the Physics Law of the Edge of Chaos. While the emergence of inhomogeneous static or dynamic periodic solutions in biological reaction-diffusion systems was recently reproduced in two-cell networks, leveraging the Negative Differential Resistance of certain volatile memristors, so far, to the best of our knowledge, no cellular array was ever found to undergo dissipation-induced dynamical phenomena of higher complexity, including a route to chaos, or an uncontrollable upsurge in the respective physical variables. This manuscript determines all the possible sets of conditions on the parameters of a one-port, extracted from the classical Chua circuit, enabling to poise it on some stable and locally-active operating point, employing a deep mathematical analysis, focusing on the properties of its local impedance. The polarisation of the one-port on some Edge of Chaos operating point is the Conditio Sine Qua Non for the Destabilisation of the Homogeneous Solution, resulting in the steady-state appearance of high-order dynamical phenomena, as outlined above, in a simple Reaction-Diffusion Cellular Nonlinear Network, where a linear and passive resistor, interposed between two identical copies of the one-port, lets them interact by means of a diffusion process. Notably, as demonstrated here, whether or not the dissipative coupling path may truly succeed in moving each of the two one-ports of the two-cell array, under study, away from the respective common Edge of Chaos operating point, depends critically upon the satisfaction of the logical disjunction between three inequalities, which enforces the instability of the denominator polynomial of the rational function associated to the local input impedance of the cellular array, as seen across either of the two one-ports.

Dynamics of Discrete Memristor-Based Rulkov Neuron

Continuous-time memristor have been widely used in fields such as chaotic circuits and neuromorphic computing systems, however, research on the application of discrete memristors haven’t been noticed yet. In this paper, a new chaotic neuron is firstly designed by applying the discrete memristor to two-dimensional Rulkov neuron. And then the dynamical behaviors of the discrete memristor-based neuron are analyzed by experiments including phase diagram, bifurcation, and spectral entropy complexity algorithm. The results show that the resistance of memristor has an important effect on the system dynamics, which delays the occurrence of bifurcation, in particular, the bifurcation disappears and the system reaches the fixed point of the neuron when the resistance is greater than a threshold. It is also found that with the increase of the current gain, the bursting activity becomes higher in frequency and wider range of high complexity is obtained. The results of our study show that the performance of Rulkov neuron is improved by applying the discrete memristor, and may provide new insights into the mechanism of memory and cognition in the nervous.

Research on inductive neuron model and its dynamic characteristics

The size of neuron is on a mesoscopic scale. In this paper, considering the inductance characteristics of the neuron, the classical circuit model and mesoscopic circuit model of neuron including neuron membrane inductance, membrane capacitance, potassium ion memristor and chloride ion resistance are established. Based on the classical circuit theory and the quantum theory of mesoscopic circuit, the expression of neuron membrane voltage response under external impulse excitation is derived. Substituting the electrophysiological parameters of the squid neuron into the expression of membrane voltage, we find that the membrane voltages in both models first increase and then decrease, and finally reach their corresponding resting states of zero value, and their energy values are concentrated mainly in a range of 0–30 Hz in which the brainwave frequency is. Further comparisons show that the peak value of membrane voltage and the time required to reach the peak value (peak time) in the mesoscopic circuit model are lower than those in the classical circuit model, and are closer to the experimental results after the squid axon has been stimulated, indicating that the mesoscopic circuit model can better reflect the physiological characteristics of the stimulated neurons. Based on the mesoscopic circuit model, the peak value of membrane voltage increases and the peak time decreases with the increase of external excitation intensity. Parameters such as membrane voltage peak and peak time are more sensitive to the neuron membrane capacitance. The mesoscopic circuit model of the neuron is of great significance in understanding the excitability of the stimulated neuron and also in promoting the development of quantum neural networks inspired by brain function.

Solving Non-Homogeneous Linear Ordinary Differential Equations Using Memristor-Capacitor Circuit

Inhomogeneous linear ordinary differential equations (ODEs) and systems of ODEs can be solved in a variety of ways. However, hardware circuits that can perform the efficient analog computation to solve them are rarely in the literature. To address such problems, this paper proposes a general method of using a memristor-capacitor (M-C) circuit to solve inhomogeneous linear ODEs and systems of ODEs of any order in initial value problems. The M-C circuit can match the coefficients of the equations sought by adjusting the memristor resistance value according to the coefficient formula proposed in the paper, which has higher programmability. Then, some ODEs and systems of ODEs are given in the paper as examples to evaluate the proposed method. According to the comparison results based on MATLAB software simulation and the simulation based on OrCAD software, the designed M-C circuit has an effective improvement in speed and the accuracy exceeds 99.95% in software simulation. Based on practical verification, this paper gives the actual M-C circuit experiment based on PCB. Moreover, the proposed method can be used to quickly solve the object motion state in the spring mass damping system in actual engineering, and the accuracy can reach 99.98%.

Investigation of Power Consumption Effect of Various Memristor Emulators on a Logic Gate

Memristor, also known as memory resistor, is considered as the fourth passive electronic element expressing the relationship between magnetic flux and electric charge. One of the most important features of the memristor is that it has low power consumption. Minimizing power consumption is an important issue in the electronic circuits. However, the fact that the memristor element was not yet fully manufactured has led researchers to design memristor-like emulator circuits. These circuits, which approximate the memristor properties, are realized by combining the other existing electronic elements. In this paper, a basic NAND logic gate is considered and the change in power consumption when using a memristor instead of the standard resistor in the gate circuit is examined. For this purpose, the NAND logic circuit was constituted for four different memristor emulators, and the power consumption values of these circuits were obtained by simulation and experiments. These values are compared with the power consumption values of NAND circuits obtained by using standard resistors equivalent to the memristor resistance. The results clearly show that the memristor gate circuits reduce power consumption compared to standard resistive gate circuits.

Forgetting memristors and memristor bridge synapses with long- and short-term memories

In this paper, an ideal current source forgetting memristor model is proposed. Based on the model, three kinds of synapses with long- and short-term memory are designed: the series forgetting memristor synapse, the forgetting memristor bridge synapse written independently and the forgetting memristor bridge synapse written in batches. Combined with the forgetting property, the long- and short-term weight of the forgetting synapse can be controlled by the long- and short-term resistance of memristors. Compared the three forgetting synapses, the series forgetting memristor synapse has the lowest requirement for memristors, the forgetting memristor bridge synapse written independently is the most flexible, and the forgetting memristor bridge synapse written in batches is the most convenient. Compared with traditional synapses, forgetting synapses with long- and short-term memory have multi-weight storage. When forgetting synapses are applied to associative memory, it can be found more patterns are stored in the neural network and different patterns are recalled at different time due to the forgetting effect.

MTL: Memristor Ternary Logic Design

The nanoscale implementations of ternary logic circuits are particularly attractive because of high information density and operation speed that can be achieved by using emerging memristor technologies. Memristor is a nanoscale device with nonvolatility and adjustable multilevel states, which creates an intriguing opportunity for the implementation of ternary logic operations. This paper proposes a novel memristor-based design for stateful ternary logic, including AND, OR, NOT, NAND, NOR, and COPY operations. In the proposed memristor ternary logic (MTL) design, the resistance of memristor is the only logic state variable for representing the input and output. By sensing the value of the input memristors, the resistance of the output memristor changes accordingly. Furthermore, the MTL gates are not only capable of performing logic operations, but also storing logic values. To illustrate the potential of the methodology, a single-input-three-output ternary decoder is designed by using the proposed ternary logic circuits. Simulation results verify the effectiveness of the presented design.

Interstice: Inverter-Based Memristive Neural Networks Discretization for Function Approximation Applications

In this article, the accuracy of inverter-based memristive neural networks (NNs) for function approximation applications is improved under the presence of process variations. The improvement is achieved by using a design approach, called INTERSTICE (Inverter-based Memristive Neural Networks Dis cretization for Function Approximation Applications), which discretizes the output values by employing a classifier. More precisely, in the INTERSTICE approach, the output range is divided into $K$ subranges where each subrange is considered as a class. To train the classifier, the training samples are labeled where each label shows belonging to a specific class. To evaluate the efficacy of the design technique, some function approximation applications such as BlackScholes, FFT, $K$ -means, and Sobel are considered. Compared to PHAX, a recently published inverter-based memristive NN, INTERSTICE provides lower mean squared error (MSE) values in the presence of memristor and transistor variations. More specifically, the improvements in the mean of MSE ( $\mu _{\mathrm {MSE}}$ ) are in the range of 40%–80% when considering 10% variations in the memristor resistance and transistor parameters. In addition, for most of the benchmarks, INTERSTICE improves the $\mu _{\mathrm {MSE}}$ values of the nominal case (the case where all circuit elements are ideal) compared to PHAX. As another advantage compared to the PHAX, in INTERSTICE, digital outputs can be generated based on the selected classes which eliminates the need for an analog-to-digital converter at the output port connected to the digital part of the system. Finally, achieving lower $\mu _{\mathrm {MSE}}$ values using fewer memristors and consuming lower energy is also attainable with this design approach.

Sputtering-deposited amorphous SrVOx-based memristor for use in neuromorphic computing

The development of brain-inspired neuromorphic computing, including artificial intelligence (AI) and machine learning, is of considerable importance because of the rapid growth in hardware and software capacities, which allows for the efficient handling of big data. Devices for neuromorphic computing must satisfy basic requirements such as multilevel states, high operating speeds, low energy consumption, and sufficient endurance, retention and linearity. In this study, inorganic perovskite-type amorphous strontium vanadate (a-SrVOx: a-SVO) synthesized at room temperature is utilized to produce a high-performance memristor that demonstrates nonvolatile multilevel resistive switching and synaptic characteristics. Analysis of the electrical characteristics indicates that the a-SVO memristor illustrates typical bipolar resistive switching behavior. Multilevel resistance states are also observed in the off-to-on and on-to-off transition processes. The retention resistance of the a-SVO memristor is shown to not significantly change for a period of 2 × 104 s. The conduction mechanism operating within the Ag/a-SVO/Pt memristor is ascribed to the formation of Ag-based filaments. Nonlinear neural network simulations are also conducted to evaluate the synaptic behavior. These results demonstrate that a-SVO-based memristors hold great promise for use in high-performance neuromorphic computing devices.

The Effect of Aluminum Dopant Amount in Titania Film on the Memristor Electrical Properties

In a promising nanoelectronics device, namely, memristor based on metal oxides, there are many intermediate states with different conductivity between the limits of highly conductive and low-conducting states. These intermediate states can be used in the processes of associative learning of a neural network based on memristor synapses and simultaneous processing of input pulses, which consists in their weighing and summation in the neuroprocessor. By the method of simultaneous magnetron sputtering of two cathodes in a reactive oxygen environment, thin films of mixed oxides with a different mole ratio of titanium and aluminum were obtained. A method for obtaining a mixed oxide with a specified metal fractions by controlling the sputtering rates of cathodes using acoustic piezoelectric sensors is described. It is shown that the introduction of Al into titanium oxide improves the electrophysical characteristics of the memristor. The existence of an optimal fraction of Al dopant maximizing the memristor resistance ratio of the high-resistive and low-resistive states is established. The results indicate that the method of reactive magnetron deposition of mixed metal oxide by simultaneous sputtering of two cathodes provides a more uniform distribution of elements across the thickness of the active layer compared with the atomic layer deposition method. The uniform distribution is necessary to improve the stability of the memristor. It can be expected that in the memristors on mixed oxides TixSc1-xOy, HfxSc1-xOy, HfxY1-xOy, HfxLu1-xOy, ZrxSc1-xOy, ZrxY1-xOy, ZrxLu1-xOy an optimal dopant fraction corresponding to the maximally increased ratio of resistances in the high-resistance and low-resistance states will also be observed. Moreover, memristors on films with pure hafnium and zirconium oxides have a much larger range of resistive switching than titanium oxide.

Efficient and hardware-friendly methods to implement competitive learning for spiking neural networks

Spiking neural network (SNN) trained by spike-timing-dependent plasticity (STDP) is a promising computing paradigm for energy-efficient artificial intelligence systems. During the learning procedure of SNN trained by STDP, another two bio-inspired mechanisms of lateral inhibition and homeostasis are usually implemented to achieve competitive learning. However, the previous methods to implement lateral inhibition and homeostasis are not designed with hardware in mind, resulting in solutions that are not efficient for deployment on neuromorphic hardware. For example, the existing lateral inhibition methods induce a great number of connections that are proportional to the square of the number of learning neurons. The classical homeostasis methods depend on the fine-tuned membrane threshold with no hardware solution provided. In this paper, we propose two hardware-friendly and scalable methods to achieve lateral inhibition and homeostasis. Using only one inhibitory neuron for one learning layer, our proposed lateral inhibition method can reduce inhibitory connection number from $$N^2$$ to 2N and hardware overhead by sharing refractory control circuits. Utilizing the adaptive resistance of memristor, we propose a novel homeostasis method through adapting the leaky current of spiking neurons. In addition, the learning efficiency of different homeostasis methods are studied for the first time by simulating on the cognitive task of digital recognition of MNIST dataset. Simulation results show that our proposed homeostasis method can improve the learning efficiency by 30–50% while maintaining the state-of-the-art performance.

A Novel Memristor-Based Gas Cumulative Flow Sensor

In order to overcome the shortcomings of the measurement methods for gas cumulative flow, especially in the long-term continuous measurement, a novel memristor-based gas cumulative flow sensor is proposed in this paper. The sensor is mainly composed of a hot-wire resistor, the memristor module, a feedback compensation network and some basic circuit components. According to the thermal balance equation and the memory characteristics of memristor, the sensor can measure the gas cumulative flow by combining the memristor resistance with the cross-sectional area of the pipe. In order to verify the design of memristor-based gas accumulation flow sensor, experiments are carried out under a constant gas flow velocity, a gradually increasing flow velocity, and a randomly varying flow velocity. The active region thickness D of the selected TiO2/TiO2-n memristor is 40 nm. The hot-wire used is a tungsten wire having a radius of 10 μ m and a length of 2 mm. The gas measured is air at a temperature of 300 K in the paper. The experimental results show that the sensor achieves the measurement of gas cumulative flow. When gas flow velocity at the center of the pipe is 5 m/s, the measuring range is approximately 0–20 m3 and the sensitivity within the effective range is approximately 28.44 Ω/m3. When the gas flow velocity, the memristor pairs increase and the gain of the amplifier changes, the measuring range, and the sensitivity of the sensor will changes accordingly.

Secure memristor replicator architecture with physical uncloneability

A lightweight and highly versatile architecture for replicating the resistance of a source memristor into a destination memristor is presented. This can be useful for storing or backing up sensed analogue information, e.g. sensed resistance, voltage, etc. in a single memristor. The architecture, which is simple and power efficient, is also able to produce non-linear digital codes during the replication process for added security by taking advantage of the non-linear behaviour of memristors. The generated codes can also be used to retrieve the analogue value within acceptable conversion errors, with circuit elements already built into the replicator. The authors also show that the architecture demonstrates physical uncloneable properties.