Memory Capacitors Research Articles

Achieving High Dielectric Constants in Tetragonal Single‐Phase ZrHfO2 Thin Films through the Atomic Layer Deposition Process Using a Mixed Precursor

Herein, the deposition of homogeneous ZrxHf(1−x)O2 (x < 1) thin films for dynamic random‐access memory (DRAM) capacitor dielectric layers by atomic layer deposition (ALD) using a mixed precursor mixture of two precursors is investigated. ZrO2‐ and HfO2‐based thin films are widely used as capacitor dielectric layers because of their high dielectric constant (k) values and low leakage current properties. Herein, particularly, films with mixed structures of ZrO2/HfO2 are investigated because ZrO2 supports the growth of HfO2 in the tetragonal phase. However, the mixed structures deposited by ALD remain inhomogeneous even after the annealing process. The inhomogeneity results in part of the HfO2 remaining in the monoclinic phase, which reduces the k value. Herein, the formation of homogeneous tetragonal‐phase ZrxHf1−xO2 using a mixed precursor consisting of CpZr and CpHf precursors is investigated. The formation of the tetragonal phase in the ZrxHf(1−x)O2 thin films is determined through chemical and structural analysis. The variation of the electrical properties with the Zr/Hf concentration ratio is investigated. The electrical properties are enhanced compared to laminated ZrO2/HfO2 and single thin films.

The Contrasting Impacts of the Al2O3 and Y2O3 Insertion Layers on the Crystallization of ZrO2 Films for Dynamic Random Access Memory Capacitors

AbstractThis study examines the influences of the Al2O3 and Y2O3 insertion layers (ILs) on the structural and electrical features of ZrO2 thin films for their application to dynamic random access memory capacitors. The ultra‐thin Al2O3 IL (0.1–0.2 nm) dissolves into the ZrO2 layers, which causes the top and bottom portions of the ZrO2 film to merge and have smaller lattice parameters. However, the thicker Al2O3 IL (>≈0.4 nm) forms a continuous layer and separates the top and bottom portions of the ZrO2 film. Interestingly, the diffusion of Al does not occur in this case. Overall, the dielectric constant (κ) of the ZrO2/Al2O3/ZrO2 film is lower than that of the undoped ZrO2 film due to the involvement of the low‐κ Al2O3 IL. In contrast, the Y2O3 IL does not interfere with the grain growth of ZrO2, rendering the continuous ZrO2 grain formation throughout the entire film thickness despite the presence of the continuous region with a higher Y‐concentration. The most crucial finding is that the Y‐doping significantly decreases the leakage current without sacrificing the dielectric constant. This leakage current decrease can be ascribed to the p‐type doping effect of Y ions in the n‐type ZrO2.

SiGeSn Quantum Dots in HfO2 for Floating Gate Memory Capacitors

Group IV quantum dots (QDs) in HfO2 are attractive for non-volatile memories (NVMs) due to complementary metal-oxide semiconductor (CMOS) compatibility. Besides the role of charge storage centers, SiGeSn QDs have the advantage of a low thermal budget for formation, because Sn presence decreases crystallization temperature, while Si ensures higher thermal stability. In this paper, we prepare MOS capacitors based on 3-layer stacks of gate HfO2/floating gate of SiGeSn QDs in HfO2/tunnel HfO2/p-Si obtained by magnetron sputtering deposition followed by rapid thermal annealing (RTA) for nanocrystallization. Crystalline structure, morphology, and composition studies by cross-section transmission electron microscopy and X-ray diffraction correlated with Raman spectroscopy and C–V measurements are carried out for understanding RTA temperature effects on charge storage behavior. 3-layer morphology and Sn content trends with RTA temperature are explained by the strongly temperature-dependent Sn segregation and diffusion processes. We show that the memory properties measured on Al/3-layer stack/p-Si/Al capacitors are controlled by SiGeSn-related trapping states (deep electronic levels) and low-ordering clusters for RTA at 325–450 °C, and by crystalline SiGeSn QDs for 520 and 530 °C RTA. Specific to the structures annealed at 520 and 530 °C is the formation of two kinds of crystalline SiGeSn QDs, i.e., QDs with low Sn content (2 at.%) that are positioned inside the floating gate, and QDs with high Sn content (up to 12.5 at.%) located at the interface of floating gate with adjacent HfO2 layers. The presence of Sn in the SiGe intermediate layer decreases the SiGe crystallization temperature and induces the easier crystallization of the diamond structure in comparison with 3-layer stacks with Ge-HfO2 intermediate layer. High frequency-independent memory windows of 3–4 V and stored electron densities of 1–2 × 1013 electrons/cm2 are achieved.

Electrical characterization of memory capacitors for nonvolatile memory applications based on nanolaminated HfO2/Al2O3 and Al-doped HfO2 stacks

Memory capacitors with atomic-layer-deposited HfO2/Al2O3 nanolaminated layers and Al-doped HfO2 charge trapping layers were investigated through capacitance-voltage (C-V) and current-voltage (I-V) measurements. The dielectric constant of the multi-dielectric stack comprising 20-nm Al2O3 blocking oxide, a HfO2-based layer and 2.4-nm tunnel SiO2 does not depend on the manner of Al-introduction in HfO2.The stacks exhibit a negative oxide charge of about -5.1×1011 cm−2 and -2.5×1011 cm−2 for the structures with nanolaminated and doped layers, respectively. The Al-doping of HfO2 is found to produce lower leakage currents. A sublinear behavior of the current-voltage curves is observed in the range of -20 ÷ +10 V for both HfO2-based stacks. Memory windows of ∼ 1 V when charging with ±27-V voltage pulses are obtained; the data suggests that electron trapping is better pronounced in the HfO2/Al2O3 nanolaminate, while positive charge accumulation prevails in the Al-doped HfO2 layers.

Reconfigurable perovskite nickelate electronics for artificial intelligence.

Reconfigurable devices offer the ability to program electronic circuits on demand. In this work, we demonstrated on-demand creation of artificial neurons, synapses, and memory capacitors in post-fabricated perovskite NdNiO3 devices that can be simply reconfigured for a specific purpose by single-shot electric pulses. The sensitivity of electronic properties of perovskite nickelates to the local distribution of hydrogen ions enabled these results. With experimental data from our memory capacitors, simulation results of a reservoir computing framework showed excellent performance for tasks such as digit recognition and classification of electrocardiogram heartbeat activity. Using our reconfigurable artificial neurons and synapses, simulated dynamic networks outperformed static networks for incremental learning scenarios. The ability to fashion the building blocks of brain-inspired computers on demand opens up new directions in adaptive networks.

Heavy water influences memcapacitive behavior of droplet interface bilayers

Memory resistors (memristors) and capacitors (memcapacitors) are circuit elements whose behavior depends on their prior history and are the result of different combinations of nonlinear electric responses. Currently, only a few systems have been shown to exhibit memcapacitive behavior. One of them is the droplet interface bilayer (DIB), developed to study membrane and membrane protein properties in a planar lipid bilayer system. DIBs are formed by suspending two aqueous lipid droplets attached to Ag/AgCl electrodes in an alkane oil reservoir with a lipid monolayer forming at the water-oil interface, where the lipid headgroups interact with water and the acyl chains with the oil phase.

Optoelectronic Memory Capacitor Based on Manipulation of Ferroelectric Properties.

Here, we report on the fabrication of an optoelectronic memcapacitor (memory capacitor) by manipulation of ferroelectric properties through the ferroelectric-semiconductor interface based on a ZnO/PZT (Pb1.1(Zr0.52Ti0.48)O3) capacitor. A ZnO layer was deposited on PZT by the chemical vapor deposition method to achieve the memcapacitive effect. The capacitance-voltage and time-dependent capacitance characteristics of the Al/ZnO/PZT/Al memcapacitor were used as the main outcome measurement. In an asymmetric PZT structure with a ZnO layer, two stable states in the capacitance were obtained, which can be written by either optical or electrical pulses. In addition, the illuminated capacitive characters of the device showed a photovoltaic effect that is sensitive to wavelengths and can be used for nondestructive readout. Thus, this work proposes a low-cost structure solid-state memcapacitor exhibiting the promising potential for memory and computation applications with the ability to program and readout by electrical or optical signals.

Polymeric memory capacitor based on polarization effect fabricated by direct UV cross-linking method

A non-volatile memory capacitor is reported based on the polar-molecule system using a polymer as the dielectric. Two common dielectric polymers, polyvinyl pyridine (PVP) and polyvinyl alcohol (PVA), were studied, and their behavior was examined. To fabrication, the thin polymeric film layer was embedded between two electrodes to form a three-layer sandwich. The charge-voltage and pulse response characters were considered as the main resulted measurement. A memory window of 5 V was obtained by sweeping the applied voltage of the memory capacitor between ± 10 V. Furthermore, the polarization role in charge-voltage hysteresis of the polymeric memory was confirmed with the permittivity–frequency measurement. The hysteresis was increased with the increasing of the polar branches existing inside the polymer. Sample in the uncrosslinked-polymer form displayed a large hysteresis, while no hysteresis was observed in photo-crosslinked ones. This selectivity in efficiency between uncrosslinked and photo-crosslinked samples enabled us to fabricate small size polymeric memory cells through a simple fabrication procedure. The presented memory capacitor shows repeatable, stable, and non-volatile memory behavior regarding data retention and erase/write operations for neuromorphic, printable, and biomedical applications.

(Invited) Ferroelectric Hafnium Oxide for Non-Volatile Memory Applications: From Single Capacitors to Memory Arrays

This year marks the 10th anniversary of the public announcement of the discovery of ferroelectricity in HfO2-based thin films. Tremendous strides have been made in both the physical understanding and the technological use of ferroelectric HfO2. These unique fluorite-structured ferroelectrics have outstanding potential for commercial applications due to their scalability, CMOS-compatibility, and facile manufacturability. Such advantages make ferroelectric HfO2 particularly attractive for nonvolatile memories technologies such as ferroelectric random access memory (FRAM) and ferroelectric field effect transistors. Due to the wide variety of conditions in which ferroelectricity can emerge in HfO2 thin films, there has been a vast effort by the international scientific community to enhance and optimize the ferroelectric properties using a wide variety of approaches. Advancements in thin film ferroelectric capacitor and memory array technologies are therefore progressing rapidly.The structural properties of HfO2 are a major focal point for technology development because the competition between several crystalline phases in HfO2 thin films can have a major impact on device performance. For thin film memory capacitors, stabilizing the polar orthorhombic phase and eliminating secondary paraelectric phases is paramount in achieving robust polycrystalline HfO2 ferroelectrics. Doping and the presence of a capping electrode during crystallization have been extensively demonstrated to influence the emergence and stability of the ferroelectric orthorhombic phase. Greater attention has been placed recently on the thin film growth conditions in atomic layer deposition and physical vapor deposition, especially with regard to the oxidation conditions that have been shown to have a substantial impact on the device performance of ferroelectric HfO2 and Hf0.5Zr0.5O2 capacitors. Composition, film growth, and the crystallization processes are critical aspects for thin film ferroelectric capacitor development and the latest developments will be comprehensively reviewed in the context of how the material properties relate to nonvolatile memory performance.Developments in thin film HfO2 ferroelectric capacitors are now coming to fruition with the emergence of ferroelectric random access memory arrays and demonstrators. Thin film ferroelectric HfO2 based capacitors are successfully being demonstrated in back-end-of-line (BEOL) processes at the 130nm CMOS technology. The performance of these early demonstrator memory arrays show very promising long term data retention, large memory windows with good statistical distributions, and projections for area scaling to nanoscale dimensions. The transition from large-scale micron-sized laboratory devices to smaller scale integrated capacitors has proven to be a major step forward in endurance cycling with >1011 cycles being reported in memory arrays. The most recent integration of thin film ferroelectric HfO2 capacitors into FRAM memory arrays and what future developments are expected for HfO2 ferroelectric random access memories will be presented. Figure 1

An Order–Disorder Type High‐Temperature Multiaxial Supramolecular Ferroelectric

AbstractMuch progress has been witnessed in exploring host–guest type ferroelectrics represented by ammonium‐crown ether compounds. However, the major obstacles in expanding their promising applications in nonvolatile memory elements, capacitors, and sensors are relatively low Curie temperature (Tc) and uniaxial attribute. Herein, by screening different organic cations and inorganic anions to assemble with 18‐crown‐6 molecule, it is found that a new ammonium‐crown ether inclusion ferroelectric 1, [(ATHTP)(18‐crown‐6)]BF4 (ATHTP = protonated 4‐aminotetrahydrothiopyran), undergoing a ferroelectric phase transition at a much higher Tc of 392 K which is comparable to BaTiO3 (Tc = 393 K). Notably, the distinct symmetry breaking, that is, 4/mmmFmm2, leads to a biaxial ferroelectric with four equivalent directions of polarization. Such high Tc and multiaxial nature are rare in existing crown ether‐based ferroelectrics. This work can help the exploration of high‐Tc multiaxial ferroelectrics toward further device applications.

Ag nanoparticles capped TiO2 nanowires array based capacitive memory

Glancing angle deposition technique was used to fabricate Ag nanoparticles (NPs) capped TiO2 Nanowire (NW) array structure for capacitive memory application. Electron microscopes confirmed the sandwiched structure of Ag NPs between TiO2 thin-film (TF) and NW. The average length of the vertical TiO2 NW and diameter of Ag NPs (with density ~ 1012 cm2) were found to be ~ 350 ± 5 nm and ~ 3.2 ± 0.4 nm, respectively. An enhanced photoluminescence was observed in case of Ag NPs capped TiO2 NWs due to the presence of high carriers as compared to bare TiO2 NW. The capacitance (C)–voltage (V) hysteresis was measured for both Ag NPs capped TiO2 NW and bare TiO2 NW at different sweeping voltage (± 3– ± 10 V) at 1 MHz frequency. A high capacitive memory window of 7.12 V was obtained for Ag NP capped TiO2 NW at ± 10 V with an excellent endurance upto 1000 cycle. Significantly lesser charge loss of 23% was obtained after a span of 104 s with a hole and electron loss of 10.6% and 17.8% respectively. The program and erase process in the device was explained with the help of a band diagram.

Femtojoule‐Power‐Consuming Synaptic Memtransistor Based on Mott Transition of Multiphasic Vanadium Oxides

AbstractTo realize the potential of Mott transition of multiphasic vanadium oxides (VOx) for memory applications, the development of VOx memtransistors on SiO2 wafer is introduced. Through electrical characterizations, the volatile memory behaviors of the VOx memtransistors are observed in both two‐ and three‐terminal measurements. Their capacitive memory and resistive switching mechanisms are strongly related to the mixed VOx/SiO2 interface (called VSiOx). VSiOx supports the Mott transition in VOx at low bias voltages (<0.5 V), leading to the low power consumption of the memtransistor. Moreover, the fast switching time (≈35 ns) and tunable memory retention with the synaptic functions (potentiation and depression) of the memtransistors (by using the gate and drain biases) are demonstrated. Overall, the findings open up major opportunities for constructing ultrafast and femto‐joule power‐consuming neuromorphic devices.

Resistive switching characteristics of epitaxial NiO thin films affected by lattice strains and external forces

We investigated the resistive switching characteristics of NiO films grown epitaxially on two single-crystal Rh and Ni substrates. Two epitaxial NiO films were relatively small compressive strained on the Rh substrate, and confirmed by the x-ray diffraction experiments that the strain was relatively large compressive on the Ni substrate. Comparing the forming, SET, and RESET voltages of NiO resistive switching random access memory capacitors, NiO films grown on the Ni substrates showed relatively higher voltages than Rh substrates. We propose that this compressive strain has an effect on raising the forming, SET, and RESET voltages. Furthermore, we observed that the forming voltage decreases while reducing the compressive strain by applying pressure to the NiO thin film grown on the Ni substrate with an atomic force microscope tip. In addition, we showed that relaxation of compressive strain by external force by first-principles calculations can reduce the oxygen deficiency energy and lower the forming voltage and working voltages, which supports the experimental results well.

Modelling the Atomic Layer Deposition of Cobalt and Ruthenium on NHx-Terminated Metal Surfaces

Atomic layer deposition (ALD) is widely used in microelectronics and semiconductor industry to deposit very thin films as part of device fabrication in nano- or subnano-dimensions. The key advantages of ALD are the conformality and precise thickness control at the atomic scale, which are difficult for physical or traditional chemical vapor deposition methods. Cobalt (Co) and Ruthenium (Ru) are used as a seed layers for metallization of interconnects. They are also potential materials for the electrode in dynamic random-access memory (DRAM) capacitors and metal-oxide-semiconductor field-effect transistors (MOSFETs). Plasma-enhanced ALD (PE-ALD) is used for low-temperature thin film growth by alternating exposures of metal precursors and plasma reactants. During the PE-ALD growth of metals, N-plasma, for example, NH3 or a mixture of N2 and H2, has been applied to avoid surface metal oxidation. The PE-ALD of Ru and Co has been experimentally investigated using metal precursors such as RuCp2, Ru(EtCp)2, CoCp2, and CoCp(CO)2. However, the reaction mechanism is not clear and theoretical studies on the reaction mechanism is entirely lacking.In this presentation, we study the PE-ALD growth of Co and Ru by first principle calculations. The (001) surface of both metals, with a hexagonal structure, is the most stable and the (100) surface with a zigzag structure is less stable but has high reactivity. These two surfaces allow the study of the influence of the surface facet. The surface saturation coverage was studied by considering individual adsorption and co-adsorption of NH and NH2 to terminate both surfaces. On the (001) surface, the zero K saturation coverage for NH is 1ML on Ru and 6/9ML on Co. For NH2, the saturation coverages are 6/9ML on Co and Ru surfaces. On the (100) surface, the saturation coverages are 2ML for NH on Ru and Co surfaces, 1.33 ML for NH2 on Ru, and 1ML for NH2 on Co surface. The higher saturation coverage on (100) surface is attributed to the unique trench structure, which provides more available surface sites than that of (001) surface. We also consider co-adsorption of NH and NH2 on (001) and (100) surfaces. The results are then analyzed with ab initio thermodynamics by calculating the Gibbs free energy. Both the ultra-high vacuum (UHV) condition and standard ALD operating condition are used to elucidate the effect of pressure and temperature on the termination of metal surfaces.The adsorption and reactions of metal precursors (CoCp2 and RuCp2) on NHx terminated metal surfaces were investigated with the inclusion of van der Waals corrections. Two possible adsorption structures, namely the precursor lying parallel and perpendicular to the NHx-terminated surfaces, were considered at zero K and ALD conditions. Possible reactions include: precursor adsorption, first hydrogen transfer, first Cp ligand dissociation, first Cp ligand desorption, second hydrogen transfer, and second Cp ligand desorption. The barrier for proton transfer was calculated using climbing image nudged elastic band (CI-NEB) method. Our results show that (100) surface has higher activity than (001) surface. In addition, the Cp ligand elimination of CoCp2 has lower barrier than RuCp2, regardless of surface facet. After the metal precursor pulse, the surface is terminated with MCp fragment or M atom depending on surface facet, where M is Ru or Co. The surface N atom and H atom can be eliminated during the following plasma step by forming NH3, N2 or H2. After a full cycle, the surface is an NHx-terminated metal surface and ready for the next cycle. This work will be important to reveal the mechanism and feasibility of atomic layer deposition of metals using N-plasma.

Improved Properties of the Atomic Layer Deposited Ru Electrode for Dynamic Random-Access Memory Capacitor Using Discrete Feeding Method.

Ruthenium (Ru) thin films deposited via atomic layer deposition (ALD) with a normal sequence and discrete feeding method (DFM) and their performance as a bottom electrode of dynamic random-access memory (DRAM) capacitors were compared. The DFM-ALD was performed by dividing the Ru feeding and purge steps of the conventional ALD process into four steps (shorter feeding time + purge time). The surface morphology of the Ru films was improved significantly with the DFM-ALD, and the preferred orientation of the Ru films was changed from relatively random to a <101>-oriented direction. Under the DFM-ALD condition, the higher susceptibility of oxygen atoms to the Ru electrode resulted in a higher proportion of the RuO2 formation on the Ru film surface during the subsequent TiO2 ALD process. This higher RuO2 portion leads to higher crystallinity of the local-epitaxially grown TiO2 films with a rutile phase. Such improvement also decreased the interfacial component of equivalent oxide thickness (EOTi) by ∼0.1 nm compared with the cases on sputtered Ru film, which showed an even smoother surface morphology. Consequently, the minimum EOT values when the Ru bottom electrodes deposited via DFM-ALD were adopted were 0.76 and 0.48 nm for TiO2 and Al-doped TiO2 films, respectively, while still satisfying the DRAM leakage current density specification (<10-7 A/cm2 at a capacitor voltage of 0.8 V).

A Global Shutter Wide Dynamic Range Soft X-Ray CMOS Image Sensor With Backside- Illuminated Pinned Photodiode, Two-Stage Lateral Overflow Integration Capacitor, and Voltage Domain Memory Bank

This article presents a prototype $22.4~\mu \text{m}$ pixel pitch global shutter (GS) wide dynamic range (WDR) soft X-ray CMOS image sensor (sxCMOS). Backside-illuminated (BSI) pinned photodiodes with a 45- $\mu \text{m}$ thick Si substrate were introduced for low noise and high radiation hardness to high energy photons. Two-stage lateral overflow integration capacitor (LOFIC) and voltage domain memory bank with high-density Si trench capacitors were introduced for WDR and for GS. The developed sxCMOS achieved maximum 21.9 Me− full well capacity with a single exposure 129 dB dynamic range by GS operation. Over 70% quantum efficiency (QE) toward soft X-ray was successfully achieved. The developed prototype sxCMOS is a step forward toward a 4 M pixel detector system to be utilized in next-generation synchrotron radiation facilities and X-ray free-electron lasers.

Graphene oxide charge blocking layer with high K TiO2 nanowire for improved capacitive memory

Glancing angle deposition technique was adopted to fabricate TiO2 nanowire (NW) over spin coated graphene oxide (GO) thin-film (TF) for capacitive memory application. The formation of hybrid structure was studied using field emission scanning electron microscope. High accumulation capacitance of 0.994 nF/cm2 at 7 MHz frequency was obtained for fabricated Au/TiO2 NW/GO TF/Si device as compared to Au/TiO2 NW/Si device (0.4014 nF/cm2). A theoretical study using delta depletion model was done, which further validated the relative permeability and flat band voltage of the devices at higher frequency. The memory window of Au/TiO2 NW/Si was found to be 1.36 V at±10 V, which increased to 3.72 V for Au/TiO2 NW/GO TF/Si hybrid device. Also, a large charge storage capacity with good retention (105 s) and endurance (1000 cycles) was observed for the hybrid device. Moreover, Au/TiO2 NW/GO TF/Si device exhibited low leakage current density of 1.6 µA/cm2 at +1 V as compared to Au/TiO2 NW/Si device (11.3 µA/cm2 at +1 V). The GO TF layer at the bottom increased the potential difference between TiO2 and GO, which acted as a charge trapping layer and thus demonstrated as a good candidate for non-volatile memory application.

Presence of capacitive memory in GLAD-synthesized WO3 nanowire

Presence of capacitive memory in GLAD-synthesized WO3 nanowire

Origin of the retention loss in ferroelectric Hf0.5Zr0.5O2-based memory devices

For the decade, ferroelectric hafnium oxide films are attracting the interest as a promising functional material for nonvolatile ferroelectric random access memory due to full scalability and complementary metal-oxide-semiconductor integratability. Despite the significant progress in key performance parameters, particularly, the readout charge and voltage as well as the endurance, the developed devices can only be implemented by the electronics industry if they exhibit a standard retention time of 10 years. Material engineering modifies not only target ferroelectric properties, but also the retention time. To understand how to maintain the sufficient retention, the physical mechanism behind it should be clarified. For this purpose, we have fabricated the capacitor memory cell with a high rate of retention loss. Comparing the device performance with the results of capacitance transient spectroscopy, operando hard X-ray photoelectron spectroscopy and in situ piezoresponse force microscopy, we have concluded that the retention loss is caused by the accumulation of the positively charged oxygen vacancies at the interfaces with capacitor electrodes. The redistribution of charges during long-term storage of information is fully defined by the domain structure in memory cell.

(Invited) Advanced ALD Applications

CMOS device feature size down-scaling is still continuous. Nowadays it reaches 5nm and beyond. The technology development in semiconductor industry encounters many new challenges. As consequences, new materials and new techniques are required to meet the challenges.At 45nm technology node, Atomic Layer Deposition (ALD) is introduced for gate stack process. Since then ALD is being used more and more in advanced technology nodes because of its intrinsic process features, e.g. accurate thickness control and excellent step coverage etc. Especially for the reduced feature sizes, ALD exhibits as a powerful technique, not only in gate stack, but also in advanced patterning process (SADP and SAQP) and advanced metallization barrier materials etc.Hf-based hik material deposited by ALD is widely used in logic gate stack and memory capacitor. Recently Hf-based materials are continuously getting more attentions due to its intrinsic features. It is reported that Hf-based materials can exhibit different resistor stage. Therefore it can be used as memristor in ReRAM. People also report Hf-based materials can be crystalized into orthorhombic phase and thus exhibit ferroelectric characteristics[1,3]. Based on this feature, it can be used in NCFET and FeRAM. In this paper, we can going to review the applications of Hf-based materials deposited by ALD in new memory fields.Although device down-scaling is still going on, the challenges are tremendous. As an alternative, 3D-IC packaging, stacks different chip together and increases the packaging density and chip performance. Therefore, recently 3D-IC packaging is getting more and more attractive. However, there are many constrains in 3D-IC packaging, e.g. low thermal budget, high aspect ratio structure, excellent film quality etc.. ALD is gradually accepted in 3D-IC packaging due to its intrinsic features. In this paper, we are going to discuss some ALD applications in advanced 3D-IC packaging.REFERENCES[1] J. Müller et al, NanoLetters, vol. 12, no. 8, pp. 4318-4323, 2012.[2] M. H. Lee et al, IEEE J. of the Electron Device Society, vol. 3, no. 4, pp. 377-381, 2015.[3] M. H. Lee et al, IEEE Electron Device Letter, vol. 36, no. 4, pp. 294-296, 2015.