Abstract
CMOS device feature size down-scaling is still continuous. Nowadays it reaches 5nm and beyond. The technology development in semiconductor industry encounters many new challenges. As consequences, new materials and new techniques are required to meet the challenges.At 45nm technology node, Atomic Layer Deposition (ALD) is introduced for gate stack process. Since then ALD is being used more and more in advanced technology nodes because of its intrinsic process features, e.g. accurate thickness control and excellent step coverage etc. Especially for the reduced feature sizes, ALD exhibits as a powerful technique, not only in gate stack, but also in advanced patterning process (SADP and SAQP) and advanced metallization barrier materials etc.Hf-based hik material deposited by ALD is widely used in logic gate stack and memory capacitor. Recently Hf-based materials are continuously getting more attentions due to its intrinsic features. It is reported that Hf-based materials can exhibit different resistor stage. Therefore it can be used as memristor in ReRAM. People also report Hf-based materials can be crystalized into orthorhombic phase and thus exhibit ferroelectric characteristics[1,3]. Based on this feature, it can be used in NCFET and FeRAM. In this paper, we can going to review the applications of Hf-based materials deposited by ALD in new memory fields.Although device down-scaling is still going on, the challenges are tremendous. As an alternative, 3D-IC packaging, stacks different chip together and increases the packaging density and chip performance. Therefore, recently 3D-IC packaging is getting more and more attractive. However, there are many constrains in 3D-IC packaging, e.g. low thermal budget, high aspect ratio structure, excellent film quality etc.. ALD is gradually accepted in 3D-IC packaging due to its intrinsic features. In this paper, we are going to discuss some ALD applications in advanced 3D-IC packaging.REFERENCES[1] J. Müller et al, NanoLetters, vol. 12, no. 8, pp. 4318-4323, 2012.[2] M. H. Lee et al, IEEE J. of the Electron Device Society, vol. 3, no. 4, pp. 377-381, 2015.[3] M. H. Lee et al, IEEE Electron Device Letter, vol. 36, no. 4, pp. 294-296, 2015.
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