Low-temperature Microwave Annealing Research Articles

Corrections to “Low-Temperature Microwave Annealing Processes for Future IC Fabrication—A Review” [Mar 14 651-665

Corrections to “Low-Temperature Microwave Annealing Processes for Future IC Fabrication—A Review” [Mar 14 651-665

Enhancement of electrical properties of a-IGZO thin film transistor by low temperature (150 °C) microwave annealing for flexible electronics

A relatively low-temperature process is required to fabricate amorphous oxide thin film transistor (TFT) display backplanes for flexible electronics. However, in order to ensure the outstanding electrical property of TFT, a typical post-annealing process should be performed at 300 °C or above. This is not compatible with flexible substrates in the process. In our work, we applied microwave annealing (MWA) at a low-temperature (150 °C) to the oxide TFT and verified its feasibility through the evaluation of various electrical properties. Even an a-IGZO TFT by MWA at such a low-temperature shows high mobility (29.0 cm2/V s) by DC ID-VG measurement, which is 4 ∼ 5 times higher than other counterparts, indicating that the MWA process is very effective to minimize the defects in an oxide semiconductor channel. To further investigate the intrinsic mobility of TFT with negligible charge trapping, we carried out fast and pulse ID-VG measurement methods. The intrinsic mobility extracted from this measurement is found to be 35.3 cm2/V s, 21.7% higher than that of DC ID-VG. We are expecting that the low-temperature MWA process would be widely used for the process of oxide TFT in a flexible platform.

Dynamic Behavior Improvement of Normally-Off p-GaN High-Electron-Mobility Transistor Through a Low-Temperature Microwave Annealing Process

The surface morphology optimization of ohmic contacts and the Mg out-diffusion suppression of normally off p-GaN gate high-electron-mobility transistors (HEMTs) continue to be challenges in the power electronics industry in terms of the high-frequency switching efficiency. In this study, better current density and reliable dynamic behaviors of p-GaN gate HEMTs were obtained simultaneously by adopting low-temperature microwave annealing (MWA) for the first time. Moreover, HEMTs fabricated using MWA have a higher ION/IOF ratio and lower gate leakage current than the HEMTs fabricated using rapid thermal annealing. Due to the local heating effect, a direct path for electron flow can be formed between the two-dimensional electron gas and the ohmic metals with low bulges surface. Moreover, the Mg out-diffusion of p-GaN gate layer was also suppressed to maintain good current density and low interface traps.

Ultra-low resistivity aluminum doped ZnO thin films on flexible substrates using sol-gel solution deposition

The effect of a combination of low temperature heat treatments, microwave annealing, and low temperature vacuum annealing on the resistivity of 1% Al-doped ZnO thin films (AZO) deposited on both flexible polyimide films and rigid silicon substrates was investigated. The sol-gel deposition technique was used to deposit successive layers with a 0.5-hour heat treatment application prior to the deposition of additional layers. Following the final layer deposition and 0.5-hour treatment, the samples either underwent a final thermal annealing or microwave plus thermal annealing. Finally, a post-treatment annealing in a high vacuum chamber at 300 °C was administered. The films exhibited ultra-low resistivity of 14 Ω-cm on the polyimide with good adhesion qualities and a 0.08 Ω-cm resistivity on silicon wafers. A hexagonal wurtzite structure with the (002) c-axis orientation in the film growth direction was evident along with a dense microstructure of homogeneously distributed grains.

High Performance InAlN/GaN/Si High Electron Mobility Transistor Using Microwave Ohmic Annealing Technique

In this study, a high-performance InAlN/GaN high electron mobility transistor (HEMT) was fabricated using low-temperature microwave annealing (MWA) as the ohmic metal alloy process for the first time. Ni–Al alloy aggregation is significant for InAlN devices because of the high Al fraction in InAlN layer. Furthermore, the indium segregation and out-diffusion of the InAlN barrier layer resulted in lower drain current and the formation of extra trap centers. Compared with traditional rapid thermal annealing with a high-temperature process window, MWA results in simultaneously superior ohmic contact and wafer sheet resistances because of the superior surface morphology of the ohmic metal alloy in the MWA device. Moreover, the heterostructure interfacial quality of two-dimensional electron gas density can be maintained through low-temperature MWA, as indicated by reciprocal space map measurements. Furthermore, Baliga's figure-of-merit calculation indicated that the MWA-InAlN HEMT had superior DC characteristics, providing improved device radiofrequency bandwidth and output power density performance.

Low-Temperature Ohmic Contact Formation in AlN/GaN HEMT Using Microwave Annealing

In this brief, a low-temperature microwave annealing (MWA) method is demonstrated for the formation of ohmic contact to AlN/GaN high electron mobility transistors (HEMTs) for the first time. Compared with the traditional rapid thermal annealing (RTA) technique, MWA-HEMT can achieve a comparable low ohmic contact resistance with much smoother surface of ohmic contacts. Transmission electron microscopy results show that no direct current path connecting the 2-D electron gas and the metal is formed. Temperature-dependent contact resistance measurement indicates that field emission tunneling dominates the current transport mechanism in ohmic contact formation. The maximum dc output current density of 1.4 A/mm and the peak extrinsic transconductance ( ${G}_{\textsf {m}}$ ) of 270 mS/mm are measured on ${2} \times {8} \,\,{\sf \mu } $ $m^2$ gate MWA-HEMTs. Besides, MWA-HEMTs have higher ${I}_{ \mathrm{ ON}}/{I}_{ \mathrm{ OFF}}$ ratio due to the lower gate leakage current than that of RTA-HEMTs.

Ultra-Shallow Junction Formation by Monolayer Doping Process in Single Crystalline Si and Ge for Future CMOS Devices

We focused on the damage-free monolayer doping (MLD) method starting from a chemical reaction of molecules on Si and Ge surfaces and applied it to 3D MOSFET device fabrication. MLD methods were verified by different material analysis, such as XPS and Raman spectroscopy. For a Si-based FinFET structure, compared to the device with ion implantation, the short channel effect of source and drain (SD) extension regions formed by MLD are improved. The shallower SD extension regions formed by low-temperature microwave annealing (MWA) are expected to the device showing better electrical properties than deeper ones formed by RTA. In addition, formation of the n- and p-type doping in Ge by MLD was also investigated. Even after annealing at 800°C for 300 sec by RTA, the p-type doping still exhibits a low surface doping concentration due to the low diffusion coefficient of B in Ge and surface diffusion limitations at the MLD/Ge interface. By using a combination of RTA and CO2 laser spike annealing (LSA), MLD n-type doping in Ge are formed with junction depths of ≈15 nm, and peak concentration of ≈ 6 × 1020 atoms/cm3. The dopant activation for the MLD-doped channels of Ge junctionless FinFETs (JLFinFETs) is improved after the additional CO2 LSA.

High dopant activation of phosphorus in Ge crystal with high-temperature implantation and two-step microwave annealing

In this letter, high-temperature ion implantation and low-temperature microwave annealing were employed to achieve high n-type active concentrations, approaching the solid solubility limit, in germanium. To use the characteristics of microwave annealing more effectively, a two-step microwave annealing process was employed. In the first annealing step, a high-power (1200 W; 425 °C) microwave was used to achieve solid-state epitaxial regrowth and to enhance microwave absorption. In the second annealing step, contrary to the usual process of thermal annealing with higher temperature, a lower-power (900 W; 375 °C) microwave process was used to achieve a low sheet resistance, 78Ω/◻, and a high carrier concentration, 1.025 × 1020 P/cm3, which is close to the solid solubility limit of 2 × 1020 P/cm3.

High Dopant Activation and Diffusion Suppression of Phosphorus in Ge Crystal with High-Temperature Implantation By Two-Step Microwave Annealing

In this Letter, high-temperature ion implantation and low-temperature microwave annealing were employed to achieve maximum n-type active concentration, which can be fully activated in germanium. To use the characteristic of microwave annealing more effectively, two-step microwave annealing was also employed. In the first step annealing, a high-power (1200 W; 425 °C) microwave was used to achieve solid-state epitaxial regrowth (SPER) and enhance microwave absorption. In the second step of annealing, unlike in conventional thermal annealing, which requires a higher energy to activate the dopant, a low-power (900W;375 °C) microwave was used to achieve lowest sheet resistance 78Ω/□ and maximum active concentration 1.025×1020 P/cm3, which close to its solid solubility limit of 2×1020 P/cm3.

Schottky Barrier Height Tuning via the Dopant Segregation Technique through Low-Temperature Microwave Annealing.

The Schottky junction source/drain structure has great potential to replace the traditional p/n junction source/drain structure of the future ultra-scaled metal-oxide-semiconductor field effect transistors (MOSFETs), as it can form ultimately shallow junctions. However, the effective Schottky barrier height (SBH) of the Schottky junction needs to be tuned to be lower than 100 meV in order to obtain a high driving current. In this paper, microwave annealing is employed to modify the effective SBH of NiSi on Si via boron or arsenic dopant segregation. The barrier height decreased from 0.4–0.7 eV to 0.2–0.1 eV for both conduction polarities by annealing below 400 °C. Compared with the required temperature in traditional rapid thermal annealing, the temperature demanded in microwave annealing is ~60 °C lower, and the mechanisms of this observation are briefly discussed. Microwave annealing is hence of high interest to future semiconductor processing owing to its unique capability of forming the metal/semiconductor contact at a remarkably lower temperature.

High Dopant Activation and Diffusion Suppression of Phosphorus in Ge Crystal with High-Temperature Implantation By Two-Step Microwave Annealing

In this paper, high-temperature ion implantation and low-temperature microwave annealing were employed to achieve maximum n-type active concentration, which can be fully activated in germanium. To use the characteristic of microwave annealing more effectively, two-step microwave annealing was also employed. In the first step annealing, a high-power (1200 W; 425 °C) microwave was used to achieve solid-state epitaxial regrowth (SPER) and enhance microwave absorption. In the second step of annealing, unlike in conventional thermal annealing, which requires a higher energy to activate the dopant, a low-power (900W;375 °C) microwave was used to achieve lowest sheet resistance 78Ω/□ and maximum active concentration 1.025×10 20 P/cm 3 , which close to its solid solubility limit of 2×10 20 P/cm 3 . Figure 1

Boron diffusion layer formation using Ge cryogenic implantation with low-temperature microwave annealing

It is shown that a low-sheet-resistance p-type diffusion layer with a small diffusion depth can be fabricated efficiently by cryogenic boron and germanium implantation combined with low-temperature (400 °C) microwave annealing. Compared with the conventional annealing at 1000 °C, a much smaller diffusion depth is obtained at the same sheet resistance. The low sheet resistance at 400 °C is due to microwave absorption in the surface amorphous layer, which is formed by cryogenic germanium implantation. However, the pn junction leakage was worse than that in conventional annealing, because crystal defects remain near the amorphous/crystal interface after microwave annealing. It is found that the pn junction leakage is improved greatly by cryogenic germanium implantation. These results show that a suitable combination of cryogenic implantation and microwave annealing is very promising for p-type diffusion layer technology.

Microwave Annealing for NiSiGe Schottky Junction on SiGe P-Channel.

In this paper, we demonstrated the shallow NiSiGe Schottky junction on the SiGe P-channel by using low-temperature microwave annealing. The NiSiGe/n-Si Schottky junction was formed for the Si-capped/SiGe multi-layer structure on an n-Si substrate (Si/Si0.57Ge0.43/Si) through microwave annealing (MWA) ranging from 200 to 470 °C for 150 s in N2 ambient. MWA has the advantage of being diffusion-less during activation, having a low-temperature process, have a lower junction leakage current, and having low sheet resistance (Rs) and contact resistivity. In our study, a 20 nm NiSiGe Schottky junction was formed by TEM and XRD analysis at MWA 390 °C. The NiSiGe/n-Si Schottky junction exhibits the highest forward/reverse current (ION/IOFF) ratio of ~3 × 105. The low temperature MWA is a very promising thermal process technology for NiSiGe Schottky junction manufacturing.

Effect of hybrid nanoinks on solution-based Sn-doped In2O3 films under low-temperature microwave annealing

Solution-based Sn-doped In2O3 (ITO) films were fabricated using well-dispersed hybrid ITO nanoinks, which consisted of high-crystalline ITO nanoparticles and ITO sols, by combining the methods of spin-coating and low-temperature microwave annealing. To investigate the optimum conditions for the hybrid ITO nanoinks, we used four different weight ratios of ITO nanoparticles to ITO sols in the hybrid nanoinks: 0 (sample A), 0.06 (sample B), 0.12 (sample C), and 0.24 (sample D). Sample D exhibited superior sheet resistance (~131.3Ω/□), , good transmittance (~87.2%), and excellent figure of merit (~19.3×10−4Ω−1) when compared to the other samples. This improvement performance is due to the improved densification of the solution-based ITO films, where the optimum amount of ITO sols in the films served as a smooth medium that linked the high-crystalline ITO nanoparticles. Therefore, our study can offer a novel strategy that can be applied to flexible transparent conducting films (TCFs) as well as to the low-cost fabrication of high-performance TCFs in various optoelectronic applications.

Effects of Channel Width on High-Frequency Characteristics of Trigate Poly-Si Thin-Film Transistors Fabricated by Microwave Annealing

In this paper, the high-frequency performance of trigate polycrystalline silicon thin-film transistors (poly-Si TFTs) is analyzed using low-temperature microwave annealing. The variation of the cutoff frequency and the maximum oscillation frequency with the width of the channel wire is investigated. A poly-Si TFT with a short channel and a narrow channel wire, annealed using microwave, has a high driving current, a good gate controllability, and a better high-frequency performance than one that annealed by rapid thermal annealing.

Low-Temperature Ohmic Contact Formation in GaN High Electron Mobility Transistors Using Microwave Annealing

In this letter, a low-temperature microwave annealing (MWA) method is first reported for the formation of ohmic contact to AlGaN/GaN high electron mobility transistors (HEMTs). Compared with the traditional GaN devices annealed by rapid thermal annealing (RTA), MWA-HEMTs can achieve a low ohmic contact resistance with much smoother surface of ohmic contacts. The spike mechanism is observed in our ohmic contact annealed by microwave under a low-temperature condition. Besides, MWA-HEMTs have higher I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio and lower gate leakage current than the fabricated RTA-HEMTs in this letter.

High performance solution-deposited bilayer channel indium–zinc-oxide thin film transistors by low-temperature microwave annealing

We report the high-performance solution-deposited indium–zinc-oxide (IZO) TFTs with a bilayer channel structure fabricated at low temperature using a microwave irradiation (MWI) post-deposition annealing (PDA) process. Although, the MWI process temperature (89 °C) was much lower than the baking temperature (180 °C) of solution precursors, the microwave irradiated film has comparable chemical binding states to the thermal annealed film at 600 °C. For the enhancement of channel performance, channel engineering was applied by exploiting bilayer channel with different composition-ratios of In and Zn (In:Zn = 3:1, 2:1, 1:1, 1:2 and 1:3). Bilayer channel IZO TFTs consist of electron transfer channel layer and capping layer. The electrical characteristics for various combinations of bilayer channel were investigated. As a result, the transfer channel layer of In:Zn = 1:1 and the capping layer of In:Zn = 3:1 turned out to be effective for improving the mobility, subthreshold swing and hysteresis of IZO TFTs. We found that the electrical characteristics of solution-deposited IZO TFTs can be greatly improved by using bilayer channel structure and low temperature MWI-PDA process.

High-Frequency Performance of Trigate Poly-Si Thin-Film Transistors by Microwave Annealing

This letter investigates the high-frequency performance of trigate polycrystalline silicon thin-film transistors (poly-Si TFTs) using low temperature microwave annealing (MWA). MWA exhibits sufficient dopant activation efficiency, good short channel effect control, and a higher maximum oscillation frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ) of poly-Si TFTs than does rapid thermal annealing. In addition, MWA can fabricate nanoscale devices. Poly-Si TFTs with short channel annealed by microwave reveals better high-frequency performance and switching characteristics.

Low-Temperature Microwave Annealing for Tunnel Field-Effect Transistor

Unlike the high-temperature activation of dopants, such as rapid thermal annealing (RTA), the activation of dopants by low-temperature microwave annealing (MWA) suppresses their diffusion, reducing screening tunneling length ( $\lambda $ ). This letter compares low-temperature (490 °C) MWA with high-temperature (1050 °C) RTA of a fin-shaped polycrystalline silicon (Poly-Si) tunnel field-effect transistor (TFET). The band-to-band tunneling voltage ( $\mathrm{V}_{\mathrm {\mathbf {BTBT}}}$ ) indicates clearly that TFET annealed by MWA had a lower $\lambda $ than TFET that was annealed by RTA. The TFET that was annealed by MWA had a high ON/OFF current ratio of $10^{\mathrm {\mathbf {8}}}$ , a low subthreshold swing, and an almost negligible drain-induced barrier lowering.

Ultra low-temperature microwave annealing for ultra-shallow junctions and P-MOS devices

Low energy ion implantation and low–temperature microwave annealing were used in this study to fabricate ultra–shallow junctions (USJs). A two–steps modulatory microwave annealing (MWA) process was employed to recover and activate a boron (400 eV) implanted silicon wafer. In the first step, 2.4 kW high power MWA was used to regrow an amorphous layer with the crystal silicon phase and thus enhance MWA absorption. After crystal silicon regrowth, 0.6 kW low power MWA was used to activate the implanted boron. The SIMS profile shows that the junction depth @5e18 was 13.5 nm, which is able to meet the requirement of the 20 nm VLSI process. The current on/off ratio (Ion/off) of the P–MOS device is higher than 106 (VDS = −0.05 V). The device subjected to two–steps MWA at 2400 W for 300 s + 600 W for 600 s had the lowest Vth. It also had the lowest subthreshold swing (SS), which means that it was best able to control the leakage current.