Low Temperature Reflow Research Articles

Optical, polarizable and MOS properties of crystallizable ZnO and PbO-based glasses

The purpose of the experiments is to prepare low-temperature reflow glasses for use in ultra large scale integrated circuits since they require the formation of shallow junctions. To suppress the diffusion of ions in their shallow junctions, ZnO-based B 2O 3Al 2O 3SiO 2P 2O 5 glasses with a flow temperature below 800°C were developed. Crystallizable ZnOAl 2O 3B 2O 3SiO 2 glasses with a PbO content had a negative effect on the device insulators. The features of the hysteresis of capacitance as a function of voltage were attributed to the molar polarizability due to OH in the glass samples.

A 0.6 micron triple level metal process for high performance application specific integrated circuits

This paper describes a 0.6 micron triple level interconnect scheme for ASIC application. This interconnect scheme has been used with 0.6 micron twin well CMOS technology having polycide gates. Excellent planarization of BPSG films was achieved at a low reflow temperature by using TEOS/0 3-based APCVD BPSG. Sandwich layers of TiW/Al-1%Cu/TiW were used for interconnects. A void-free Inter-Metal-Oxide (IMO) planarization with good device reliability was achieved using a combination of silicon-rich silane-based PECVD oxide, TEOS-based PECVD oxide and SOG etchback process. In order to achieve the maximum packing density, metal 3 is used as a routing layer and has the same pitch as metal 1 and metal 2 layers. It has been demonstrated that the device and the interconnect reliabilities for this metallization scheme are excellent.

Optical, thermomechanical and MOS properties of ZnO- and PbO-based glasses

Low temperature reflow glasses on MOS capacitors were studied in order to assess glass suitability for MOS device electric insulators. ZnO-based glasses with flow points below 630°C are promising candidates for MOS capacitor passivation. MOS capacitors passivated by PbO-based glasses revealed noticeable ΔV G shifts, due to the high polarizability, which is unsuitable for passivation. PbO-based glasses show flow points below 370°C, but film formation for PbO-based glasses is more difficult than for ZnO-based glasses. Glass film formation for MOS capacitors is briefly discussed.

Applications of High-Pressure Technology to Ulsi Fabrication

AbstractA discourse is presented on the diverse manners and extent to which high-pressure reactors are being utilized in the semiconductor industry and their potential employment in research and development for ULSI fabrication. Various versions of high-pressure reactors are described. The major advantages of high-pressure techniques stem mainly from the ability to use lower processing temperatures which leads to reduced impurity diffusion, less wafer warpaqe, and fewer substrate defects. The exploitation of these benefits in LOCOS and FIPOS technologies for silicon IC device isolation is demonstrated. High-pressure steam has also been used to induce low-temperature reflow of PSG and BPSG before metallization. The applications and limitations of this technology are critically reviewed. Other application areas of high-pressure technigues being investigated extensively by R&D workers are discussed. These include the formation of reliable thin dielectrics in high-pressure ambients of oxygen, steam, nitrogen and ammonia, as well as the improvement of device reliability by using high pressure forming gas (H2/N2) in post-metallization annealing of radiation damage. Enhanced capabilities required for a conventional high-pressure reactor to achieve these applications are discussed. The review is complemented with data which reveal a rapidly growing utilization of high-pressure reactors for production as well as a steady growth in the number of potential applications for high-pressure techniques.