Low Reading Voltage Research Articles

3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application

AbstractA new type of ferroelectric memory device with high reliability and complementary metal‐oxide‐semiconductor (CMOS) compatibility characteristics is an important condition for achieving integrated memory and computing chips. Here, 3D stacked ferroelectric memory devices based on ferroelectric materials of HfO2 are fabricated. The device exhibits high speed (50 ns), low read voltage (0.5 V), and great reliability with no substantial degradation after 1010 cycles and a 10‐years data retention at 85 °C. The IMP and NAND logic are achieved with stable memory window (>200 mV) across the vertical devices’ interconnection. On this basis, combining with the traditional CMOS logic device, multiple combination logic functions containing NOT, AND, and NOR are achieved by simulation. The collaboration of devices in the vertical direction providing the possibility of combining multi‐bit logic in memory functions and paves the way for the implementation of high‐density, high‐reliability, and low‐energy consumption computing‐in‐memory chips compatible with the CMOS technology.

Nonvolatile bipolar resistive switching characteristics of aluminum oxide grown by thermal oxidation processes

This study proposes a bipolar resistive random-access memory (RRAM), which is fabricated using an aluminum oxide (AlO x ) resistive switching (RS) layer. The RRAM shows a large memory window of 106 at a low read voltage of 0.5 V. In addition, high switching speed, long retention time, and superior read-disturb immunity are observed. AlO x layers are prepared by a thermal oxidation growth process. Aluminum metal films deposited on n+-Si wafers are oxidized at O2/(O2 + N2) flow rate ratios of 50%–100%. Al/AlO x /n+-Si device shows no RS behavior when the AlO x is grown in a pure O2 environment. As the O2/(O2 + N2) flow rate ratio decreases to 50%, Al/AlO x :N/n+-Si device reveals stable bipolar RS characteristics. A filamentary mode based on oxygen interstitial and Al vacancy is proposed to explain the difference in electrical characteristics of AlO x devices prepared at different O2 flow rates.

Nano-Memory Based on MoS2 Embedded in Al2O3 on Bulk Ge

MoS2 captured a lot of attention in the past decade due to its intrinsic stability at nanoscale dimensions promising low power, high density, and CMOS-compatible devices [1-6]. The claimed improvements in MoS2-based devices can be related to their capacity to change the material interface properties and it’s not limited by the absence of a band gab. Despite this, such devices are still in the early stages of development due to several issues, including growth scalability, passivation, doping, and metal junctions [7, 8]. Almost no work conducted on MoS2/Ge-based systems which can be promising for various photonics applications, especially in the infrared regime.Nanoscale resolution electrical characterizations utilizing conductive atomic force microscopy (cAFM) provide a useful method to study electronic transport and conduction in MoS2 structures. In this work, we demonstrate a nano-memory structure utilizing MoS2 flakes embedded in high-k ALD oxide on bulk Ge. The process of charge injection in the MoS2 flake was explored utilizing the fabricated structure along with a control structure with no embedded MoS2.The cleaning and fabrication are conducted in a cleanroom of 100 level. A Ge bulk wafer is diced into 1×1 cm2 pieces and then ultrasonic cleaned in DI water, acetone, and IPA for native oxide removal and cleaning. The first 3 nm Al2O3 layer is grown using plasma-enhanced atomic layer deposition (PE-ALD) at 200⁰C. Immediately followed by spin coating 20µL of MoS2 solution on the Al2O3/Ge substrates at 1000 RPM for 30 seconds. The MoS2 solution concentration is 18 mg/L with flakes between 1-8 monolayers thick and 100-400 nm lateral size. The structure is finalized by depositing another 3 nm Al2O3 layer, capping the MoS2 flakes.We performed the following 2.5×2.5 µm2 current scans using the cAFM, operating in contact mode, respectively: Read scan at 0.5 volts, write scan at 5 volts, read scan at 0.5 volts, erase scan -8 volts then read scan at 0.5 volts. Under the low read voltage (0.5V), no currents were observed in their pristine form. However, currents were spotted under higher write voltage (5V). The current readings, produced by the write scan, can also be seen under the following low read voltage scan (0.5V). The same currents are rarely visible after any erase scan (-8V) and during the subsequent read scan (0.5V). The results of cAFM demonstrate a MoS2-based structure that may be promising for future nano-memory applications.

Two-Terminal Nonvolatile Write-Once-Read-Many-Times Memory Based on All-Inorganic Halide Perovskite.

Write-once-read-many-times (WORM) memory belonging to an important non-volatile memory type achieves the read-only state after the write operation and is used in the fields of data security storage widely. WORM memory has been developed based on a variety of materials. In recent years, halide perovskites have become the research hotspot material for this memory due to its excellent properties. Here, the all-inorganic CsPbBr3 perovskite thin film was prepared on a FTO substrate by using a two-step method. The prepared CsPbBr3 thin films have the characteristics of densely packed crystal grains and smooth surface. The device, having the FTO/CsPbBr3/Al sandwich structure by evaporating the Al electrode onto the CsPbBr3 thin film, represents the typical WORM behavior, with long data retention time (104 s), a low operation voltage (2.1 V) and a low reading voltage (0.1 V). Additionally, the resistance transition mechanism of the resulting WORM devices was analyzed.

Nonvolatile and Voltage-Polarity-Independent Write-Once–Read-Many-Times Memory Feature of an Al/AlOₓ:N/n⁺-Si Device

An aluminum oxynitride (AlO_<i>x</i>:N) resistive memory with a large ON/OFF ratio of 10⁶ at a low read voltage of 0.5 V is proposed. The AlO_<i>x</i>:N resistive switching (RS) layer is fabricated using a two-stage thermal oxynitridation process of an evaporated Al film. The Al/AlO_<i>x</i>: N/n^&#x002B;-Si device shows write-once&#x2013;read-many-times (WORM) characteristics and the writing operation is voltage-polarity-independent. The resistance states can be repeatably read <inline-formula> <tex-math notation="LaTeX">$10^{4}\times $ </tex-math></inline-formula> and the data retention time is over 10⁴ s. A high read-disturb immunity is also observed for over 10⁴ s. Data retention and read-disturb characteristics measured at 85 &#x00B0;C predict a ten-year lifetime of the device. The carrier transport and the RS mechanisms are studied and illustrated.

One Nanometer HfO2‐Based Ferroelectric Tunnel Junctions on Silicon

AbstractIn ferroelectric materials, spontaneous symmetry breaking leads to a switchable electric polarization, which offers significant promise for nonvolatile memories. In particular, ferroelectric tunnel junctions (FTJs) have emerged as a new resistive switching memory which exploits polarization‐dependent tunnel current across a thin ferroelectric barrier. This work integrates FTJs with complementary metal‐oxide‐semiconductor‐compatible Zr‐doped HfO2 (Zr:HfO2) ferroelectric barriers of just 1 nm thickness, grown by atomic layer deposition on silicon. These 1 nm Zr:HfO2 tunnel junctions exhibit large polarization‐driven electroresistance (&gt;20 000%), the largest value reported for HfO2‐based FTJs. In addition, due to just a 1 nm ferroelectric barrier, these junctions provide large tunneling current (&gt;1 A cm−2) at low read voltage, orders of magnitude larger than reported thicker HfO2‐based FTJs. Therefore, this proof‐of‐principle demonstration provides an approach to simultaneously overcome three major drawbacks of prototypical FTJs: a Si‐compatible ultrathin ferroelectric, large electroresistance, and large read current for high‐speed operation.

Resistive Switching Behavior of Titanium Oxynitride Fabricated Using a Thermal Nitridation Process

A titanium oxynitride (TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</sub> ) resistive random-access memory (RRAM) with write-once-read-many-times (WORM) characteristics is proposed. The TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</sub> resistive switching (RS) layer with a thickness of 62 nm was fabricated using a thermal nitridation process of an evaporated Ti metal film. The residual Ti layer with a thickness of 8 nm is used as the bottom contact. The Al/TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</sub> /Ti/n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -Si RRAM shows a large memory window of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> at a low read voltage of 0.2 V. Stable high-resistance state (HRS) and low-resistance state (LRS) are observed in the endurance test for 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> read cycles. High read-disturb immunity can be found for over 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> s. The energy band diagram, carrier conduction and the RS mechanisms of the RRAM are investigated.

Silicon oxide-niobium oxide mixture films and nanolaminates grown by atomic layer deposition from niobium pentaethoxide and hexakis(ethylamino) disilane

Amorphous SiO2–Nb2O5 nanolaminates and mixture films were grown by atomic layer deposition. The films were grown at 300 °C from Nb(OC2H5)5, Si2(NHC2H5)6, and O3 to thicknesses ranging from 13 to 130 nm. The niobium to silicon atomic ratio was varied in the range of 0.11–7.20. After optimizing the composition, resistive switching properties could be observed in the form of characteristic current–voltage behavior. Switching parameters in the conventional regime were well defined only in a SiO2:Nb2O5 mixture at certain, optimized, composition with Nb:Si atomic ratio of 0.13, whereas low-reading voltage measurements allowed recording memory effects in a wider composition range.

Light assisted multilevel resistive switching memory devices based on all-inorganic perovskite quantum dots

All-inorganic perovskite quantum dots (APQDs) have emerged as excellent materials which have been widely used in numerous micro-nano photoelectric devices. However, resistive random access memory (RRAM) devices based on APQDs are relatively scarce. In this work, RRAM based on CsPbBr3 APQDs prepared by the solution processed method was fabricated at room temperature. The sandwich structure memory device shows high reproducibility, good data retention ability, and light assisted multilevel storage capability. The resistance ratio (ON/OFF) of the RRAM device between the high resistance state and the low resistance state reaches almost 107. Additionally, the device exhibits high performances under low power consumption—low reading voltage (−0.3 V) and operation voltage (−2.4 V/1.55 V). It is suggested that the connection and rupture of conducting filaments, which are formed by Br vacancies under an electric field, are responsible for the resistive switching effect. Our work provides an opportunity to develop the next generation high-performance and stable nonvolatile memory devices.

Stimulated Ionic Telegraph Noise in Filamentary Memristive Devices

Random telegraph noise is a widely investigated phenomenon affecting the reliability of the reading operation of the class of memristive devices whose operation relies on formation and dissolution of conductive filaments. The trap and the release of electrons into and from defects surrounding the filament produce current fluctuations at low read voltages. In this work, telegraphic resistance variations are intentionally stimulated through pulse trains in HfO2-based memristive devices. The stimulated noise results from the re-arrangement of ionic defects constituting the filament responsible for the switching. Therefore, the stimulated noise has an ionic origin in contrast to the electronic nature of conventional telegraph noise. The stimulated noise is interpreted as raising from a dynamic equilibrium establishing from the tendencies of ionic drift and diffusion acting on the edges of conductive filament. We present a model that accounts for the observed increase of noise amplitude with the average device resistance. This work provides the demonstration and the physical foundation for the intentional stimulation of ionic telegraph noise which, on one hand, affects the programming operations performed with trains of identical pulses, as for neuromorphic computing, and on the other hand, it can open opportunities for applications relying on stochastic processes in nanoscaled devices.

Electron transfer through protein-bound water and its bioelectronic application

This article reports that a metastructure of polypeptides with the bound water can have high and stable electron conductivity without classic electron-conducting components. We used gelatin as the model protein since the peptide chains contain numerous sites capable of forming hydrogen bonds with water molecules. The lack of redox sites and the trace amounts of aromatic amino acids also eliminate the possibility that the electron transfer is due to redox reactions or pi-stacking. Our Raman spectroscopy results show that the high electron-conductive metastructure is composed of bound water and unwound gelatin polypeptides. Further removal of bound water from the metastructure dramatically decreases the electron-conductivity, indicating that bound water is crucial to connect the polypeptide chains for the electron-conductivity. In addition, the ability to switch between the low-electron-conductive typical hydrogel state and the high-electron-conductive metastructure state of the gelatin hydrogel allows the gelatin hydrogel to exhibit rewritable nonvolatile resistive memory features. The high ON/OFF current ratio of 105 at a low reading voltage of 0.09 V is superior to that of conventional nonvolatile resistive memories by one order of magnitude. The discovered phenomenon of using bound water and flexible polypeptide structure for long-distance electron transfer could provide a new direction for designing highly biocompatible conducting materials or functional devices in bioelectronics.

Write once read many times resistance switching memory based on all-inorganic perovskite CsPbBr3 quantum dot

Write Once Read Many (WORM) Memory, as one of the most important nonvolatile memory type, has widespread used in a variety of permanent storage applications in the Big Data age. As an excellent material, CsPbBr3 quantum dots have widely used in a lot of photoelectric devices, but CsPbBr3 quantum dots based memory device remain to be studied. In this work a WORM memory device based on CsPbBr3 quantum dots is demonstrated. The CsPbBr3 QDs based WORM shows great reproducibility, good data retention ability, irreversible electrical transition from the high resistance state (HRS) or OFF state to the low resistance state (LRS) or ON state and the resistance ratio (ON/OFF) can reach almost 104. Additionally, the device exhibits high performances under low power consumption — low reading voltage (−0.5 V) and writing voltage (−1.1V). To study the CsPbBr3 QDs based WORM provides an opportunity to develop the next generation high-performance and stable WORM devices.

Energy consumption analysis for the read and write mode of the memristor with voltage threshold in the real-time control system

In this paper, the hardware circuit of the memristor with voltage threshold control system (abbreviated as MVTCS) adapted to the real-time control system (abbreviated as RTCS) is designed based on the weight modification process of the memristor nerve morphology circuit. A novel forced erase mode, called no read, high voltage write (abbreviated as NR-HVW), is proposed to eliminate the need for a read process and to conduct the write process into the memristor. The authors combine the low voltage read and high voltage write (abbreviated as LVR-HVW) and the high voltage read and high voltage write (abbreviated as HVR-HVW) modes, and then compare and analyze the advantages and disadvantages of the three read and write modes from the perspective of energy consumption. The numerical simulation technology is used to verify the design proposed by the author, and the simulation results demonstrate that the LVR-HVW mode has the lowest energy consumption, the HVR-HVW mode comes the second, and the NR-HVW mode is the highest. However, the NR-HVW mode can meet high-precision requirements for the RTCS without testing equipment. The research of this paper is believed to provide some technical support for the application of the memristor with voltage threshold (abbreviated as MVT) in the RTCS.

A Complementary Metal Oxide Semiconductor Process-Compatible Ferroelectric Tunnel Junction.

In recent years, experimental demonstration of ferroelectric tunnel junctions (FTJ) based on perovskite tunnel barriers has been reported. However, integrating these perovskite materials into conventional silicon memory technology remains challenging due to their lack of compatibility with the complementary metal oxide semiconductor process (CMOS). This communication reports the fabrication of an FTJ based on a CMOS-compatible tunnel barrier Hf0.5Zr0.5O2 (6 unit cells thick) on an equally CMOS-compatible TiN electrode. Analysis of the FTJ by grazing angle incidence X-ray diffraction confirmed the formation of the noncentrosymmetric orthorhombic phase (Pbc21, ferroelectric phase). The FTJ characterization is followed by the reconstruction of the electrostatic potential profile in the as-grown TiN/Hf0.5Zr0.5O2/Pt heterostructure. A direct tunneling current model across a trapezoidal barrier was used to correlate the electronic and electrical properties of our FTJ devices. The good agreement between the experimental and theoretical model attests to the tunneling electroresistance effect (TER) in our FTJ device. A TER ratio of ∼15 was calculated for the present FTJ device at low read voltage (+0.2 V). This study suggests that Hf0.5Zr0.5O2 is a promising candidate for integration into conventional Si memory technology.

Subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory for nonvolatile operation

A subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory (SAT RAM) has been proposed and fabricated for low-power nonvolatile memory applications. The proposed SAT RAM cell demonstrates adjustable subthreshold swing (SS) depending on stored information: small SS in the erase state (“1” state) and large SS in the program state (“0” state). Thus, SAT RAM cells can achieve low read voltage (Vread) with a large memory window in addition to the effective suppression of ambipolar behavior. These unique features of the SAT RAM are originated from the locally stored charge, which modulates the tunneling barrier width (Wtun) of the source-to-channel tunneling junction.

Ultra-flexible nonvolatile memory based on donor-acceptor diketopyrrolopyrrole polymer blends.

Flexible memory cell array based on high mobility donor-acceptor diketopyrrolopyrrole polymer has been demonstrated. The memory cell exhibits low read voltage, high cell-to-cell uniformity and good mechanical flexibility, and has reliable retention and endurance memory performance. The electrical properties of the memory devices are systematically investigated and modeled. Our results suggest that the polymer blends provide an important step towards high-density flexible nonvolatile memory devices.

Causes and consequences of the stochastic aspect of filamentary RRAM

Filamentary resistive RAM devices are affected by various sources of instability and variability. Stochastic fluctuations, caused by variability of the RRAM-driving transistor and process-induced device-to-device variations, affect both forming and set/reset transients. Also the intrinsic stochastic mechanisms that control the filament growth and shrinkage complicate the set and reset operation. In particular, RRAM operated at low current shows very broad distributions of both the low and high resistive state. Furthermore, at low read voltage a large amplitude Random Telegraph Noise is measured, caused by both electrostatic modulation of the constricted current flow and by random perturbation of the vacancies in the filament. Additional variability arises from the stochastic probability of finding an intact or a ruptured filament in high resistive state at low current compliance.

Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility.

Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200°C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm2V−1s−1, large memory window (∼16 V), low read voltages (∼−1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices.

Rapid synthesis of gallium oxide resistive random access memory by atomic force microscopy local anodic oxidation

The fabrication of gallium oxide nanodots for the application of resistive random access memory (RRAM) using a process of atomic force microscopy (AFM) local anodic oxidation on an indium tin oxide conductive glass substrate is reported. In the atmospheric environment, an AFM probe tip contacts the gallium film locally. This gallium oxide nanodot acts as the insulator layer in a single unit of the RRAM. The structure describes the insulator layer (GaOx) sandwiched by the top (AFM tip) and bottom (Ga film) electrodes. Using current and voltage biased methods, the device switches from a high-resistance state (HRS) to a low-resistance state (LRS) and reset from LRS to HRS. Low read-voltage is used to distinguish the high/low resistance to present the digital data. Presented results show the ability of atomic force microscopy anodic oxidation to produce 300 nm diameter gallium oxide nanodots on glass substrates for potentially high density RRAMs.

An Empirical Model for RRAM Resistance in Low- and High-Resistance States

We present a simple empirical expression describing hafnium-based RRAM resistance at different reset voltages and current compliances. The model that we propose describes filament resistance measured at low ( ~ 0.1 V) reading voltage in both low-resistance state (LRS) and high-resistance state (HRS). The proposed description confirms that conduction in LRS is ohmic (after forming with a sufficiently high current compliance) and is consistent with the earlier description of HRS resistance as controlled by a trap-assisted electron transfer via traps in the oxidized portion of the filament. The length of the nonohmic part of the filament is found to be directly proportional to reset voltage. Moreover, low-frequency noise measurements at different reset voltages evidence a tradeoff between HRS resistance and noise in reading conditions.