Low Leakage Current Research Articles

High Reliability Tungsten-Doped Indium Zinc Oxide Thin Film Transistors for Display Applications

Recently, flat panel display technologies are based on amorphous silicon (a-Si), polycrystalline silicon (poly-Si) or amorphous oxide semiconductor (AOS) thin film transistors (TFTs) technology. In order to reach higher performance for ultra-high resolution display applications, the material selection for the channel layer is vital. AOS TFTs drawn lots of attention because of its advantages such as low leakage current, high driving current and high uniformity [1,3]. In this work, we presented a novel amorphous oxide semiconductor (AOS) material of gallium-free a-InWZnO thin film transistors (IWZO TFTs) which is very promising to be applied for ultra-high resolution display technology. Experiment In this work, we demonstrated the structure of a-IWZO TFTs processes. Figure 1 shows the schematic of the TFT cross-section. After growing a 550 nm thermal oxide layer as buffer layer, a 25-nm-thick of molybdenum was deposited by DC-sputter as the bottom gate electrode. A 10-nm-HfO2 was deposited by plasma-enhanced atomic layer deposition (PEALD) system as high-κ gate dielectric (GI). Then, post deposition annealing (PDA) was carried out to enhance the quality of the insulator layer. Next, an ultra-thin body a-IWZO was deposited by RF-sputter as channel layer. Finally, source and drain were defined by lift-off process and the gate contact via was etched by dry etching to finish the device fabrication. Result and Discussion Figure 1(b) shows the negative gate bias stress (NGBS) transfer curve (ID-VG) of a-IWZO TFTs with passivation layer. The experimental results have shown that passivation layer could keep the back channel of IWZO channel from exposing to oxygen and hydrogen from the atmosphere. Without the passivation layer, the back channel would contact moisture leading the diffused hydrogen atoms to fill oxygen vacancy sites and de-trap free carriers, causing the VTH shifts negatively. The ultra-thin a-IWZO TFTs with passivation layer exhibited a low subthreshold swing (S.S.) of 89.7 mV/dec, high on/off current ratio (ION/IOFF) of 2.1×107 and small threshold voltage shift (ΔVth) of -0.097 V during NGBS of -2MV/cm with 2000s. To sum up, the passivation layer could enhance the a-IWZO TFTs reliability. Reference [1] Kamiya, H. Hosono, NPG Asia Mater., vol. 2, pp. 15, 2010.[2] Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, nature, vol. 432, no. 7016, pp. 488-492, 2004.[3] Y. Kuo, C. M. Chang, I. H. Liu, and P. T. Liu, Scientific reports, vol. 9, no. 1, pp. 1-7, 2019. Figure 1

(Invited) Better GaN Substrates Are the Key to Advancing GaN Device Technology

Gallium nitride (GaN) is a semiconductor that has an unusual combination of extreme values of fundamental physical and chemical properties. Its wide bandgap (3.4 eV at room temperature) results in a low intrinsic carrier density and thus low leakage and dark currents. These properties combined with its direct gap are crucial requirements for photo-detectors and high-temperature electronic applications. Despite the relatively large carrier effective masses, which lead to lower carrier mobilities, the high electron saturation velocity and high breakdown field make possible the fabrication of high frequency electronic devices. In addition, its relatively high thermal conductivity opens the possibility to realize a number of high-power device applications. These unique characteristics have made possible the fabrication of a variety of optoelectronic and electronic devices capable of performing at extreme operation conditions of current, voltage, temperature, and in harsh environments. GaN and its alloys and heterostructures with InN and AlN have resulted in devices with superior performance for a variety of applications. Despite this unprecedented and not fully developed semiconductor materials success, the realization of high-performance and high-yield devices will require native GaN substrates with well-controlled physical properties.Presently, Hydride Vapor Phase Epitaxy (HVPE) and Ammonothermal (Ammono-GaN) bulk growth are the only two methods that have successfully demonstrated the manufacture of GaN boules. The first, a fast-growth non-equilibrium process, only reproduces the starting substrate dimensions, while the latter, a slow-growth equilibrium process, allows increasing boule dimensions under controlled growth conditions. Despite the impressive accomplishments recently achieved by these growth methods, much work still needs to be done to establish a fully satisfactory bulk growth method for this material. Heteroepitaxial HVPE-GaN suffers from high dislocation densities, while Ammono-GaN suffers from high oxygen incorporation. Recent results suggest that Ammono-GaN wafers can be successfully used as seeds to grow thick freestanding GaN wafers by HVPE [1]. This approach resulted on HVPE-GaN wafers with orders of magnitude reduced extended defect and lower oxygen impurity concentrations. However, the relatively high background concentration of pervasive impurities is still preventing the realization of high performance devices. In this work, we illustrate how defect-sensitive optical techniques can be used to assist the optimization procedures at various stages of growth [2]. A brief review of defect-sensitive optical spectroscopic techniques employed to evaluate structural, optical, and electronic properties of the state-of-the-art bulk and thick-film (quasi-bulk) Nitride substrates and homoepitaxial films is presented. Defects control the performance of devices and feeding back knowledge of defects to growth efforts is key to advancing technology.References J. A. Freitas, Jr., J.C. Culbertson, N.A. Mahadik, T. Sochacki, M. Iwinska, and M.S. Bockowski, J. Crystal Growth 456 (2016) 113.J. A. Freitas, Jr., J.C. Culbertson, and E. R. Glaser, Crystals, 12 (2022) 1294.

High-Transconductance and Low-Leakage Current Single Aluminum Nitride Nanowire Field Effect Transistor

This study presents electrical transport properties of a catalyst-free grown single aluminum nitride nanowire field effect transistor (AlNNW-FET) exhibiting a very high transconductance of 26.9 pS, high on/off current ratio of 795.9, high conductivity of 9.8 x 10-4 Ω-1.cm-1, and a very low leakage current of 10 pA. The conductivity of AlN nanowire is two orders of magnitude higher than the reported studies. The AlNNW-FET reveals a dominant p-type conductivity. The p-type conductivity can be attributed to aluminum vacancies and complexes composed of Al vacancies and oxygen impurities. In consequence, the fabricated AlNNW-FET with high-performance, cost-effectiveness, and high-power efficiency is very well suited for use in low power and high temperature nanoelectronic and piezoelectric sensor applications, as well as integrated electro-optical devices including optomechanical devices and pyroelectric photodetectors.

Gate leakage suppression of normally-OFF diamond FET by employing MOS-MES hybrid gate structure

Normally-off filed-effect transistors (FETs) are critical for logical circuit and switch systems. However, the presence of two-dimensional holes in hydrogen-terminated diamond (CH diamond) makes most of regular CH diamond MOSFETs normally-ON operation, leading to energy loss. Metal-semiconductor (MES) FETs with Schottky gate are a good way to achieve normally-off CH diamond FETs, but have the disadvantage of high gate leakage current. In this work, a MOS-MES hybrid gate diamond FET with normally-off operation and low gate leakage current was fabricated by adding nanoparticles Al2O3 (nano-Al2O3) between Al/C-H diamond interface. The MES formed by Al/C-H diamond plays the role of realizing normally-off operation, and the MOS of Al/nano-Al2O3/C-H diamond is used to lower the gate leakage current. 100 % of hybrid gate devices displayed normally-off operation with threshold voltages ranging from −0.2 V to −1.2 V, as well as the gate leakage current is 103-106-fold lower than that of FET without nano-Al2O3. The hybrid gate structure is poised to become a part of the FET community.

High-Performance Wearable Organic Photodetectors by Molecular Design and Green Solvent Processing for Pulse Oximetry and Photoplethysmography.

White-light detection from the visible to the near-infrared region is central to many applications such as high-speed cameras, autonomous vehicles, and wearable electronics. While organic photodetectors (OPDs) are being developed for such applications, several challenges must be overcome to produce scalable high-detectivity OPDs. This includes issues associated with low responsivity, narrow absorption range, and environmentally friendly device fabrication. Here, an OPD system processed from 2-methyltetrahydrofuran (2-MeTHF) sets a record in light detectivity, which is also comparable with commercially available silicon-based photodiodes is reported. The newly designed OPD is employed in wearable devices to monitor heart rate and blood oxygen saturation using a flexible OPD-based finger pulse oximeter. In achieving this, a framework for a detailed understanding of the structure-processing-property relationship in these OPDs is also developed. The bulk heterojunction (BHJ) thin films processed from 2-MeTHF are characterized at different length scales with advanced techniques. The BHJ morphology exhibits optimal intermixing and phase separation of donor and acceptor moieties, which facilitates the charge generation and collection process. Benefitting from high charge carrier mobilities and a low shunt leakage current, the newly developed OPD exhibits a specific detectivity of above 1012 Jones over 400-900nm, which is higher than those of reference devices processed from chlorobenzene andortho-xylene.

Formation of Cluster-Structured Metallic Filaments in Organic Memristors for Wearable Neuromorphic Systems with Bio-Mimetic Synaptic Weight Distributions.

With increasing demand for wearable electronics capable of computing huge data, flexible neuromorphic systems mimicking brain functions have been receiving much attention. Despite considerable efforts in developing practical neural networks utilizing several types of flexible artificial synapses, it is still challenging to develop wearable systems for complex computations due to the difficulties in emulating continuous memory states in a synaptic component. In this study, polymer conductivity is analyzed as a crucial factor in determining the growth dynamics of metallic filaments in organic memristors. Moreover, flexible memristors with bio-mimetic synaptic functions such as linearly tunable weights are demonstrated by engineering the polymer conductivity. In the organic memristor, the cluster-structured filaments are grown within the polymer medium in response to electric stimuli, resulting in gradual resistive switching and stable synaptic plasticity. Additionally, the device exhibits the continuous and numerous non-volatile memory states due to its low leakage current. Furthermore, complex hardware neural networks including ternary logic operators and a noisy image recognitions system are successfully implemented utilizing the developed memristor arrays. This promising concept of creating flexible neural networks with bio-mimetic weight distributions will contribute to the development of a new computing architecture for energy-efficient wearable smart electronics.

A novel voltage lifting technique of switched-inductor cell based modified LUO converter topology for water pumping system

The persistent exhaustion of traditional energy sources with their impacts on the environment has been initiating a significant interest in a selection of renewable-energy sources (RES) based water-pumping system. Among several renewable sources, solar-PV is the most promising and practical source for water-pumping applications that can be easily installed on a building's roof. The available solar-PV energy is integrated to AC electric motor through front-end DC-DC boost converter topology. Among the various DC-DC converter topologies, a novel switched-inductor type modified LUO converter has been proposed for solar-PV powered water pumping system. The proposed switched-inductor type modified LUO (SI-MLUO) converter have simple structure which delivers high voltage gain with low leakage currents, low current ripples, reduced voltage spikes, low dv/dt stress and high efficiency over the several conventional DC-DC converters. The operating modes and performance of proposed SI-MLUO converter topology is verified by using MATLAB/Simulink tool, simulation results are validated with conventional topologies.

Tuning the thermal and insulation properties of bismuth borate glass for SiC power electronics packaging

AbstractSilicon carbide (SiC) power devices are attracting significant attention due to their outstanding stability in high‐voltage, high‐temperature, and high‐frequency environments. To replace toxic Pb‐based glass, there is an urgent need to develop Pb‐free glass for SiC power device encapsulation, considering its superior electrical insulation properties and processing capabilities. Here, we developed a Bi‐based glass for effective encapsulation practical of SiC power devices. By increasing the content of glass modifier BaO, the structure of bismuth borate glass can be tuned to reduce glass network density, leading to the transition of structural units from [BO4] to [BO3]. The softened temperature is reduced to 363.4°C with the BaO content increasing to 15 mol%. After encapsulating the SiC power devices using Bi‐based glass, the glass demonstrated a reverse breakdown voltage of 650 V and an extremely low leakage current. Therefore, our work provided a route for adapting Pb‐free‐based low‐melting glass for encapsulating SiC devices and offered potential for advanced semiconductor packaging.

Non‐Volatile Reconfigurable p–n Junction Utilizing In‐Plane Ferroelectricity in 2D WSe2/α‐In2Se3 Asymmetric Heterostructures

AbstractIt is impossible to imagine modern electronic circuitry without a p–n junction—an essential building block for transistors, rectifiers, amplifiers, photovoltaics, etc. Conventional fabrication processes (ion implantation or chemical diffusion) result in an immutable potential configuration depriving reconfigurability. In contrast, the superior electrostatic tunability, dangling bonds‐ and reconstruction‐free interfaces are some of the key features of 2D based heterostructures, making them promising candidates for cutting‐edge optoelectronic and memory applications. Herein, the intercoupled 2D ferroelectricity of 𝛼‐In2Se3 is utilized to introduce micron‐scale, non‐volatile electrostatic doping in ambipolar WSe2, enabling reconfigurable p–n junction. The actuation mechanism is based on the strong polarization field along the edge topology of In2Se3. The fabricated device presents stable p–n to n–p switching, a superior rectification ratio of ≈106, and a low leakage current of ≈10−12 A. Furthermore, the switchable short‐circuit current response is utilized to demonstrate a novel self‐powered, non‐volatile memory based on photovoltaic reading. The ferroelectric non‐volatility coupled with the ability to control the device operation using optical and electrical signals paves the way for ultrathin energy‐efficient, multi‐level optoelectronic and in‐memory logic devices.

Design of SRAM Cell using Modified Lector and Dual Threshold Method Based on FINFET

FinFET (Fin Field Effect Transistor) is a new technology that satisfies the demand for a superior storage system by improving transistor circuit design (SS). CMOS devices experience a wide range of issues due to the gate's diminishing ability to control the channel. Increased total production costs are a few of these disadvantages. But this store needs to dissipate less power, have a quick access time, and a low leakage current. The increased power dissipation and leakage current of traditional CMOS-based SRAM (Static RAM) architectures cause a sharp decline in performance. The nanoscale gadget called FinFET is being introduced for use in SRAM fabrication due to its 3D gate architecture. The adoption of FinFET has helped boost overall performance in terms of efficiency, power, and footprint. And because it is immune to SCEs, FinFET has become the transistor of choice. In this study, we have examined a number of FinFET-based SRAM cells and compared them with CMOS technology. We have also suggested a novel 14T SRAM design that uses the Dual Threshold Method and Modified Lector Approach with FinFET, and it is implemented for the 1bit, 4bit, and 8bit.

Performance Investigation of FinFET Structures: Unleashing Multi-Gate Control through Design and Simulation at the 7 nm Technology Node for Next-Generation Electronic Devices

In this manuscript, we outline a original study that represents the first investigation of its kind, focusing on DC and analog/RF performance of structural flavors of FinFET. A total of six structural variations (D1 to D6 devices) in FinFET as per the IRDS 7 nm technology node specifications is explored here. Through extensive simulations, our findings demonstrate that the incorporation of gate stack, spacer, and source/drain extension concepts in FinFETs leads to superior performance. The DC performance analysis produced near-ideal SS (∼65 mV dec−1) performance, lower leakage currents, improved switching performance, and reduced DIBL values for D3 to D6 devices owing to the incorporation of gate stack, spacer integration, and source/drain extension doping. In terms of analog/RF performance, the best suitable device is found to be D4 device having designed with 1017 cm−3 n-type lightly doped source/drain regions, spacer, and gate stack integrations. A significant improvement such as higher gm, reduced gd, enhanced AV, improved fT, GFP, GTFP, and TFP are obtained for D4 device marking a breakthrough in the FinFET designing. Overall, the findings contribute to the advancement of FinFET at 7 nm technology node, opening up new opportunities for applications in various electronic systems demanding improved device performance.

Effect of growth temperature of NH3-MBE grown GaN-on-Si layers on donor concentration and leakage currents

The effect of growth temperature on the buffer leakage currents of GaN-on-Si layers grown by the NH3-MBE technique within the technologically acceptable temperature range (750 °C-850 °C) has been investigated. It is shown that the lowest leakage currents are exhibited by GaN layers grown at elevated growth temperature (growth temperature 825 °C, buffer leakage current 1 mA/mm at electric field strength 41 kV/cm). The photoluminescence technique was used to study the defects in GaN layers grown at different growth temperatures and to estimate the number of neutral donors in GaN-on-Si layers. A correlation between leakage currents, structural perfection and donor concentration in GaN-on-Si layers was established. It was found that the reduced growth temperature can lead to the formation of inversion domains in GaN-on-Si layers grown by the NH3-MBE technique.

The beneficial effect of BaTiO3 on the structure, microstructure, and electrical properties of SnO2-based ceramics

The effect of adding BaTiO3 to the SnO2-Co3O4-Cr2O3-Nb2O5 ceramic system on the material’s structure, microstructure, and non-Ohmic properties was investigated. Results show that the lowest addition level (0.05% mol) of BaTiO3 significantly improves the non-linearity coefficient, reaching a maximum value (α = 26.74) while surpassing the reference specimen's value by a multiple of 9. Moreover, a three-fold benefit of barium titanate additions is found: 1. 1. A remarkable decrease in leakage current (from 2.07 to 0.19 mA/cm2 for 0.05 mol % addition), 2.- A steady increase in breakdown voltage and, 3.- An increased conductivity concurrently with permittivity values. It also positively impacts microstructure by modifying phase morphology, decreasing grain size, improving homogeneity, and producing smaller and elongated grains. Although density decreases with BaTiO3 incorporation, yielding porosity, the 0.05% mol BaTiO3 specimen exhibited the highest non-linearity coefficient and potential barrier in tandem with the lowest leakage current.

Large-Scale β-Ga2O3 Trench MOS-Type Schottky Barrier Diodes with 1.02 Ideality Factor and 0.72 V Turn-On Voltage

β-Ga2O3 Schottky barrier diodes (SBDs) suffer from the electric field crowding and barrier height lowering effect, resulting in a low breakdown voltage (BV) and high reverse leakage current. Here, we developed β-Ga2O3 trench MOS-type Schottky barrier diodes (TMSBDs) on β-Ga2O3 single-crystal substrates with halide vapor phase epitaxial layers based on ultraviolet lithography and dry etching. The 1/C2−V plots are deflected at 2.24 V, which is caused by the complete depletion in the mesa region of the TMSBDs. A close-to-unity ideality factor of 1.02 and a low turn-on voltage of 0.72 V are obtained. This is due to the low interface trap density in the metal/semiconductor interface of TMSBDs, as confirmed by the current–voltage (I–V) hysteresis measurements. The specific on-resistance calculated with the actual Schottky contact area increases as the area ratio (AR) increases because of the current spreading phenomenon. Furthermore, the reverse leakage current of the TMSBDs is smaller and the BV is increased by 120 V compared with the regular SBD. This work paves the way for further improving the overall performance of β-Ga2O3 TMSBDs.

Flexible High-Entropy Poly(vinyl alcohol) Dielectric Films Were Prepared at a Low Temperature and Applied to an Indium Gallium Zinc Oxide Thin-Film Transistor.

In recent years, more and more attention has been paid to flexible thin-film transistors (TFTs). Therefore, we combined HfMgTiYZrOx high-entropy metal oxide and poly(vinyl alcohol) (PVA) organic material to prepare a flexible dielectric layer. We fabricated metal-insulator-metal (MIM) and TFT devices and carried out flexible tests. The test results show that the mixed dielectric layer attains a leakage current of 3.6 × 10-11 A under the bending radius of 5 mm. In the application of the TFT, the device still has good performance after 10 000 bends with a mobility of 3.1 cm2 V-1 s-1, an Ion/Ioff of 1.4 × 107, a threshold voltage of 3.3 V, and a threshold swing of 0.20 V/decade. In addition, the average transmittance of the hybrid dielectric layer in the visible range is 90.8%. Therefore, high-entropy PVA hybrid films have high transparency, low leakage current, and good bending resistance and have broad application prospects in transparent and flexible devices.

Pure ultraviolet light-emitting diode based on the p-NiO/i-NiO/n-GaN structure by magnetron sputtering

Owing to its exceptional optical and electrical properties, NiO had gained considerable attention in the past few years. A broad spectrum of its applications was expected, particularly in light-emitting diodes (LEDs). NiO thin films were concocted using radio frequency (RF) magnetron sputtering, then this study systematically investigated the correlation between substrate temperature and the film properties. Exceptional NiO thin films with excellent characteristics were successfully obtained. Moreover, leveraging the optimized substrate temperature, we fabricated a p-NiO/i-NiO/n-GaN LED. With this configuration, p-NiO served as the hole transport layer, while i-NiO, obtained through rapid annealing, functioned as the electron barrier layer (EBL), thus avoiding the lattice mismatch between the hole transport layer and the EBL. It demonstrated pronounced diode rectification characteristics, manifesting an impressively low leakage current of 3.76 × 10−12 A. Furthermore, it achieved ultraviolet electroluminescence with a wavelength (∼375 nm) and a narrow FWHM (∼5 nm). Analysis revealed that the ultraviolet light emission in the diode predominantly originated from GaN-based near-band edge (NBE) luminescence.

Supramolecular Transistors with Quantum Interference Effect.

The charge transport through supramolecular junctions exhibits unique quantum interference (QI) effects, which provide an opportunity for the design of supramolecular transistors. Benefiting from the configuration dependence of QI, configuration control of the supramolecular assemblies to demonstrate the QI features is a key but challenging step. In this work, we fabricated the supramolecular transistors and investigated the charge transport through the conducting channel of the individual π-stacked thiophene/phenylene co-oligomers (TPCOs) using the electrochemically gated scanning tunneling microscope break junction technique. We controlled the configuration of the supramolecular channel and switched the QI features between the anti-resonance and resonance states of the supramolecular channels. We observed the supramolecular transistor with its on/off ratio above 103 (∼1300), a high gating efficiency of ∼165 mV/dec, a low off-state leakage current of ∼30 pA, and the channel length scaled down to <2.0 nm. Density functional theory calculations suggested that the QI features in π-stacked TPCOs vary depending on the supramolecular architecture and can be manipulated efficiently by fine-tuning the supramolecular configurations. This work reveals the potential of the supramolecular channels for molecular electronics and provides a fundamental understanding of intermolecular charge transport.

High Area Efficiency Bidirectional Silicon-Controlled Rectifier for Low-Voltage Electrostatic Discharge Protection

Continuously scaling down and decreasing operation voltages of ICs, from the 5 V TTL-compatible voltage to 3.3 V, then 1.2 V, and now 0.8 V for low-power ICs, results in more stringent electrostatic discharge protection design requirements, such as a narrow ESD design window, low operation voltage, and high ESD robustness. Based on traditional diode string and diode-triggered silicon-controlled rectifiers, an enhanced diode-triggered silicon-controlled rectifier is proposed to meet the requirements of low-voltage integrated circuits as bidirectional electrostatic discharge protection. The new device employs an additional PMOS and NMOS in the N-well and P-well, respectively, to offer additional current paths along the surface to significantly enhance its robustness. TCAD simulation shows that the device is triggered by both the diode strings and embedded MOS, making the device turn on faster and the current distribution more uniform during the ON state owing to the additional surface current paths. The proposed new device has excellent dual-directional ESD protection performance with a figure of merit of 4.01 mA/um2, which is about a 71% improvement compared with the conventional diode-triggered silicon-controlled rectifier. It also has higher area efficiency, lower trigger voltage, lower current leakage, and a faster turn-on speed. The proposed enhanced diode-triggered silicon-controlled rectifier is an attractive ESD protection solution for ultra-low-voltage ICs.

Low leakage current, enhanced energy storage, and fatigue endurance in room-temperature deposited (Pb0.93La0.07)(Zr0.82Ti0.18)O3 thick films

Low leakage current, enhanced energy storage, and fatigue endurance in room-temperature deposited (Pb0.93La0.07)(Zr0.82Ti0.18)O3 thick films

TeO2: A Prospective High‐k Dielectric

Herein, high‐k dielectric behavior of TeO2 thin films is investigated. The films are prepared using pulsed laser deposition on indium tin oxide (ITO)–glass substrates. Increasing the growth temperature has improved the surface roughness, transparency, and bandgap of the films. Films grown at 500 °C display nanocrystalline nature which is reflected in the increase of bandgap to 4.7 eV and is higher than the bulk value of α‐TeO2 (3.7 eV). The nanocrystalline TeO2 films in the metal–insulator–metal configuration show a stable high permittivity of ≈19 with low leakage current (J &lt; 1 × 10−7 A cm−2) and good voltage stability (α = 509 ppm V−2). Field‐effect modulation is observed in the metal–oxide–semiconductor stack configuration with tellurium as a semiconductor. The study suggests nanocrystalline TeO2 as a low‐temperature processable high‐k material with high transparency for transistor applications.