Low Latency Data Transmission Research Articles

SDN Low Latency for Medical Big Data Using Wavelets

New era is the age of 5G. The network has moved from the simple internet connection towards advanced LTE connections and transmission. The information and communication technology has reshaped telecommunication. For this, among many types of big data, Medical Big Data is one of the most sensitive forms of data. Wavelet is a technical tool to reduce the size of this data to make it available for the user for more time. It is also responsible for low latency and high speed data transmission over the network. The key concern is the Medical Big Data should be accurate and reliable enough so that the recommended treatment should be the concerned one. This paper proposed the scheme to support the concept of data availability without losing crucial information, via Wavelet the Medical Data compression and through SDN supportive architecture by making data availability over the wireless network. Such scheme is in favor of the efficient use of technology for the benefit of human beings in the support of medical treatments.

Studying the limits of production rate and yield for the volume manufacturing of hollow core photonic band gap fibers.

Hollow core photonic band gap fibers have great potential in low latency data transmission and power delivery applications, but they are currently only fabricated in research scale fabrication facilities, with km-scale lengths. To drive cost reduction and volume manufacturing it is essential to be able to upscale the preform size, but before embarking on costly experimental attempts it is useful to apply fluid dynamics models to study how the fiber drawing dynamics would be affected by such a change. In this work we use a fluid dynamics model to virtually draw increasingly longer lengths of the same fiber from preforms of identical length but different diameters. Taking advantage of our fast numerical model we explore the physical dynamics of the draw process. We discover that the draw tension is the key thermodynamic parameter and that an upper length limit exists beyond which undesirable distortions in the microstructure become difficult to control. These mechanisms are identified and possible mitigation methods described which could allow the fabrication of over 200 km fiber from a single preform.

Silicon photonic network-on-chip and enabling components

As the transistor’s feature scales down and the integration density of the monolithic circuit increases continuously, the traditional metal interconnects face significant performance limitation to meet the stringent demands of high-speed, low-power and low-latency data transmission for on- and off-chip communications. Optical technology is poised to resolve these problems. Due to the complementary metal-oxide-semiconductor (CMOS) compatible process, silicon photonics is the leading candidate technology. Silicon photonic devices and networks have been improved dramatically in recent years, with a notable increase in bandwidth from the megahertz to the multi-gigahertz regime in just over half a decade. This paper reviews the recent developments in silicon photonics for optical interconnects and summarizes the work of our laboratory in this research field.

A delay-sensitive gts allocation scheme in ieee 802.15.4 for wireless audio applications

The IEEE 802.15.4 standard is designed for low rate wireless personal area networks, targeting at low cost and low power communications. It also provides a guaranteed time slot (GTS) mechanism to support time sensitive wireless audio applications. The coordinator allocates specific durations within a superframe to guarantee reliability and performance of data deliveries. However the existing first-come-first-served (FCFS) GTS allocation policy can result in the scheduling inflexibility in low-latency data transmission, since it doesn't take into account the traffic specification, delay requirements and the energy resources. In this paper, an adaptive GTS allocation scheme is developed to satisfy the delay constraints of wireless audio applications. Based on recent GTS usage feedback, each device in the WPAN is dynamically allocated a priority number. Then the devices are allocated specific slots according to this priority information. The devices with higher priorities indicate more recent traffic and have higher probabilities to transmit their data in the subsequent superframe. The performance of the scheme is analyzed using Markov chain. The analytical model is validated through simulation results, indicating that the proposed adaptive scheme has better performance for audio transmissions.

A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications

A high-speed physical-layer architecture for next-generation higher-speed Ethernet for VSR and backplane applications was developed. VSR and backplane networks provide 100-Gb/s data transmission in mega data centers and blade servers, which have new and broad potential markets of LAN technologies. It supports 100-Gb/s-throughput, high-reliability, and low-latency data transmission, making it well suited to VSR and backplane applications for intra-building and intra-cabinet networks. Its links comprise ten 10-Gb/s high-speed serial lanes. Payload data are transmitted by ribbon fiber cables for very short reach and by copper channels for the backplane board. Ten lanes convey 320-bit data synchronously (32 bits x 10 lanes) and parity data of forward-error correction code (newly developed (544, 512) code FEC), providing highly reliable (BER<1E-22) data transmission with a burst-error correction with low latency (31.0 ns on the transmitter (Tx) side and 111.6 ns on the receiver (Rx) side). A 64B/66B code-sequence-based skew compensation mechanism, which provides low-latency compensation for the lane-to-lane skew (less than 51ns), is used for parallel transmission. Testing this physical-layer architecture in an ASIC showed that it can provide 100-Gb/s data transmission with a 772-kgate circuit, which is small enough for implementation in a single LSI.