Low-frequency Noise Characteristics Research Articles

Low-Frequency Noise Characteristics in Multi-Layer WSe₂ Field Effect Transistors with Different Contact Metals.

In this work, we analyze characteristics of Ohmic, Schottky forward and reverse contact through a low-frequency noise (LFN) measurement, combining two types of metals (Pd and Au) as the source and drain (S/D) contacts that enable p-type properties in multi-layer WSe₂ field effect transistors (FETs). The LFN is one of the significant factors liming the performance of nano-scale devices such as TMDCs FETs having large surface-to-volume ratio. In addition, the LFN analysis, which relates to the device reliability, can help identify sensitive areas for current transport and evaluate the analog circuit applicability. Theoretically, the multi-layer WSe₂ has reasonable electron affinity and bandgap that can make p-channel FET using the metal with a relatively high work-function. However, it is experimentally confirmed that Schottky contact characteristics are exhibited in the multi-layer WSe₂ FETs with various metals except Pd due to the metal Fermi level pinning phenomenon. Mobility (μeff, ~87.5 cm²/V·s), one of the electrical performance extracted from fabricated devices with Pd as S/D electrodes shows a great difference from that (~0.572 cm²/V·s) of devices with Au as S/D electrodes. The measured electrical characteristics show that a Schottky contact is formed at an interface between Au and WSe₂ causing the higher LFN of the FETs than that of device with Pd as S/D electrodes. This characteristic is also verified by confirming the reduction of LFN due to the decreased effect of the Schottky property as the drain bias is increased.

Time-dependent characteristics and physical mechanisms of AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors under different bias conditions

We experimentally investigate the time-dependent degradation of AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors subjected to different bias conditions. By means of the combined performance under OFF/SEMI-ON/ON state bias conditions, the dependence of threshold voltage (Vth), maximum transconductance (gm) and saturation drain current (Idsat) on stress mode are revealed. In the OFF-state, with the high temperature reverse bias stress, the main mechanism is the charge-trapping in the gate dielectric layer, leading to the recoverable negative shift of the Vth. In the SEMI-ON-state, because of the hot-carrier injection, the hot electrons could break the Si–H bonds, resulting in the generation of interface states and can also be captured by the trap states in the AlGaN barrier or GaN buffer. This effect will cause the decrease of saturation drain current and an unrecoverable Vth negative shift. In the ON-state, due to the attenuation of hot electrons effect, Vth hardly changes, while Idsat has a dramatic decrease caused by the self-heating effect. Low frequency noise characteristics were used to extract the defect state density, which then increases by about three orders of magnitude after SEMI-ON-state stress.

Investigation on trap density depending on Si ratio in amorphous SiZnSnO thin-film transistors

High-performance amorphous SiZnSnO thin-film transistors (a-SZTO TFTs) were fabricated using radio-frequency (RF) magnetron sputtering. The noise spectral density of a-SZTO TFTs measured by using the drain current has been reported, and it was found that is possible to apply the conventional 1/fa theory to the low-frequency noise (LFN) of the a-SZTO TFTs. The LFN characteristics of a-SZTO TFTs can be clearly identified by the correlated number fluctuation-mobility fluctuation model. Based on the noise properties, the interfacial trap density (NT) was decreased from 2.32 × 1019 to 1.33 × 1019 cm−3 eV−1 as increasing Si ratio in a-SZTO TFTs. The electrical characteristics and LFN properties of a-SZTO TFTs varied strongly depending on the Si ratio, mainly because the Si atom can act as an oxygen vacancy suppressor.

Research on Noise Control Technology of 10kV Dry Parallel Reactor

Reactor noise is one of the main noise sources in substations. It has obvious low-frequency noise characteristics and long transmission distance, which has a great impact on the sensitive targets of the acoustical environment at the substation boundary and outside the substation. In order to solve the problem of the boundary noise exceed the emission limits caused by 10 kV dry shunt reactor in a 220kV substation, noise reduction measures using noise barrier are proposed, and the effect of noise reduction is simulated and analyzed based on SoundPLAN software. The test results show that the noise reduction measures adopted can ensure that the noise at substation boundary meets the emission limit requirements.

Negative gate bias stress effects on conduction and low frequency noise characteristics in p-type poly-Si thin-film transistors**Project supported by the National Natural Science Foundation of China (Grant No. 61574048), the Pearl River Science and Technology Nova Program of Guangzhou City, China (Grant No. 201710010172), the International Science and Technology Cooperation Program of Guangzhou City (Grant No. 201807010006), the International Cooperation

The instability of p-channel low-temperature polycrystalline silicon thin film transistors (poly-Si TFTs) is investigated under negative gate bias stress (NBS) in this work. Firstly, a series of negative bias stress experiments is performed, the significant degradation behaviors in current–voltage characteristics are observed. As the stress voltage decreases from −25 V to −37 V, the threshold voltage and the sub-threshold swing each show a continuous shift, which is induced by gate oxide trapped charges or interface state. Furthermore, low frequency noise (LFN) values in poly-Si TFTs are measured before and after negative bias stress. The flat-band voltage spectral density is extracted, and the trap concentration located near the Si/SiO2 interface is also calculated. Finally, the degradation mechanism is discussed based on the current–voltage and LFN results in poly-Si TFTs under NBS, finding out that Si–OH bonds may be broken and form Si* and negative charge OH− under negative bias stress, which is demonstrated by the proposed negative charge generation model.

1/f noise analysis in high mobility polymer-based OTFTs with non-fluorinated dielectric

In this paper, Low Frequency Noise (LFN) characterization of SP500 polymer-based Organic Thin Film Transistors with a nonfluorinated dielectric material is presented. The work aimed at identifying the mechanism of 1/f noise as well as inspecting the quality of the gate dielectric interface. Analysis of the LFN experimental data reveals that the 1/f noise power spectral density (PSD) follows 1/f γ frequency dependence over 1 Hz–10 kHz range. The normalized current noise PSD is found to vary similar to the squared-transconductance drain current ratio with respect to drain current, and is inversely related to the gate-area. Furthermore, the high carrier mobility (on the order of 2–3 cm2/Vs) obtained in these devices indicates that low density of traps exists in the semiconducting organic thin film. Such results ascribed the origin of 1/f noise to the dynamic exchange of charge carriers between the gate-dielectric traps and the channel. In addition, Nst values extracted from the 1/f noise experimental data reflect the enhanced quality of the gate dielectric and the interface it forms with the channel material.

The demonstration of recessed anodes AlGaN/GaN Schottky barrier diodes using microwave cyclic plasma oxidation/wet etching techniques

This paper presents the recessed anodes AlGaN/GaN Schottky barrier diodes (SBDs) using cyclic microwave plasma oxidation and wet etching techniques which were investigated to reduce the damage and contamination on the recessed GaN-based surface. A wide bandgap Ga-doped MgZnO (GMZO) sidewall layer structure was also conducted to suppress the hard breakdown mechanism at high reserve voltage. The SBD with recessed anodes and GMZO sidewall structure had specific on-resistance (RON_SP) of 1.99 mΩ cm2, turn-on voltage (VON) of 0.40 V, and breakdown voltage of 465 V. The SBDs in this study realized higher RON_SP and lower VON than that of the conventional device. In addition, the reverse recovery and low frequency noise characteristics of a SBD with recessed anode and GMZO sidewall structure were lower than those in the conventional structure because the anode metals are close to a high-density 2DEG by using recessed structure and the leakage current from the etching damages is declined by using a GMZO sidewall structure.

Low Frequency Noise and Resistivity Characteristics of Hybrid Composites with Onion-Like Carbon and Multi-Walled Carbon Nanotubes

The comprehensive study of resistivity and low frequency (10[Formula: see text]Hz–20[Formula: see text]kHz) noise characteristics of hybrid polymer composites with multi-walled carbon nanotubes (MWCNTs) and onion-like carbon (OLC) particles in one material have been carried out in the wide temperature range ((75–380) K). The characteristic dependences on the fillers density and the dominant conduction mechanisms were investigated. At low temperature ((75–170) K), the resistivity dependences on temperature are well-fitted by the Mott’s formula for the quasi-one-dimensional charge carrier variable range hopping and Arrhenius law. At temperatures above 300[Formula: see text]K, the resistance increases with temperature due to matrix expansion and decreases due to the onset of the conductivity in the matrix. Low frequency voltage noise spectra comprise of 1/[Formula: see text] and Lorentzian-type components with characteristic times in the range from 0.1[Formula: see text][Formula: see text]s to 10[Formula: see text][Formula: see text]s; the noise spectral density in the region of Ohmic resistance is proportional to the voltage square. Therefore, thermally activated charge carrier capture centers randomly modulate the sample’s resistance and control the carrier hopping. Impulse noise and more sudden changes of the noise characteristics were observed at the temperatures, where the conduction mechanisms change.

Low-Frequency Carrier Kinetics in Perovskite Solar Cells.

Hybrid organic-inorganic halide perovskite solar cells have emerged as leading candidates for third-generation photovoltaic technology. Despite the rapid improvement in power conversion efficiency (PCE) for perovskite solar cells in recent years, the low-frequency carrier kinetics that underlie practical roadblocks such as hysteresis and degradation remain relatively poorly understood. In an effort to bridge this knowledge gap, we perform here correlated low-frequency noise (LFN) and impedance spectroscopy (IS) characterization that elucidates carrier kinetics in operating perovskite solar cells. Specifically, we focus on planar cell geometries with a SnO2 electron transport layer and two different hole transport layers-namely, poly(triarylamine) (PTAA) and spiro-OMeTAD. PTAA and spiro-OMeTAD cells with moderate PCEs of 5-12% possess a Lorentzian feature at ∼200 Hz in LFN measurements that corresponds to a crossover from electrode to dielectric polarization. In comparison, spiro-OMeTAD cells with high PCEs (>15%) show 4 orders of magnitude lower LFN amplitude and are accompanied by a cyclostationary process. Through a systematic study of more than a dozen solar cells, we establish a correlation with noise amplitude, PCE, and fill factor. Overall, this work establishes correlated LFN and IS as an effective methodology for quantifying low-frequency carrier kinetics in perovskite solar cells, thereby providing new physical insights that can rationally guide ongoing efforts to improve device performance, reproducibility, and stability.

Low-Frequency Noise Characteristics of GaN Nanowire Gate-All-Around Transistors With/Without 2-DEG Channel

Two different lateral GaN-based nanowire gate-all-around transistors with and without 2-D electron gas (2-DEG) channel were fabricated using top-down approach, and their noise characteristics were investigated. The nanowire transistor with 2-DEG channel had a relatively larger channel cross section, which consists of regrown AlGaN/GaN plateau on the trapezoidal GaN layer, and exhibited negative threshold voltages ( ${V} _{\textsf {th}}$ ). The transistor without 2-DEG channel consisted only GaN layer with triangular-shaped smaller channel cross section and exhibited a positive ${V} _{\textsf {th}}$ . Both nanowire transistors clearly demonstrated typical $1/{f}$ noise characteristics, but the AlGaN/GaN nanowire transistor with 2-DEG channel showed larger noise magnitude. The noise characteristics of both devices are well explained by the carrier number fluctuation with correlated mobility fluctuation model. Using this model, the interface trap densities and the remote Coulomb scattering parameters were extracted, revealing a worse interface quality for the AlGaN/GaN device on the one hand, but stronger scattering for the narrow GaN transistor on the other hand.

Temperature dependence of conduction and low frequency noise characteristics in hydrogenated amorphous silicon thin film transistors

The transfer and low frequency noise characteristics of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) were measured in the temperature range of 230–430 K. The variation of threshold voltage, field effect mobility and sub-threshold swing with increasing temperatures were then extracted and analyzed. Moreover, the shifts of low frequency noise in the a-Si:H TFT under various temperatures are reported for the first time. The variation of flatband voltage noise power spectral density with temperature is also calculated and discussed.

Scaling Down Effect on Low Frequency Noise in Polycrystalline Silicon Thin-Film Transistors

Scaling down effects on conduction and low frequency noise characteristics are investigated in a set of p-type polycrystalline silicon thin-film transistors (poly-Si TFTs) with fixed channel width ( $W=8 \mu$ m) and different channel lengths ( $L=2, 4, 8, 12, ~\text{and}~ 20 \mu$ m). First, short channel effects on threshold voltage, field effect mobility, and sub-threshold swing are examined, while the presence of contact may induce to the degradation of field effect mobility in the short channel devices. Subsequently, the drain current noise power spectral densities are measured at varied effective gate voltages and drain currents. The slopes of normalized noise against effective gate voltage are varied from −1.1 to −2 with decreasing channel length, which indicates that poly-Si TFTs varied from bulk dominated devices to interface dominated devices. Based on $\Delta N-\Delta \mu$ model, the flat-band voltage noise spectral density and coulomb scattering coefficient are extracted. Therefore, measured normalized noises are simulated by considering of contact resistance. Finally, short channel effects on some noise parameters (such as Hooge’s parameter, etc.) are studied and discussed.

On the Low-Frequency Noise Characterization of Z2-FET Devices

This paper addresses the low-frequency noise characterization of Z 2 -FET structures. These double-gated p-i-n diode devices have been fabricated at STMicroelectronics in an ultrathin body and box (UTBB) 28-nm FDSOI technology and designed to operate as 1T-DRAM memory cells, although other applications, as for example electro static discharge (ESD) protection, have been reported. The experimentally extracted power spectral density of current reveals that the high-diode series resistance, carrier number fluctuations due to oxide traps, and gate leakage current are the main noise contributors at high-current regimes. These mechanisms are expected to contribute to the degradation of cell variability and retention time. Higher flicker noise levels have been reported when increasing the vertical electric field. A simple model considering the contribution of the main noise sources is proposed.

Coulomb scattering mechanism transition in 2D layered MoTe2: effect of high-κ passivation and Schottky barrier height

Clean interface and low contact resistance are crucial requirements in two-dimensional (2D) materials to preserve their intrinsic carrier mobility. However, atomically thin 2D materials are sensitive to undesired Coulomb scatterers such as surface/interface adsorbates, metal-to-semiconductor Schottky barrier (SB), and ionic charges in the gate oxides, which often limits the understanding of the charge scattering mechanism in 2D electronic systems. Here, we present the effects of hafnium dioxide (HfO2) high-κ passivation and SB height on the low-frequency (LF) noise characteristics of multilayer molybdenum ditelluride (MoTe2) transistors. The passivated HfO2 passivation layer significantly suppresses the surface reaction and enhances dielectric screening effect, resulting in an excess electron n-doping, zero hysteresis, and substantial improvement in carrier mobility. After the high-κ HfO2 passivation, the obtained LF noise data appropriately demonstrates the transition of the Coulomb scattering mechanism from the SB contact to the channel, revealing the significant SB noise contribution to the 1/f noise. The substantial excess LF noise in the subthreshold regime is mainly attributed to the excess metal-to-MoTe2 SB noise and is fully eliminated at the high drain bias regime. This study provides a clear insight into the origin of electronic signal perturbation in 2D electronic systems.

Electrical Characteristics and pH Response of a Parylene-H Sensing Membrane in a Si-Nanonet Ion-Sensitive Field-Effect Transistor.

We report the electrical characteristics and pH responses of a Si-nanonet ion-sensitive field-effect transistor with ultra-thin parylene-H as a gate sensing membrane. The fabricated device shows excellent DC characteristics: a low subthreshold swing of 85 mV/dec, a high current on/off ratio of ~107 and a low gate leakage current of ~10−10 A. The low interface trap density of 1.04 × 1012 cm−2 and high field-effect mobility of 510 cm2V−1s−1 were obtained. The pH responses of the devices were evaluated in various pH buffer solutions. A high pH sensitivity of 48.1 ± 0.5 mV/pH with a device-to-device variation of ~6.1% was achieved. From the low-frequency noise characterization, the signal-to-noise ratio was extracted as high as ~3400 A/A with the lowest noise equivalent pH value of ~0.002 pH. These excellent intrinsic electrical and pH sensing performances suggest that parylene-H can be promising as a sensing membrane in an ISFET-based biosensor platform.

InGaAs Diodes for Terahertz Sensing-Effect of Molecular Beam Epitaxy Growth Conditions.

InGaAs-based bow-tie diodes for the terahertz (THz) range are found to be well suited for development of compact THz imaging systems. To further optimize design for sensitive and broadband THz detection, one of the major challenges remains: to understand the noise origin, influence of growth conditions and role of defects for device operation. We present a detailed study of photoreflectance, low-frequency noise characteristics and THz sensitivity of InGaAs bow-tie diodes. The diodes are fabricated from InGaAs wafers grown by molecular beam epitaxy (MBE) on semi-insulating InP substrate under different technological conditions. Photoreflectance spectra indicated the presence of strong built-in electric fields reaching up to 49 kV/cm. It was demonstrated that the spectral density of voltage fluctuations at room temperature was found to be proportional to 1/f, while at lower temperatures, 77–200 K, Lorentzian-type spectra dominate due to random telegraph signals caused by individual capture defects. Furthermore, varying bias voltage, we considered optimal conditions for device room temperature operation in the THz range with respect to signal-to-noise ratio. The THz detectors grown with beam equivalent pressure In/Ga ratio equal to 2.04 exhibit the minimal level of the low-frequency noise, while InGaAs layers grown with beam equivalent pressure In/Ga ratio equal to 2.06 are found to be well suited for fabrication of room temperature bow-tie THz detectors enabling sensitivity of 13 V/W and noise equivalent power (NEP) of 200 pW/√Hz at 0.6 THz due to strong built-in electric field effects.

Gate Stack Engineering in 2D Semiconductor FETs for Electronic Applications

In this work, we present an experimental study on the gate stack engineering in transition metal dichalcogenide-based field-effect transistor. The electrical performance has been significantly improved due to enhanced gate control through the effective structure engineering. The interesting photoresponsivity and low-frequency noise characteristics have been observed which make it very attractive for photodetector and various sensing applications.

Low-frequency noise characteristics of high-power white LED during long-term aging experiment

Low-frequency electrical and optical noise characteristics of a high power white InGaN LED and the cross-correlation coefficient between these fluctuations are investigated during the long-term ageing experiment (28000 h). The analysis of cross-correlation shows that the correlated part of the low-frequency electrical noise, which indicates physical processes in the active area of the LED, varies during the ageing experiment. Two main stages are distinguished considering the rapid changes of the noise characteristics. The initial stage (after the first 1100 h) is followed by the decrease in the noise power at low forward currents and the increase in the light output. The final stage (after 28000 h) is characterized by a strong growth of the low-frequency noise, the decrease of the light output and the increase of the correlated part of electrical and optical fluctuations. These changes mean a failure in the active layer of the LED. The optical output decomposition into two spectral parts, the radiation generated by the LED chip and the radiation generated by the phosphor layer, enables evaluation of the phosphor layer influence on the degradation process of device optical characteristics. Despite the fact that this layer contributes to the variation of the LED chromatic properties, the cross-correlation analysis has shown that the phosphor layer does not act as a possible noise source during the ageing experiment.

Degradation of current–voltage and low frequency noise characteristics under negative bias illumination stress in InZnO thin film transistors**Project supported by the Opening Fund of Key Laboratory of Silicon Device Technology, Chinese Academy of Sciences (Grant No. KLSDTJJ2018-6), the National Natural Science Foundation of China (Grant No. 61574048), the Science and Technology Research Project of Guangdong Province, China (Grant No. 2015B090912002),

The instabilities of indium–zinc oxide thin film transistors under bias and/or illumination stress are studied in this paper. Firstly, illumination experiments are performed, which indicates the variations of current–voltage characteristics and electrical parameters (such as threshold voltage and sub-threshold swing) are dominated by the stress-induced ionized oxygen vacancies and acceptor-like states. The dependence of degradation on light wavelength is also investigated. More negative shift of threshold voltage and greater sub-threshold swing are observed with the decrease of light wavelength. Subsequently, a negative bias illumination stress experiment is carried out. The degradation of the device is aggravated due to the decrease of recombination effects between ionized oxygen vacancies and free carriers. Moreover, the contributions of ionized oxygen vacancies and acceptor-like states are separated by using the mid-gap method. In addition, ionized oxygen vacancies are partially recombined at room temperature and fully recombined at high temperature. Finally, low-frequency noise is measured before and after negative bias illumination stress. Experimental results show few variations of the oxide trapped charges are generated during stress, which is consistent with the proposed mechanism.

Quantitative Analysis of Deuterium Annealing Effect on Poly-Si TFTs by Low Frequency Noise and DC ${I}$ – ${V}$ Characterization

Deuterium (D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) annealing was applied to a poly-crystalline silicon thin-film transistor (poly-Si TFT) to improve reliability and performance. The field-effect electron mobility (μ) was extracted using the gate transconductance (g <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> ) method. It was found that μ was improved before and after D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> annealing. The interface trap density (D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> ) as well as the oxide trap density (N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ot</sub> ) in the poly-Si TFTs was quantitatively extracted using both conventional dc I-V characterization and analysis of low frequency noise (LFN). The profile of N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ot</sub> along the depth direction was investigated before and after D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> annealing using LFN characteristics. It was confirmed that D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> as well as N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ot</sub> was reduced by the D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> annealing, resulting in a reduction in power spectral density and variation.