Low DC Bus Research Articles

A Fuel-Efficient BLDC Motor-Driven Light Electric Vehicle With Single-Stage Onboard Charging System

This work proposed a simple, compact, and efficient scheme for an on-board charging configuration for light plug-in electric vehicles (LPEVs) with a dual charging arrangement i.e., utility grid and solar panel. The system is targeted to develop an LPEV with a low DC bus voltage (<100V) and on-board solar support using a brushless dc motor (BLDCM) drive due to its economic controller, compact drive arrangement, and high efficiency. The designed integrated converter works well under all operating modes like charging, propulsion (PP), and regenerative braking (RB) operations. The developed converter works as a power factor correction (PFC) converter during grid charging as well as performs as maximum power point tracking (MPPT) converter when charging through solar power. A new approach of the controller in regenerative mode exploiting both the drive and proposed integrated control is unique for this system. As a result, the designed system becomes compact and efficient, making it a competitive solution for an on-board charging scheme for LEVs.

An Electrolytic-Capacitor-Less PFC LED Driver With Low DC-Bus Voltage Stress for High Power Streetlighting Applications

This paper presents a single-stage, soft-switching, high power factor, flicker-free LED driver without any electrolytic capacitors for streetlighting application. The proposed LED driver consists of a buck-boost type power factor correction (PFC) circuit integrated with an asymmetric half-bridge LLC resonant converter. The buck-boost type PFC circuit provides a high power factor, low input current harmonics, and low dc bus average voltage. Unlike other methods that use the first harmonic approximation (FHA) analysis or the differential equations in time domain to analysis the LLC circuit, in this paper, a Fourier series-based analysis is proposed. The proposed method provides better accuracy in comparison with the FHA while being simpler than the time domain analyze method. The half-bridge LLC resonant converter is designed such that ZVS is obtained for the entire input voltage range (185 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$-$</tex-math></inline-formula> 265 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$V_{rms}$</tex-math></inline-formula> ), and for 20% to 100% of the full-load power. In addition, a magnetic integration technique is utilized to increase efficiency and reduce converter size. The designed control system enables lowering the output current ripples without using any electrolytic capacitors. To verify the feasibility of the proposed LED driver, a 200 W prototype is implemented. The proposed LED driver achieves maximum efficiency of 94.6%, high PF, and a maximum of 15% output current ripples.

DC/DC Stage Contribution to Bus Voltage in 1000- and 1500-V Grid-Connected Solar Inverters

Modern architectures of transformerless, three-phase-grid-connected photovoltaic (PV) inverter for 1000- and 1500-V commercial/residential applications are analyzed and compared from the point of view of the energy harvested during one year period, system efficiency, and power density. Scenarios for different ac grid voltage levels and inverters topologies are analyzed based on one- and two-stage solutions. The architectures with and without included dc/dc stage are compared from the point of view of the optimized power density. In the case of the two-stage PV inverter architecture, the mini-boost converter concept, presented in previous publications, is extended and the standard boost topology that employs 1200-V rated IGBTs and diodes is replaced by a multilevel, hybrid power converter topology that exhibits high efficiency due to the partial power processing and new classes of 900- and 650-V SiC and GaN devices employed. The inverter’s output filter design space (DS) has been researched from the point of view of the dc bus voltage variation. The cases are analyzed for fully controlled bus voltage at its minimum value and when allowed to vary in the full MPP range. Optimization results of the output filter DSs for the minimum and maximum operating dc bus voltage are compared in terms of the occupied volume in order to investigate whether it is possible to obtain more compact inverter stage by better control of dc bus voltage. The results show that in the case of controlled low dc bus voltage level, it is feasible to design a filter that occupies up to 50% less volume than the filter designed for the full MPP voltage variation. Even more, this can be achieved by maintaining the system efficiency. The simulation and experimental results complement the analysis of the 1000- and 1500-V grid-connected PV inverter systems.

Torque-Enhanced Phase Current Detection Schemes for Multiphase Switched Reluctance Motors with Reduced Sensors

An n/2-sensor-based and an (m + 1)/2-sensor-based phase current detection scheme are proposed for even-numbered switched reluctance motors (EMSRMs) with n phases and odd-numbered switched reluctance motors (OMSRMs) with m phases. For the EMSRMs, the phases are divided into n/2 groups each of which includes two phases furthest from each other, and the lower dc bus is split into n/2 + 1 buses such that the currents through the lower switches of a group flow through a bus whose current is detected by a sensor. For the OMSRMs, the phases are divided into (m + 1)/2 groups and the currents through the lower switches of a group are detected by a multiplexed sensor without converter modification; the phase grouping is generalized as an optimization problem considering the volume and measuring range of the sensors. The schemes can detect the magnetization and freewheeling phase currents under multiphase excitation without pulse injection and voltage penalty. Compared to the existing schemes using cross-winding sensors, the proposed schemes can increase the motor torque by extending the phase conduction region. In addition, the proposed scheme for EMSRMs can combine the low-cost low-side shunt current sensing technique, and the proposed scheme for OMSRMs can increase the current sensing resolution. Simulations are carried out to validate the two proposed schemes. The proposed (m + 1)/2-sensor-based scheme is further verified experimentally.

A Novel Low-Frequency Virtual Space Vector Modulation With the Improved Continuity of Output Average-Voltage and Bus Voltage Utilization for Single-Phase Neutral Point Clamped Three-Level Inverter

In the high-power superconducting fusion converter, the single-phase neutral point clamped (NPC) three-level converter is applied to replace the traditional thyristor converter using an integrated gate-commutated thyristor (IGCT) as a power device. The operating frequency of IGCT is usually lower, only a few hundred Hz. An optimized hybrid space vector pulsewidth modulation (SVPWM)-8H is proposed to solve the problems of discontinuous output average voltage, low dc bus voltage utilization rate, dead time compensation, and neutral point potential balance. The new sectors are inserted to make the range of output average voltage of adjacent sectors intersect, which improves the continuity of output average voltage. Furthermore, some sectors are composed of four vectors to reduce the minimum working time of redundant small vectors, improving the dc bus voltage utilization ratio and the converter’s performance. Moreover, by analyzing the influence of dead time on redundant small vectors, redundant vectors are rearranged to make redundant small vectors’ working time synchronously in sector and sector switching, which reduces the influence of dead time on neutral point potential balance. Finally, by analyzing the influence of dead time on the output average voltage, dead time compensation is applied, which reduces the difficulty of compensation implementation. Simulations and experiments verify the rationality of the optimized hybrid SVPWM-8H.

Investigation of SiC Trench MOSFETs' Reliability under Short-Circuit Conditions.

In this paper, the short-circuit robustness of 1200 V silicon carbide (SiC) trench MOSFETs with different gate structures has been investigated. The MOSFETs exhibited different failure modes under different DC bus voltages. For double trench SiC MOSFETs, failure modes are gate failure at lower dc bus voltages and thermal runaway at higher dc bus voltages, while failure modes for asymmetric trench SiC MOSFETs are soft failure and thermal runaway, respectively. The shortcircuit withstanding time (SCWT) of the asymmetric trench MOSFET is higher than that of the double trench MOSFETs. The thermal and mechanical stresses inside the devices during the short-circuit tests have been simulated to probe into the failure mechanisms and reveal the impact of the device structures on the device reliability. Finally, post-failure analysis has been carried out to verify the root causes of the device failure.

Constrained optimised flexible power control for grid‐connected converters under unbalanced faults

This paper presents a constrained multi-objective optimisation scheme for a grid-connected voltage source converter operating under unbalanced voltage conditions in a three-phase three-wire system. The scheme is aimed at evaluating the converter reference currents required to supply all the power generated by the connected source to the grid, whilst simultaneously suppressing oscillations of both real and reactive powers. The trade-off between these two conflicting requirements is achieved by setting a single cost function with variable weightings. Two constraints are set to restrict the converter instantaneous phase current and maintain low DC-bus voltage percentage ripple. A genetic algorithm is applied to search for the optimal solution. Simulation results are presented and confirm the effectiveness of the proposed method.

Modeling a Switching-Regulated Capacitively Coupled Power Supply for Medium-Voltage AC

The use of capacitive coupling has the potential of reducing the size and cost in the implementation of auxiliary power supplies. This is particularly advantageous in applications with medium-voltage AC feeders, where this arrangement can avert the use of a high-voltage transformer. The current standard for voltage control in this type of power supply is shunt regulation. This scheme maintains a low DC bus voltage, which increases the current demand through the input capacitors and hence decreases the power factor. Switching regulation allows operation at a relatively high intermediate DC bus voltage which can improve the power factor, in addition to providing galvanic isolation and achieving higher efficiencies. However, this type of regulation has not been thoroughly explored in the literature of capacitively coupled power supplies. This paper presents a novel mathematical model to describe high-frequency switching DC-to-DC regulation in a power supply capacitively coupled to a medium-voltage input. The model is used in a case study for the design of a 50 W / 12 V (DC) supply fed from a 1 kV (rms) / 50 Hz AC input. The results of the design validate the model and demonstrate the advantages of the novel concept.

Understanding Turn-On Transients of SiC High-Power Modules: Drain-Source Voltage Plateau Characteristics

The SiC (silicon carbide) high-power module has great potential to replace the IGBT (insulated gate bipolar transistor) power module in high-frequency and high-power applications, due to the superior properties of fast switching and low power loss, however, when the SiC high-power module operates under inappropriate conditions, the advantages of the SiC high-power module will be probably eliminated. In this paper, four kinds of SiC high-power modules are fabricated to investigate fast switching performance. The variations in characteristics of drain-source voltage at turn-on transient under the combined conditions of multiple factors are studied. A characteristic of voltage plateau is observed from the drain-source voltage waveform at turn-on transient in the experiments, and the characteristic is reproduced by simulation. The mechanism behind the voltage plateau is studied, and it is revealed that the characteristic of drain-source voltage plateau is a reflection of the miller plateau effect of gate-source voltage on drain-source voltage under the combined conditions of fast turn-on speed and low DC bus voltage, while the different values of drain-source voltage plateau are attributed to the discrepancy of structure between upper-side and lower-side in the corresponding partial path of the drain circuit loop inside the module, with the standard 62 mm package outline.

Active Voltage-Ripple Compensation in an Integrated Generator-Rectifier System

An integrated generator-rectifier system can produce high conversion efficiency and reduce the size of the active rectifier in high-power ac-to-dc conversion. A major disadvantage of this system is the use of bulky filter capacitors with passive rectifiers to obtain a low voltage-ripple dc bus. These filters are the main contributor to the overall system size, weight, cost, and failure, as well as to the low power factor at the ac ports powering the passive rectifiers. This article presents an alternative approach: integrating the function of the filter elements into the active rectifier. A voltage opposite the passive-rectifier ripple component is synthesized at the active-rectifier dc-side by modulating the ac-side current. Compensation occurs due to the series connection of the rectifier dc outputs. In addition, an overall control architecture is proposed to use the active rectifier both as a filter element and a dc-bus voltage regulator. Simulation on a 3-MW, 4.9-kV dc system shows the total dc-bus-voltage ripple factor is reduced by 57%, while the power factor at the passive-rectifier ac sides is 0.95. The proposed control architecture achieves regulation of the dc-bus voltage at variable dc-bus current and variable generator speed conditions. Experimental results corroborate the findings.

A two‐level voltage source inverter with differentially sinusoidal pulse width modulation used in the interconnection system of a wind turbine generator

This study analyses an interconnection system based on differentially sinusoidal pulse width modulation, used for the interconnection to the grid of a variable speed wind turbine. The modulation technique used provides specific advantages in comparison with the commonly used sinusoidal pulse width modulation (SPWM) technique, such as lower DC bus voltage requirements, smaller switching losses for the same switching frequency as well as less higher harmonic content in the voltage waveforms produced. The respective control system is also described in detail. Thus this study provides a guide enabling the design of any interconnection system based on this modulation technique.

Vector Control Based on SVPWM for ACIM

To solve the large torque ripple and current harmonics, low DC bus voltage problems, a new control strategy is proposed for AC induction motor by using space vector pulse width modulation, so that the static and dynamic performance are improved. The system simulation experiment mode was established based on SVPWM to verify the effectiveness of the system control mode. It is showed that it can reduce the current ripple and torque ripple, improve the utilization of DC bus voltage. It means that the control strategy based SVPWM can improve dynamic and static performance effectively for the ACIM servo system.

A Low-Power AC–DC Single-Stage Converter With Reduced DC Bus Voltage Variation

A new low-power single-stage ac-dc converter is proposed in the paper. The outstanding feature of the converter is that it can operate with a sinusoidal input current and a low primary-side dc bus voltage that is much less variable than that found in other single-stage converters. The operation of the converter is discussed in the paper and its various modes of operation are explained in detail. An analysis of the converter's steady-state characteristics is performed and the results are used in the design of the converter. Experimental results obtained from a prototype converter are also presented.

Implementation of an Interleaved AC/DC Converter with a High Power Factor

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

Analysis and Design of a Tapped-Inductor Buck–Boost PFC Rectifier With Low Bus Voltage

This paper presents a single-phase power factor corrector based on a tapped-inductor buck-boost converter. This paper suggests simplified models of the power stage under current-mode control and derives small-signal transfer functions of both the current and voltage control loops. Design rules for implementation of the proposed power factor corrector (PFC) are also suggested. The proposed PFC features low dc bus voltage, arbitrary lower than the peak line voltage. The proposed PFC is suitable for applications in computers and communications, where dc isolation can be provided by the downstream dc/dc converters. Simulation and experimental results are also reported and stand in good agreement with theoretical expectations.

Tradeoffs Between AC Power Quality and DC Bus Ripple for 3-Phase 3-Wire Inverter-Connected Devices Within Microgrids

Visions of future power systems contain high penetrations of inverters which are used to convert power from dc (direct current) to ac (alternating current) or vice versa. The behavior of these devices is dependent upon the choice and implementation of the control algorithms. In particular, there is a tradeoff between dc bus ripple and ac power quality. This study examines the tradeoffs. Four control modes are examined. Mathematical derivations are used to predict the key implications of each control mode. Then, an inverter is studied both in simulation and in hardware at the 10 kVA scale, in different microgrid environments of grid impedance and power quality. It is found that voltage-drive mode provides the best ac power quality, but at the expense of high dc bus ripple. Sinusoidal current generation and dual-sequence controllers provide relatively low dc bus ripple and relatively small effects on power quality. High-bandwidth dc bus ripple minimization mode works well in environments of low grid impedance, but is highly unsuitable within higher impedance microgrid environments and/or at low switching frequencies. The findings also suggest that the certification procedures given by G5/4, P29 and IEEE 1547 are potentially not adequate to cover all applications and scenarios.

A single‐stage LED lamp driver with low DC bus voltage for general lighting applications

AbstractIn this paper, we study the feasibility of a single‐stage lighting LED lamp driver with low DC bus voltage. The operating principles and design considerations for the LED lamp driver in this study are analyzed and discussed in detail. A laboratory prototype has been built and tested. Using the prototype, high efficiency, high‐power factor and LED current control were achieved using a wide AC input voltage range from 90 to 270 V. Copyright © 2010 John Wiley &amp; Sons, Ltd.

A Low Frequency AC to High Frequency AC Inverter With Build-In Power Factor Correction and Soft-Switching

This paper presents a full bridge AC-AC inverter for high frequency power distribution system with power factor correction stage controlled by a unified controller. The proposed inverter has the following features: 1) load independent output voltage with constant frequency and very low total harmonic distortion (THD); 2) soft switching of the full bridge switches for a wide range of input voltage and load conditions; 3) low DC bus voltage; 4) simple control and cost effectiveness for the power factor correction stage. Operating principles and performance characteristics are presented, and guidance to design the converter is given. Experimental results of a 90-265V/sub ac/ input, 30 V/sub ac/ output at 100 kHz, 250 W laboratory prototype are given to verify the theoretical and simulation results. The proposed ac-ac inverter is attractive for low power (up to 250 W) high frequency applications.

Extension of operation of space vector PWM strategies with low switching frequencies using different overmodulation algorithms

This paper investigates the operation of four space vector-based synchronized pulse-width modulation (PWM) strategies in the overmodulation zone using three different overmodulation algorithms. It is shown that the symmetries in the PWM waveforms generated can be preserved in the overmodulation zone also. With any given overmodulation algorithm, the voltage control characteristics (i.e., fundamental voltage versus control variable) are found to vary with PWM strategy, pulse number and type of clamping. The inverse of the appropriate voltage control curve is used during premodulation to maintain the modulator gain constant. The differences in the nature of the voltage control characteristics with the different overmodulation algorithms are brought out. These characteristics are compared and contrasted against those at high switching frequencies. The harmonic distortion in the different cases is evaluated and compared. It is shown that the bus clamping strategies perform better than the conventional strategy with any given overmodulation algorithm employed. These strategies, which exploit the flexibilities in the space vector approach, are useful in high power drives on account of their superior waveform quality at low switching frequencies and high DC bus utilization.

A single-switch AC-DC converter with power factor correction

A new single-stage, single-switch power factor correction converter with output electrical isolation is proposed in this paper. The topology of this converter is derived by combining a boost circuit and a forward circuit in one power stage. To improve the performance of the AC-DC converter (i.e., good power factor correction, low total harmonic distortion (THD) and low DC bus voltage), two bulk storage capacitors are adopted. Its excellent line regulation capability makes the converter suitable for universal input application. Due to its simplified power stage and control circuit, this converter presents a better efficiency, lower cost and higher reliability. Detailed steady state analysis and design procedure are presented. To verify the performance of the proposed converter, a design example along with P-simulation program with integrated circuit emphasis (PSPICE) simulation and experimental implementation are given. The measured power factor and efficiency are 99% and 87% at low line (i.e. 110 VAC) operation, and 95% and 81% at high line (i.e. 220 VAC) operation, respectively.