Low Conduction Losses Research Articles

Capacitor Commutation Method for MVDC Hybrid Circuit Breakers

The medium voltage DC (MVDC) type system can connect multiple terminals to a common MVDC bus, so it is possible to connect several renewable DC power sources to the common MVDC bus, but a DC circuit breaker is needed to isolate short circuit accidents that may occur in the MVDC bus. For this purpose, the concept of a hybrid DC circuit breaker that takes advantage of a low conduction loss contact type switch and an arcless-breaking semiconductor switch has been proposed. During break the hybrid switch, a dedicated current commutation device is required to temporarily bypass the load current flowing through the main switch into a semiconductor switch branch. Existing current commutation methods include a proactive method and a reverse current injection method by a LC (Inductor-capacitor) resonant circuit. This paper proposes a power circuit of a new MVDC hybrid circuit breaker using a low withstanding voltage capacitor branch for commutation and a sequence controller according to it, and verifies its operation through an experiment.

Three-Level F-Type Inverter

Given the recently available IGBT switch modules up to 6.5 kV, 1200 A rating, the prospect of the diode-free variant topology of the three-level neutral-point-clamped (3-level T-type, NPC) inverter in certain medium-voltage applications is bright due to its small part count and low conduction losses compared to the diode-clamped NPC inverter. However, within this voltage range, the input dc voltage rating of 50% of the switches per inverter phase-leg still poses limitations to the deployment of a 3-level T-type inverter. In view of these limitations, a reconfigured four-switch per phase-leg power circuit for a 3-level inverter (F-type) is presented in this article. The common node of the bidirectional switch in the T-type inverter is explored to have only one power switch rated at input dc voltage and three switches rated at half the input dc voltage per inverter leg. This reduced voltage stress has inverter cost and loss implications. The performances and competitiveness of the three-level F-type inverter are analyzed in detail and demonstrated with a hardware prototype. Results reveal that it has the potentials of being considered a real alternative to 3-level T-type inverters for certain low- and medium-voltage applications.

Model predictive control of a hybrid stacked multicell converter with voltage balancing and fault tolerance capability

Due to the merits of low conduction losses and superior output power quality, a hybrid stacked multicell converter (HSMC) was put forward as a competitive alternative in the medium/low-voltage high-efficiency applications. A nine-level HSMC (9L-HSMC) can be seen as a combination of a five-level SMC (5L-SMC) and two-level half-bridge, and proper modulation and control strategy are essential for the HSMC to obtain the optimal output performance. This work develops a finite control-set model predictive control (MPC) strategy for 9L-HSMC to balance the capacitor voltages and maintain the desired outputs, rendering the absence of the linear regulator and pulse width modulation (PWM) modulator possible. The fault-tolerant operation can also be achieved flexibly when open-circuit faults occur at active bidirectional switches in the 5L-SMC bridge, and the performance is verified by simulations. Finally, experiments under several typical operating conditions are implemented to verify the effectiveness of 9L-HSMC with the developed MPC strategy.

Device topological thermal management of β-Ga2O3 Schottky barrier diodes* *Project supported by the National Natural Science Foundation of China (Grant Nos. 61925110, 61821091, 62004184, 62004186, and 51961145110), the National Key R&D Program of China (Grant Nos. 2018YFB0406504 and 2016YFA0201803), the Strategic Priority Research Program of the Chinese Academy of Sciences (CAS) (Grant No. XDB44000000), the Key Research Program of Frontier

The ultra-wide bandgap semiconductor β gallium oxide (β-Ga2O3) gives promise to low conduction loss and high power for electronic devices. However, due to the natural poor thermal conductivity of β-Ga2O3, their power devices suffer from serious self-heating effect. To overcome this problem, we emphasize on the effect of device structure on peak temperature in β-Ga2O3 Schottky barrier diodes (SBDs) using TCAD simulation and experiment. The SBD topologies including crystal orientation of β-Ga2O3, work function of Schottky metal, anode area, and thickness, were simulated in TCAD, showing that the thickness of β-Ga2O3 plays a key role in reducing the peak temperature of diodes. Hence, we fabricated β-Ga2O3 SBDs with three different thickness epitaxial layers and five different thickness substrates. The surface temperature of the diodes was measured using an infrared thermal imaging camera. The experimental results are consistent with the simulation results. Thus, our results provide a new thermal management strategy for high power β-Ga2O3 diode.

Power Loop Busbars Design and Experimental Validation of 1 kV, 5 kA Solid-State Circuit Breaker Using Parallel Connected RB-IGCTs

This article investigates the design of a 1 kV, 5 kA solid-state circuit breaker by using parallel connection of reverse blocking IGCTs (RB-IGCT). The presented breaker topology is based on the parallel connection of low conduction loss RB-IGCTs which delivers efficiency as high as 99.9%. The focus of this article is on the power loop design and experimental validation of parallel connection of two and three RB-IGCTs with emphasis on current sharing during dynamic events such as short-circuits. A 3-D CAD-based design of power loop busbars was verified by several simulation test cases to represent dynamic current sharing under variations in RB-IGCT package impedances. An optimized busbar design approach and its tradeoffs are also discussed with simulation verification. The experimental results confirm that the parallel topology is able to perform current interruption during overload and short-circuit situations up to 10 kA for two devices in parallel and up to 14 kA for three devices in parallel - with current deviation from the mean as little as 6%.

A New Dead Time Regulation Synchronous Rectification Control Method for High Efficiency LLC Resonant Converters

In low output voltage and high output current LLC resonant converter applications, a synchronous rectification (SR) is essential component for high efficiency and high power density. However, stray inductances in MOSFET package and printed circuit board (PCB) pattern make premature turn-off of SR gate and large SR dead time. To compensate the stray inductance effect and increase system efficiency, a hysteresis band dead time regulation control method is proposed. In the proposed control method, SR dead time is regulated to predetermined dead time target regardless of the stray inductances by using a mixed signal, which includes instantaneous drain voltage information and previous cycle dead time information. As a result, the proposed control method can provide lower conduction losses by the dead time regulation and better transient characteristic by the instantaneous drain voltage information. To verify the validity of the proposed control method, 234-W prototype is built and experimented with the proposed controller, which is implemented with 0.25-μm BCDMOS technology.

Reduction of MMC Capacitances Through Parallelization of Symmetrical Half-Bridge Submodules

Modular multilevel converters (MMCs) enjoy the benefits of modularity and scalability. In particular, MMCs with symmetrical half-bridge submodules enable bipolar operation yet with a simple structure and low conduction losses. However, bulky dc capacitors in MMC submodules act as one major obstacle that retards the further improvement of system size, weight, and cost performance. Additionally, tight regulation and balance of dc capacitor voltages necessitate expensive voltage sensors paired with dedicated voltage controllers. This article proposes an effective hardware-based strategy that achieves MMC capacitance reduction through parallelization of symmetrical half-bridge submodules. On top of capacitance saving, the proposed strategy balances capacitor voltages in a sensorless fashion, which translates into the removal of voltage sensors and great simplification of control efforts. In addition, the proposed strategy allows fault-tolerant operation of MMCs. Finally, simulation and experimental results validate the effectiveness of the proposed strategy in capacitance reduction and capacitor voltage balancing of MMCs as static compensators.

Prototype Current-Limiting Hybrid DC Circuit Breaker Incorporating a Fuse and a Semiconductor Device

Owing to the increased demand for DC interruption, a prototype current-limiting hybrid DC circuit breaker incorporating a fuse and a semiconductor device was developed, based on a completely novel design concept. Recently, hybrid DC breakers have been attracting attention because of their low conduction loss and high-speed current interruption capability. The superiority of this hybrid DC circuit breaker lies in the simultaneous use of the high-speed current-limiting performance of the fuse and the highly reliable current-interruption performance of the semiconductor device. Furthermore, the hybrid DC circuit breaker performs the current interruption without any mechanical contact, thus preventing any delay in operation induced by the mechanical contact. The feasibility of the proposed concept was demonstrated by the successful application of the circuit breaker in a 1 kA fault current interruption procedure. Hence, the current-limiting hybrid DC circuit breaker is suitable for low voltage and medium voltage DC system protection. As the fuses and semiconductor modules progress, the hybrid DC circuit breaker may also adapt to HVDC systems.

A Multistage Resonant DC–DC Converter for Step-Up Applications

Resonant switched capacitor converters are a viable option for high-efficiency dc-dc converters. This article proposes a generic multistage resonant switched capacitor converter (MSR-SCC) for step-up applications. This article studies the performance of the MSR-SCC using a systematic approach both above and below the resonant frequency, which results in zero-voltage switching and zero-current switching, respectively. It also proposes a control algorithm to regulate the output voltage of the converter in both operating conditions. To validate the proposed analysis and control algorithms, an MSR-SCC is simulated and experimentally implemented with GaN switching devices, which enable converter operation at lower conduction losses and higher switching frequencies.

A Modular Multilevel Converter with an Advanced PWM Control Technique for Grid-Tied Photovoltaic System

Due to global warming and shortage of fossil fuels, the grid-connected solar photovoltaic (PV) system has gained significant popularity all over the world. The modular multilevel cascaded (MMC) inverter is the natural choice for step-up transformer and line filter less direct medium voltage grid integration of solar PV systems. However, power quality and loss are the important issues while connecting the PV system to the medium voltage grid through MMC inverter. Modulation technique is the key to maintain output power quality, e.g., total harmonic distortion (THD) and to ensure low switching and conduction losses. In this paper, an advanced modulation technique named “triangle saturated common mode pulse width modulation (TSCMPWM)” control is proposed for a 3-phase 5-level MMC inverter-based grid-tied PV system. Compared to traditional modulation techniques, the proposed TSCMPWM control offers the lowest voltage THD as well as lower inverter power losses. Performance of the proposed modulation technique is evaluated in MATLAB/Simulink environment and tested with a reduced scale prototype test platform. Both simulation and experimental results show the effectiveness of the proposed modulation technique.

Split Duty Super Boost Converter for High Voltage Applications in a DC Microgrid

In order to establish an appropriate interaction of a renewable DC generating source such as Photovoltaic or Fuel cells with a DC microgrid, there is need of some DC-DC converter with suitable attributes and features. Imparting high voltage at the low duty ratio is the most demanding quality of such converters. This paper introduces and explains the entire features and behavioral assessment of a novel split duty super boost converter (SDSB) involving switched structure of passive components for a partial contribution in the voltage boosting. The proposed converter is capable of attaining the highest voltage gain without any magnetic coupling, multi-staging/leveling, interleaving, or any complex networking. Additional features of the proposed converter includes its suppleness in duty ratio selection from an extended range, lower voltage stress across switches, low conduction losses, simpler and flexible control as well as enhanced reverse recovery of diodes with a continuous input current. The converter involves three switches where a splitting in duty ratio is realized for many possible positive outcomes including very low duty ratio operation of the switches. Theoretical analysis of the converter is elaborated in CCM, DCM along with the boundary conditions. Later, the performance is justified through developing a hardware prototype of 400 W for the input supply of 24 V.

A Four-Switch Five-Level Inverter

This article introduces a new single-phase five-level inverter with reduced switch count, composed by a coupled-inductor, four switches, and two diodes. Its detailed analysis is provided, including a space-vector pulsewidth modulation strategy and design of its components. Compared with the conventional three-level neutral-point clamped (NPC) inverter, the introduced converter generates an output waveform with five levels, while having the same number of devices. In addition, the topology uses less components and has lower conduction losses than other existing five-level inverters. The reduced number of devices leads to a fewer number of gate drives, decreasing the cost and complexity of the system. Simulation and experimental results validate the theoretical analysis of the introduced inverter.

An Efficient Asymmetric Direct Current (DC) Source Configured Switched Capacitor Multi-level Inverter

This paper is dealing about Switched Capacitor Multi-Level Inverter (SCMLI) circuit which is controlled by triangular multicarrier Sinewave Pulse Width Modulation (SPWM) technique. The proposed SCMLI is powered from asymmetric DC source configuration to obtain multi-level output voltage by applying switching pulse to the main circuit from control circuit for switching operation. Fourteen switches and four capacitors are employing to do the proposed inversion operation in an effective way. Switching capacitors can perform boost operation to enhance voltage from the source level to the required level. Input DC from the asymmetric sources is converted to AC voltage for the application of consumers. This proposed conversion system is applicable for mainly in industrial and renewable energy-based energy conversion system because it can carry high output voltages. This proposed method gives about more efficiency. Also reduces switching losses in lower value, low conduction losses and capacitor ripple losses. The simulation model is analyzed in MATLAB/SIMULINK platform and the same validated in hardware results. The developed SCMLI structure is witness over other topologies for the power inversion process in the multi-level.

Practical Controller Design of Three-Phase Dual Active Bridge Converter for Low Voltage DC Distribution System

In a low voltage DC (LVDC) distribution system, isolated bi-directional DC-DC converters are key devices to control power flows. A three-phase dual-active-bridge (3P-DAB) converter is one of the suitable candidates due to inherent soft-switching capability, low conduction loss, and high-power density. However, the 3P-DAB converter requires a well-designed controller due to the influence of the equivalent series resistance (ESR) of an output filter capacitor, degrading the performance of the 3P-DAB converter in terms of high-frequency noise. Unfortunately, there is little research that considers the practical design methodology of the 3P-DAB converter’s controller because of its complexity. In this paper, the influence of the ESR on the 3P-DAB converter is presented. Additionally, the generalized average small-signal model (SSM) of the 3P-DAB converter including the ESR of the capacitive output filter is presented. Based on this model, an extended small-signal model and appropriate controller design guide, and performance comparison are presented based on the frequency domain analysis. Finally, experimental results verify the validity of the proposed controller using a 25 kW prototype 3P-DAB converter.

Interleaved high step‐up ZVS DC–DC converter with coupled inductor and built‐in transformer for renewable energy systems applications

A zero voltage switching (ZVS) interleaved high step-up converter with coupled inductor and built-in transformer voltage multiplier cell is introduced in this study. A more flexible design is provided by increasing the voltage conversion ratio by utilising the turns ratios of the coupled inductor and built-in transformer. The ZVS operation of the metal-oxide-semiconductor field-effect transistors (MOSFETs) and absorption of the leakage current are realised through active clamp circuits. Furthermore, the voltage stress across the switching devices is minimised that give rises to implementation of low voltage rated MOSFETs and consequently low conduction losses. Meanwhile, the diode reverse current problem is alleviated by the leakage inductance of the coupled inductor and built-in transformer. All of the abovementioned advantages make the proposed converter as a high efficiency candidate for high current and high step-up applications. Finally, a 600 W, 48–700 V voltage conversion with the conversion efficiency of 97% is fabricated to probe the merits of the proposed converter.

Interleaved non‐isolated DC–DC converter for ultra‐high step‐up applications

This study presents a novel interleaved non-isolated converter for ultra-high step-up applications. This circuit utilises coupled inductor and voltage-lift techniques to achieve high voltage gain. In the proposed converter, the configuration of interleaved technique and winding-cross-coupled inductors not only reduces the input current ripple and current stress of semiconductor devices but also increases the voltage gain. Further, using voltage-lift technique helps to reach a very high voltage conversion ratio with low turn ratio and proper duty cycle. Since the voltage stress of semiconductor devices is low enough, low on resistance switches and low voltage ultra-fast recovery diodes are used. For this converter, high voltage gain, low conduction losses, low reverse recovery losses, high efficiency, low input current ripple, small volume and reduced cost are provided. Therefore, the proposed converter is a good choice for ultra-high step-up applications. The implemented 100 W laboratory prototype circuit with 18 V input voltage and unity turn ratio of coupled inductors reaches 360 V output voltage and 94.7% efficiency which validates the accuracy of theoretical analysis.

Operation of a Seven-Level T-Type Active Neutral-Point-Clamped Converter With Modified Level-Shifted PWM

This article presents novel control strategies for a seven-level (7L) T-type active neutral-point-clamped (T-ANPC) converter based on the level-shifted pulse width modulation (LS-PWM) technique. Compared with classical 7L topologies, such as NPC, flying capacitor converter, and cascaded H-bridge converter, the 7L T-ANPC converter can reduce the device requirements while reserving the advantages of high redundancy and low conduction losses. Furthermore, the internal switching state redundancy provides freedom to balance the flying capacitor (FC) voltage and realize the fault-tolerant operation flexibly. The control strategy with modified LS-PWM technique is developed for the T-ANPC to obtain desired outputs under normal and switch open fault modes. The proposed control strategy considers the complete balancing of dc-link neutral-point voltage and FC voltages. The feasibility of the proposed 7L T-ANPC and control strategy is evaluated by simulations and experimental tests under steady-state and several typical transient operating conditions.

An any-cell(s)-to-cell(s) equalization method with a single magnetic component for Lithium-ion battery pack

This paper develops a bi-directional active equalization method using an inductor with multiple balancing paths. The new method allows the energy to transfer directly from any cell(s) to any cell(s) which can increase the equalization speed, reduce the energy conversion times and efficiently prevent the batteries from overcharging or undercharging. We adopt the bi-directional switches of low conduction loss for high equalization efficiency. To further improve the battery equalization system performance, the impact factors of the average balancing current which is the main measurement index of the balancing speed are first specifically discussed and the efficiency is also evaluated. The experiments with a four-20Ah Lithium-ion battery string are conducted and the results demonstrate that the developed approach has achieved a good overall performance of equalization.

A topology of coupled inductor DC–DC converter with large conversion ratio and reduced voltage stress on semiconductors

This study presents a high boost DC–DC converter, integrates voltage multiplier cell, voltage lift capacitor, and coupled-inductor techniques to achieve a high-voltage gain. The proposed topology has the capability of extension without utilising any additional winding for a very large voltage conversion ratio. With utilising a passive clamp circuit and without requiring higher duty cycle values, the suggested converter obtains a large conversion ratio, low conduction losses, and reduced voltage stress of semiconductors with a steady value for the whole range of duty cycle. The converter operation principle is discussed and its steady-state operation is analysed in detail. Also, theoretic efficiency calculation and design guidelines of the topology are explained. Then, the proposed DC–DC converter is compared with similar configurations to indicate its advantages. Eventually, the validity of theoretic analysis is verified using experimental measurement results of the implemented prototype with a power rating of 226 W.

A Novel Bridgeless Cuk PFC Converter With Further Reduced Conduction Losses and Simple Circuit Structure

The bridgeless power factor correction (PFC) converter is popular for reducing the conduction losses of semiconductors. In this article, a novel bridgeless Cuk PFC converter is proposed. Compared with the conventional Cuk PFC converter, the number of conducting semiconductors in the proposed bridgeless Cuk PFC converter is reduced, contributing to lower conduction losses. Moreover, the conduction losses in the proposed converter are further improved compared with the pseudototem-pole bridgeless Cuk PFC converter. Meanwhile, the total number of the component in the proposed converter is less than other bridgeless Cuk PFC counterparts, especially for the big-volume magnetic component and electrolytic capacitor. In addition, all power switches in the proposed converter are common ground and can be driven by one control signal, availing simple drivers. The theoretical analysis of the proposed converter is presented in the discontinuous conduction mode with the merits of nature current-sharping ability, zero-current switching in semiconductors, and easy control. Finally, the simulation and a 100-W lab prototype are built to validate the feasibility of the proposed bridgeless Cuk PFC converter.