Logic Memory Research Articles

Nonvolatile Reconfigurable Transistor via Ferroelectrically Induced Current Modulation.

New logic in memory (LiM) architectures, able to unify memory and logic functionalities into a single component, are highly promising for executing self-learning algorithms such as artificial neural networks (ANNs), with lower energy requirements. The multigated reconfigurable field effect transistor (RFET) is a novel type of logic device that can be fully reconfigured at run-time, promising to be a very versatile platform for logic applications. If equipped with a memory element, then it would represent the ideal building block for LiM-enabling hardware with embedded self-learning capabilities. To reach this goal, here we investigate the integration of a ferroelectric Hf0.5Zr0.5O2 (HZO) layer onto dual top gated RFETs. We demonstrate that HZO polarization charges can be successfully employed to tune the height of the two Schottky barriers, influencing the injection behavior and allowing the selection of the majority carriers, thus defining the transistor mode and switching it between a fully p-type transport to a prevalently n-type one. Moreover, we show that the modulation strength is strongly dependent on the height of the pulse used to polarize the ferroelectric domains, allowing for the selection of different current levels. All the different achievable states show a good retention over time, owing to the stability of the HZO polarization. The limitations of the produced devices are discussed, alongside possible mitigation strategies. The presented results demonstrate that ferroelectric HZO can modulate the carrier injection across Schottky barriers in RFET devices. This approach paves the way for the future realization of a fully optimized nonvolatile RFET, an ideal building block for novel LiM hardware, enabling low-power circuits for ANN execution.

Design of Area-Efficient and Low-Power Magnetic Full Adder

Complementary metal oxide semiconductor (CMOS) is an extensively used promising technology for developing integrated circuits, such as memory chips, microprocessors and microcontrollers with high noise immunity. However, deep scaling of CMOS technology ([Formula: see text] [Formula: see text]nm) suffers from various impediments at the device and architectural level, namely high leakage current, increased radiation sensitivity, more die area and dynamic power dissipation. To overcome these limitations of CMOS devices, logic-in-memory (LIM) structures have been developed with spin-based devices like Magnetic Tunnel Junctions (MTJs). MTJs are not affected by external particles and feature zero standby power. The MTJs in magnetic logic circuit and magnetic random-access memory (MRAM) applications are robust against radiation, high speed, low leakage power, nonvolatility and easily compatible with the back end. Existing magnetic full adder (MFA) techniques require augmented circuits for seamless operation. A major drawback in the existing MFA structure is the data loss due to single event upset (SEU) and poor sensitivity of pre-charge sense amplifiers (PCSAs) to input arrival timing. This paper proposes an MTJ-based nonvolatile magnetic full adder (NV-MFA) using 10T logic to address the above issues. The output buffer circuit is designed with a read-write parallel switching (RWPS) writing circuit based on spin orbit torque (SOT). The proposed circuit is more immune to the fault occurrence compared with the existing pass transistor and PCSA-based MFA logic. It leads to reduced power dissipation, die area and delay. Perpendicular anisotropy MTJ (CoFeB/MgO/CoFeB) model is chosen for the MTJ structure. It is suitable for efficient MRAM structure. The transient response is verified on Cadence virtuoso using 45[Formula: see text]nm gpdk CMOS technology. The simulation analysis shows the performance is enhanced with fault-free data output and improved reliability compared with previous MFAs.

Curvature Memory in Electrically Stimulated Lipid Membranes.

We demonstrate, using non-equilibrium molecular dynamics simulations, that lipid membrane capacitance varies with surface charge accumulation linked to membrane shape and curvature changes. Specifically, we show that lipid membranes exhibit a hysteretic response when exposed to oscillatory electric fields. The electromechanical coupling in these membranes leads to hysteretic buckling, in which the membrane can spontaneously buckle in one of two distinct directions along the electric field, even for the same ionic charge accumulation at the water-membrane interface. In this regard, these binary buckled membrane states suggest potential applications in neuromorphic computing. Their bistable nature, characterized by two distinct and stable configurations, could serve as a foundation for implementing memory storage systems and logic operations. Furthermore, we introduce a circuit model that captures these dynamic effects, offering insights into emergent memory effects in electrically stimulated lipid membranes. Finally, this work presents lipid bilayers as dynamic, adaptable elements and suggests a new platform for exploring energy storage, information processing, and memory encoding at the lipid membrane level.

Recent progress in two-dimensional Bi2O2Se and its heterostructures.

Ever since the identification of graphene, research on two-dimensional (2D) materials has garnered significant attention. As a typical layered bismuth oxyselenide, Bi2O2Se has attracted growing interest not only due to its conventional thermoelectricity but also because of the excellent optoelectronic properties found in the 2D limit. Moreover, 2D Bi2O2Se exhibits remarkable properties, including high carrier mobility, air stability, tunable band gap, unique defect characteristics, and favorable mechanical properties. These properties make it a promising candidate for next-generation electronic and optoelectronic devices, such as logic devices, photodetectors, sensors, energy technologies, and memory devices. However, despite significant progress, there are still challenges that must be addressed for widespread commercial use. This review provides an overview of progress in Bi2O2Se research. We start by introducing the crystal structure and physical properties of Bi2O2Se and a compilation of methods for modulating its physical properties is further outlined. Then, a series of methods for synthesizing high-quality 2D Bi2O2Se are summarized and compared. We next focus on the advancements made in the practical applications of Bi2O2Se in the fields of field-effect transistors (FETs), photodetectors, neuromorphic computing and optoelectronic synapses. As heterostructures induce a new degree of freedom to modulate the properties and broaden applications, we especially discuss the heterostructures and corresponding applications of Bi2O2Se integrated with 0D, 1D and 2D materials, providing insights into constructing heterojunctions and enhancing device performance. Finally, the development prospects for Bi2O2Se and future challenges are discussed.

Cryo-SIMPLY: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing.

This paper presents Cryo-SIMPLY, a reliable smart material implication (SIMPLY) operating at cryogenic conditions (77 K). The assessment considers SIMPLY schemes based on spin-transfer torque magnetic random access memory (STT-MRAM) technology with single-barrier magnetic tunnel junction (SMTJ) and double-barrier magnetic tunnel junction (DMTJ). Our study relies on a temperature-aware macrospin-based Verilog-A compact model for MTJ devices and a 65 nm commercial process design kit (PDK) calibrated down to 77 K under silicon measurements. The DMTJ-based SIMPLY demonstrates a significant improvement in read margin at 77 K, overcoming the conventional SIMPLY scheme at room temperature (300 K) by approximately 2.3 X. When implementing logic operations with the SIMPLY scheme operating at 77 K, the DMTJ-based scheme assures energy savings of about 69%, as compared to its SMTJ-based counterpart operating at 77 K. Overall, our results prove that the SIMPLY scheme at cryogenic conditions is a promising solution for reliable and energy-efficient logic-in-memory (LIM) architectures.

Resistive switching behavior of quasi-2D CsPbBr3 memristors: Impact of ambient atmosphere on logic storage and computing integration with anti-crosstalk and reconfiguration features

Passive units integrating storage and computing with anti-crosstalk and multi-logic reconstruction are crucial for high computing power and high-density non-volatile storage. In this study, we report an anti-crosstalk and reconfigurable logic memory based on a single passive quasi-two-dimensional (2D) CsPbBr3 device. The effect of the ambient atmosphere (air and N2 environments) on the resistive behavior of the memristors is explored. In air, these devices exhibit negative differential resistance (NDR) effects and antipolar resistive switching behavior, while in N2, they display irreversible switching from low-resistance state to high-resistance state. Various active electrodes (Ag, Cu, Au, and C) were employed to investigate this phenomenon. It is proposed that in air, O ions interact with surface defects under high alternating voltage, retaining a significant quantity of Br− ions within the quasi-2D CsPbBr3, resulting in capacitive-like behavior. Conversely, in N2, surface defects capture Br− ions, leading to the absence of a hysteresis loop in the I-V characteristic. Under N2 operation, write-once-read-many (WORM) capability is achieved. Surprisingly, operating under air enables integrated non-volatile storage and computing, facilitating 12 reconfigurable logic operations in a passive 1R structure and suppressing sneak current in crosstalk setups. This study emphasizes the pivotal role of air in the resistive switching mechanism and provides novel insights for developing next-generation memories tailored for high-density integrated circuits and storage-computing integration.

Reconfigurable logic-in-memory circuits with ferroelectric nanosheet field-effect transistors

Abstract To accommodate the requirements of small device dimensions and the application of ferroelectric field-effect transistors (FeFETs) in logic-in-memory circuits, we realize the reconfigurable logic-in-memory circuits with ferroelectric nanosheet field-effect transistors (FeNSFETs) through simulation. By evaluating the memory window and logic performances of the devices, it is demonstrated that the key to constructing logical functions are the magnitudes of the drain current at program (PGM) and erase (ERS) state when V G = 0 V. We find that appropriately increasing the number of nanosheets can enhance the current at PGM state, and appropriately increasing the write voltage can decrease the current at ERS state, which are both beneficial for the achievement of reconfigurable circuits. Thus, it is necessary to take into consideration the trade-offs between the process complexity, power consumption, and logical function realization. This work contributes to the prospective design for ferroelectric reconfigurable logic-in-memory circuits.

Investigation of the TaOx unipolar switching memory on high efficiency computing

Memristor has shown great potential application for data storage, neuromorphic computing chip, and memory logic, but its bi-directional operation from setting in positive bias voltage region to resetting in a negative bias voltage region would introduce a complex control circuit. Herein, a memristor with the structure of Au/TaOx/F-doped SnO2 presents unipolar switching behavior, enabling the memristor to operate the set and reset processing in a single voltage direction. By comparison with bipolar switching memristor, using this unipolar switching memristor to operate the logic expression of the letter “D” based on American standard code for information interchange (ASCII) can reduce power consumption by 55.56 % while switching the logic state from “0” to “1” and then back to “0” can save up to 48 % of power consumption. This work provides a feasible method for the low power consumption computing as well as a road to simplify circuit design.

Evolution of Tribotronics: From Fundamental Concepts to Potential Uses.

The intelligent sensing network is one of the key components in the construction of the Internet of Things, and the power supply technology of sensor communication nodes needs to be solved urgently. As a new field combining tribo-potential with semiconductor devices, tribotronics, based on the contact electrification (CE) effect, realizes direct interaction between the external environment and semiconductor devices by combining triboelectric nanogenerator (TENG) and field-effect transistor (FET), further expanding the application prospects of micro/nano energy. In this paper, the research progress of tribotronics is systematically reviewed. Firstly, the mechanism of the CE effect and the working principles of TENG are introduced. Secondly, the regulation theory of tribo-potential on carrier transportation in semiconductor devices and the research status of tribotronic transistors are summarized. Subsequently, the applications of tribotronics in logic circuits and memory devices, smart sensors, and artificial synapses in recent years are demonstrated. Finally, the challenges and development prospects of tribotronics in the future are projected.

On the Energy Behaviors of the Bellman–Ford and Dijkstra Algorithms: A Detailed Empirical Study

The Single-Source Shortest Paths (SSSP) graph problem is a fundamental computation. This study attempted to characterize concretely the energy behaviors of the two primary methods to solve it, the Bellman–Ford and Dijkstra algorithms. The very different interactions of the algorithms with the hardware may have significant implications for energy. The study was motivated by the multidisciplinary nature of the problem. Gaining better insights should help vital applications in many domains. The work used reliable embedded sensors in an HPC-class CPU to collect empirical data for a wide range of sizes for two graph cases: complete as an upper-bound case and moderately dense. The findings confirmed that Dijkstra’s algorithm is drastically more energy efficient, as expected from its decisive time complexity advantage. In terms of power draw, however, Bellman–Ford had an advantage for sizes that fit in the upper parts of the memory hierarchy (up to 2.36 W on average), with a region of near parity in both power draw and total energy budgets. This result correlated with the interaction of lighter logic and graph footprint in memory with the Level 2 cache. It should be significant for applications that rely on solving a lot of small instances since Bellman–Ford is more general and is easier to implement. It also suggests implications for the design and parallelization of the algorithms when efficiency in power draw is in mind.

Effect of tDCS combined with virtual reality for post-stroke cognitive impairment: a randomized controlled trial study protocol

BackgroundPost-stroke cognitive impairment (PSCI) not only increases patient mortality and disability, but also adversely affects motor function and the ability to perform routine daily activities. Current therapeutic approaches for, PSCI lack specificity, primarily relying on and medication and traditional cognitive therapy supplemented by a limited array of tools. Both transcranial direct current stimulation (tDCS) and virtual reality (VR) training have demonstrated efficacy in improving cognitive performance among PSCI patients. Previous findings across various conditions suggest that implementing a therapeutic protocol combining tDCS and VR (tDCS - VR) may yield superior in isolation. Despite this, to our knowledge, no clinical investigation combining tDCS and VR for PSCI rehabilitation has been conducted. Thus, the purpose of this study is to explore the effects of tDCS - VR on PSCI rehabilitation.MethodsThis 4-week, single-center randomized clinical trial protocol will recruit 200 patients who were randomly assigned to one of four groups: Group A (tDCS + VR), Group B (tDCS + sham VR), Group C (sham tDCS + VR), Group D (sham tDCS + sham VR). All four groups will receive conventional cognitive rehabilitation training. The primary outcome measurement utilizes the Mini-Mental State Examination (MMSE). Secondary outcome measures include the Montreal Cognitive Assessment, Frontal Assessment Battery, Clock Drawing Test, Digital Span Test, Logic Memory Test, and Modified Barthel Index. Additionally, S-YYZ-01 apparatus for diagnosis and treating language disorders assesses subjects’ speech function. Pre- and post-four-week intervention assessments are conducted for all outcome measures. Functional near-infrared spectroscopy (fNIRS) is employed to observe changes in oxygenated hemoglobin (HbO), deoxy-hemoglobin (HbR), and total hemoglobin (HbT) in the cerebral cortex.DiscussionOur hypothesis posits that the tDCS - VR therapy, in opposed to individual tDCS or VR interventions, could enhance cognitive function, speech ability and daily living skills in PSCI patients while concurrently augmenting frontal cortical activity. This randomized study aims to provide a robust theoretical foundation supported by scientific evidence for the practical implementation of the tDCS - VR combination as a secure and efficient PSCI rehabilitation approach.Trial registrationChictr.org.cn Identifier: ChiCTR2300070580. Registered on 17th April 2023.

Reconfigurable aJ-Level Ferroelectric Transistor-Based Boolean Logic for Logic-in-Memory.

Logic-in-memory (LIM) architecture holds great potential to break the von Neumann bottleneck. Despite the extensive research on novel devices, challenges persist in developing suitable engineering building blocks for such designs. Herein, we propose a reconfigurable strategy for efficient implementation of Boolean logics based on a hafnium oxide-based ferroelectric field effect transistor (HfO2-based FeFET). The logic results are stored within the device itself (in situ) during the computation process, featuring the key characteristics of LIM. The fast switching speed and low power consumption of a HfO2-based FeFET enable the execution of Boolean logics with an ultralow energy of lower than 8 attojoule (aJ). This represents a significant milestone in achieving aJ-level computing energy consumption. Furthermore, the system demonstrates exceptional reliability with computing endurance exceeding 108 cycles and retention properties exceeding 1000 s. These results highlight the remarkable potential of a FeFET for the realization of high performance beyond the von Neumann LIM computing architectures.

Unraveling the negative charge-to-spin conversion in the Heusler alloy Co2FeSi

Recent discoveries of Heusler alloy achieve a strong advantage of the chemically disordered sample in the charge-to-spin conversion and attracted interests for spintronics applications. Here, we observe the negative charge-to-spin conversion in single magnetic layer of Co2FeSi/MgO and prove generations of σy and σx by spin-torque ferromagnetic resonance (ST-FMR). We also report that the change in charge-to-spin conversion efficiency could be controlled by chemical disordering. Furthermore, the thickness dependents of Co2FeSi demonstrated bulk effect is responsible for the generation of spin current. This study contributes to understanding the mechanisms of spin current generation from magnetic full Heusler alloy and also paves the way for the applications of magnetic memory and nonvolatile spin logic technologies.

Ferroelectricity-controlled magnetic ordering and spin photocurrent in NiCl2/GeS multiferroic heterostructures

Controlling magnetism solely through electrical means is indeed a significant challenge, yet holds great potential for advancing information technology. Herein, our investigation presents a promising avenue for electrically manipulating magnetic ordering within 2D van der Waals NiCl2/GeS heterostructures. These heterostructures, characterized by their unique magnetic-ferroelectric (FE) layer stacking, demonstrate spin-constrained photoelectric memory, enabling low-power electrical writing and non-destructive optical reading. The two orientations of the polarization in the GeS FE layer bring about changes in the ground state configuration, transitioning from ferromagnetic (FM) to antiferromagnetic (AFM) orderings within the NiCl2magnetic layer. Correspondingly, the light-induced charge transfer prompts either spin-polarized or unpolarized currents from the FM or AFM states, serving as distinct '1' or '0' states, and facilitating applications in logic processing and memory devices. This transition stems from the interplay of interfacial charge transfer mechanisms and the influence of the effective electric field (Eeff), bringing a non-volatile electric enhancement in the magnetic anisotropy energy within the NiCl2/GeS heterostructure. Overall, our study highlights the NiCl2/GeS heterostructure as an optimal candidate for realizing spin-dependent photoelectric memory, offering unprecedented opportunities for seamlessly integrating memory processing capabilities into a single device through the utilization of layered multiferroic heterostructures.

Evidence of multifunctional properties of ferromanganite La0.5Ca0.5Mn0.5Fe0.5O3

Synthesis and characterization of the magnetic and electrical properties of the perovskite-type ferro-magnetite La0.5Ca0.5Mn0.5Fe0.5O3 are reported. Structural analysis reveals crystallization of the material in an orthorhombic structure, space group Pbnm (#62). The optical response suggests semiconductor-type behavior with bandgap Eg=2.3 eV. Susceptibility curves as a function of temperature and magnetization as a function of applied field suggest a soft ferromagnetic type response below room temperature, with evidence of disorder characterized by magnetic irreversibility at low temperatures and low applied fields. Resistivity measurements as a function of temperature and corroborate the semiconductor nature of the material and hysteretic I-V curves enhance its applicability in programmable logic memory devices. Band structure calculations around the Fermi level result in two different band gap values for the two spin up and spin down polarizations, as expected in ferromagnetic semiconductor materials. The hybridizations observed in the density of states curves as a function of energy suggest that the ferromagnetic character is due to double exchange mechanisms, coexisting with antiferromagnetic super-exchange, which is essentially due to the disorder of Fe3+ and Mn4+ cations in the octahedra along the three crystallographic axes.

Vortex beam induced spatial modulation of quantum-optical effects in a coherent atomic medium

We have studied two-dimensional absorption, gain, and corresponding refractive index profiles in a ladder-type three-level atomic system interacting with three coherent fields. One is a weak probe field considered as a plane wave, while the other two are the control fields taken as two Laguerre–Gaussian doughnut beams. Position dependence of two vortex beams induces the spatially modulated coherence at the condition of resonance, which enables us to obtain space-dependent absorption, transparency, gain without inversion (GWI), and refractive index enhancement in the present scheme. The azimuthal modulation of coherence effects is attributed to the presence of optical angular momentum of the vortex beams. Under the influence of an additional travelling wave field with the presence of two vortex beams, the present model leads us to obtain an ultra-large enhancement of refractive index at the resonant detuning of the fields. This phenomenon makes the atom-field system to play the equivalent role of a high-refractive-index prism. The role of near dipole–dipole (NDD) interaction on the modulation of position-dependent coherence effects has also been investigated. It has been shown that, without any inclusion of the travelling wave field in the system, the phenomenon of resonant enhancement of refractive index may also occur in the presence of NDD effect. The new way of generating spatially controlled GWI and nonlinear refractive index enhancement is specific to the present model. This work seems to be useful for finding its applications in spatially modulated coherence controlled electromagnetically induced transparency-based quantum devices like quantum optical memory, switches, and quantum logic gates, where the refractive index switching phenomenon is a prerequisite.

Can 2D Semiconductors Be Game-Changers for Nanoelectronics and Photonics?

2D semiconductors have interesting physical and chemical attributes that have led them to become one of the most intensely investigated semiconductor families in recent history. They may play a crucial role in the next technological revolution in electronics as well as optoelectronics or photonics. In this Perspective, we explore the fundamental principles and significant advancements in electronic and photonic devices comprising 2D semiconductors. We focus on strategies aimed at enhancing the performance of conventional devices and exploiting important properties of 2D semiconductors that allow fundamentally interesting device functionalities for future applications. Approaches for the realization of emerging logic transistors and memory devices as well as photovoltaics, photodetectors, electro-optical modulators, and nonlinear optics based on 2D semiconductors are discussed. We also provide a forward-looking perspective on critical remaining challenges and opportunities for basic science and technology level applications of 2D semiconductors.

Recent advances on reliability of FPGAs in a radiation environment

In recent years, SRAM-based Field-Programmable Gate Arrays (FPGAs) have seen a surge in deployment within aerospace applications. Despite their widespread use, these FPGAs, particularly their embedded Static Random Access Memory (SRAM) and user logic, exhibit a notable susceptibility to Single Event Upsets (SEU), a phenomenon leading to erroneous connections or routing discrepancies. This paper presents an exhaustive survey of fault-tolerance methodologies pertinent to SRAM-based FPGAs operating in radiation-intensive environments. Initially, we delineate the architecture of the SRAM-based FPGAs, elucidating the mechanisms underlying SEU occurrences and their subsequent malfunctions. This is followed by a detailed exploration of various strategies employed to assess the resilience of SRAM-based FPGAs against SEU-related disruptions, mainly including the Triple Module Redundancy (TMR) and the configuration scrubbing technology. Collectively, this survey aspires to function as an instructive compendium for engineers and researchers specializing in the development of fault-tolerance mechanisms for SRAM-based FPGAs, particularly in the context of aerospace applications.

Logic-in-memory application of ferroelectric-based WS2-channel field-effect transistors for improved area and energy efficiency

In this study, we applied ferroelectrics to the gate stack of Field Effect Transistors (FETs) with a 2D transition-metal dichalcogenide (TMDC) channel, actively researching for sub-2nm technology node implementation. Subsequently, we analyzed the circuit characteristics of Logic-in-Memory (LiM) operation and utilized LiM features after applying ferroelectrics to achieve a single-device configuration. Based on well-calibrated simulations, we performed compact modeling in a circuit simulator to depict the temperature-dependent electrical characteristics of ferroelectric FETs with a double gate structure and 2D channel (DG 2D-FeFET) in sub-2nm dimensions. Through this, we have confirmed that the 2D FeFET-based LiM technology, designed for the 2 nm technology node, exhibits superior characteristics in terms of delay, power/energy consumption, and circuit area under all temperature conditions, compared to the conventional CMOS technology based on 2D FETs. This verification serves as proof of the future technological potential of 2D-FeFET in extremely scaled-down technology nodes.

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices.

Although the von Neumann architecture-based computing system has been used for a long time, its limitations in data processing, energy consumption, etc. have led to research on various devices and circuit systems suitable for logic-in-memory (LiM) computing applications. In this paper, we analyze the temperature-dependent device and circuit characteristics of the floating gate field effect transistor (FGFET) source drain barrier (SDB) and FGFET central shallow barrier (CSB) identified in previous papers, and their applicability to LiM applications is specifically confirmed. These FGFETs have the advantage of being much more compatible with existing silicon-based complementary metal oxide semiconductor (CMOS) processes compared to devices using new materials such as ferroelectrics for LiM computing. Utilizing the 32 nm technology node, the leading-edge node where the planar metal oxide semiconductor field effect transistor structure is applied, FGFET devices were analyzed in TCAD, and an environment for analyzing circuits in HSPICE was established. To seamlessly connect FGFET-based devices and circuit analyses, compact models of FGFET-SDB and -CSBs were developed and applied to the design of ternary content-addressable memory (TCAM) and full adder (FA) circuits for LiM. In addition, depression and potential for application of FGFET devices to neural networks were analyzed. The temperature-dependent characteristics of the TCAM and FA circuits with FGFETs were analyzed as an indicator of energy and delay time, and the appropriate number of CSBs should be applied.