Load Current Changes Research Articles

An Ultra-Low Power Fast Transient LDO with Dynamic Bias

A low-dropout linear regulator (LDO) without external capacitors is designed, combining ultra-low power consumption and ultra-fast transient response. The common support voltage of the LDO is 2.5 V to 3.6 V with a stable output voltage of 1.2 V and an output current dynamic range of 10 μA to 20 mA to supply power to other circuit modules. A Rail-to-Rail Input-Output (RRIO) Class AB push-pull output amplifier and a dynamic bias circuit are also designed. Meanwhile, a dynamic bias circuit which can regulate the operating current of error amplifier is proposed by monitoring output voltage variation in order to provide a larger compensation current to the operational amplifier when the load current changes are at high frequency and maintain ultra-low operating current at low clock frequency. The LDO is designed without resistors, and the deep well NMOS is applied in the output stage in order to reduce the difficulty of loop compensation. Designed in a 180 nm CMOS process, the post-simulation results show that under the condition of 40 °C and 3 V input voltage, the static power consumption is 31.7 nA with a settling time (±5%) of less than 35 ns.

A low power high area-efficiency NMOS LDO with fast adaptive bias

A low power consumption and fast transient response NMOS low dropout voltage regulator (LDO) with fast adaptive bias is proposed in this work. As a buffer between error amplifier and pass device in LDO, the symmetric flipped voltage follower could ensure stability and speed up the load transient response. In order to obtain better transient response performance and lower power consumption at quiescent state, an adaptive bias is used to generate adaptive current in different proportions, from load current to error amplifier and symmetric flipped voltage follower. The proposed LDO is designed in a 180 nm CMOS process with only 0.005 mm2 active area. Under the condition of typical process corner, the DC loop gain is at least 42.81 dB, and the phase margin ranges between 51.6° and 113.6°. Despite only 2.91μA quiescent current, the LDO with sub-microsecond settling time as low as 1ns at the edge of the load current change has little overshoot/undershoot.

A New Ultra-Fast-Response Low-Transient-Voltage Boost Converter Suitable for Low-Voltage Solar Cells in Wireless Sensor Networks

In this article, a new ultra-fast-response low-transient-voltage boost converter suitable for low-voltage solar cells in wireless sensor networks is presented. The proposed converter not only achieves a faster transient response but also higher power conversion efficiency. With the current-feedback adaptive-controlled technique, the system can operate in the more fixed switching frequency without extra phase-locked-loop circuits. The proposed new rail-to-rail current sensing circuit, which produces the inductor current information to the controlled loop, not only increases the stability of the system but also improves the dynamic response. The addition of a zero-current detector (ZCD) prevents the reverse current as the converter operates at light load, which enhances the conversion efficiency, and ensures that the converter works stably in the discontinuous conduction mode (DCM). The proposed converter has been implemented with TSMC 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$ {\mu }\text{m}$ </tex-math></inline-formula> 1P6M CMOS processes and occupies an area of 1.19 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times1.2$ </tex-math></inline-formula> mm. The measured results show that the transient response is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2 ~{\mu }\text{s}$ </tex-math></inline-formula> when the load current changes between 1 and 200 mA. The peak conversion efficiency is 92.3% under 140-mA load current. The maximum efficiency improvement is 14.8% at 5-mA load current. The major contributions of this article are listed in the following: 1) we proposed a new architecture of boost converters with improved current-feedback and adaptive-controlled techniques; 2) the proposed architecture has one current loop and one voltage loop to balance the output voltage and the output current; 3) the proposed boost converter has the characteristics of fast response time and low transient voltage; 4) we have designed, implemented, and measured the proposed converters; and 5) from the figure of merit (FOM) formula, the performance of the proposed boost converter is better than other recent works.

Is It Correct that the Higher Detection Accuracy of Single-Phase Shunt APF Harmonic Current Detection, the More Effective the Detection?

Is it correct that the higher the detection accuracy of a single-phase shunt active power filter (SPSAPF) harmonic current detection (HCD) is, the more effective the HCD is? To answer the question, an interesting view correction for evaluating an SPSAPF HCD is proposed in this paper. The main points of the proposed view correction are as follows: The answer to the question is Yes when the load current changes periodically but No when the load current changes non-periodically. The proposed view correction also applies to a three-phase shunt active power filter; thus, it has general applicability. Its existence and feasibility are confirmed by experimental results.

A Transient-Enhanced Low-Dropout Regulator in 0.18-μm CMOS Technology

This paper presents a low-dropout voltage regulator (LDO) with a slew-rate enhancement circuit. The proposed slew-rate enhancement circuit was utilized to generate a large current for driving a large pass transistor and quicker charge and discharge of the parasitic capacitance. Hence, the transient response of the LDO was significantly enhanced owing to the improvement in the slew rate at the gate of the pass transistor. The proposed LDO regulator was designed and fabricated using the SMIC 0.18-[Formula: see text]m standard CMOS process, and its core area occupation was only 0.012[Formula: see text]mm2. The measurement results show that the output overshoot/undershoot voltages and settling times of the proposed LDO with SRE are 190[Formula: see text]mV/267[Formula: see text]ns and 174[Formula: see text]mV/233[Formula: see text]ns when the load current changes between 100[Formula: see text][Formula: see text]A and 100[Formula: see text]mA. It has a moderate figure-of-merit (FOM) of 0.267[Formula: see text]ns.

A Fully Integrated Mixed-Mode LDO Regulator with Fast Transient Response Performance

This work presents a fully integrated mixed-mode low-dropout voltage regulator that achieves a fast transient response by utilizing two feedback mechanisms. The first feedback mechanism is the conventional analog regulation that includes an operational amplifier. The second feedback mechanism is based on digitizing any fast change in the output voltage using multiple comparators and subsequently enabling either an NMOS-based or a PMOS-based current DAC. The DAC provides current in opposite polarity to the sharp transient change in load current. As a result, addressing sharp changes in load current is not limited by the gain–bandwidth product of the error amplifier. The LDO was implemented using 180-nm CMOS technology devices. It uses a supply voltage input range of 1.6–2[Formula: see text]V and produces an output voltage of 1.2[Formula: see text]V. In simulations, the LDO regulator achieves 143-[Formula: see text] A quiescent current, [Formula: see text]56-dB PSRR @ 1-kHz noise frequency and an output voltage drop of around 200[Formula: see text]mV for a load current step of 100[Formula: see text]mA. The LDO can provide a maximum load current of 200[Formula: see text]mA.

Digital Low-Dropout Regulator With Voltage-Controlled Oscillator Based Control

A digital low-dropout (DLDO) regulator is described which is controlled by voltage-controlled oscillator (VCO) based feedback loop. There are two VCOs in the control loop whose frequencies are controlled by the output voltage and reference level, respectively. By comparing the phase between the output clocks of the two VCOs and modulating the number of enabled power transistors and their <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -times, the output voltage is regulated. The proposed VCO-based control is a hybrid of digital and analog control schemes because the number of enabled power transistors is controlled in discrete step while the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -time is modulated continuously. In order to improve the transient speed, transient detector is employed in the DLDO regulator. The DLDO regulator with the proposed VCO-based control has been implemented in a 65-nm CMOS process. The DLDO regulator can provide the output from 0.5 to 1.1 V from the input ranging from 0.9 to 1.2 V. The load transient time is smaller than 90 ns for both step-up and step-down changes of load current. The peak current efficiency is 99.3%.

Harmonic Cancellation by Adaptive Notch Filter Based on Discrete Wavelet Packet Transform for an MMCC-STATCOM

This paper presents an adaptive harmonic current extraction scheme using notch filters combined with a modified discrete wavelet-packet transform (DWPT). The scheme is applied to an MMCC-STATCOM for mitigating current harmonics distortion in a power line. The modified DWPT incorporates a data expansion technique to overcome the limitations of boundary effect. It identifies the rms values of the dominant harmonic elements of the non-stationary current in real-time, these being used to update the order and stop-frequency of a notch filter chain. This adaptive notch filter is embedded in the current control system for the MMCC-STATCOM to generate reference current. The results have shown that the modified DWPT tracks harmonic changes faster and more accurately than the conventional method. The technique enables the STATCOM to adapt quickly to load current changes, hence giving accurate elimination of current harmonics in real-time.

Effect of Coupling on Discontinuous Conduction Mode of Coupled Inductor SIDO Boost Converter

A single-input dual-output (SIDO) converter with a coupled inductor is a widely used converter to generate two outputs from a single input. The analysis presented in the literature is for continuous conduction mode, where the converters are operating in heavily loaded conditions. While operating, the load may reduce, leading to the discontinuous conduction mode (DCM) of the converter. A coupled inductor SIDO (CI-SIDO) boost converter is analyzed in this article. As this converter combines two boost converters with a common input and a coupled inductor, the DCM operation of one boost affects the other. Due to coupling, it is found that the body diode of the <small>mosfet</small> turns <small>on</small> in the DCM operation of the CI-SIDO boost converter. This article finds the conditions to turn <small>on</small> body diode and its effect on the average values of the inductor current, diode current, and input current. The article also analyzes the CI-SIDO boost when the body diode is not turned <small>on</small>. This article finds the effect of change in input voltage, load current, and duty ratios on the DCM operation of the CI-SIDO boost. Simulations verify all the obtained conditions in MATLAB/Simulink and experiments using a laboratory prototype. This article is accompanied by a supplementary online document with additional illustrative diagrams and experimental results.

An Improved Low-EMI Fast-Transient-Response Buck Converter Suitable for Wireless Sensor Networks With New Transient Accelerated Techniques

This paper proposed an improved low-electromagnetic-interference (EMI), high-efficiency fast-transient-response buck converter suitable for wireless sensor networks with new transient accelerated techniques. The proposed second-order delta-sigma modulator used the noise-shaping technique and the oversampling theorem to reduce the electromagnetic interference of the output spectrum. And then added the transient acceleration loop to accelerate the transient response also lowers the undershoot and overshoot voltage when the load current changed. The proposed converter has been implemented with TSMC <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> 1P6M process, and the chip area is <inline-formula> <tex-math notation="LaTeX">$1.19 \times 1.19$ </tex-math></inline-formula> mm² (including PADs). The measured results show that when the output voltage is 2 V and the load current changes from 100 mA to 500 mA and from 500 mA to 100 mA, the transient responses are <inline-formula> <tex-math notation="LaTeX">$4 ~\mu \text{s}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$3 ~\mu \text{s}$ </tex-math></inline-formula>, and transient voltages are 18 mV and 30 mV, respectively. Compared to the traditional continuous-time delta-sigma-modulation converter improved <inline-formula> <tex-math notation="LaTeX">$3 ~\mu \text{s}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$7 ~\mu \text{s}$ </tex-math></inline-formula>. The maximum output voltage ripple is 30 mV. The output-to-noise ratio (ONR) is 72.15 dB with the sampling frequency of 10 MHz. When the load current is 100 mA and the output voltage is 2.5 V, the peak efficiency is 90.8&#x0025;.

개선된 전압 변동률을 갖는 다중 루프 저전압강하 레귤레이터

Using the 28 nm complementary metal-oxide semiconductor (CMOS) process, a multi-loop low drop-out voltage (LDO) regulator circuit was designed for use in a wireless power transmission receiver integrated circuit. The LDO regulator uses two differential error amplifiers to provide a stable output voltage to the load with a common source P-channel MOS circuit between the two amplifiers to improve the voltage variation rate (line regulation). The LDO regulator produces an output voltage of 1.2 V from an input voltage range of 1.3∽2.1 V and voltage variation rate of 5.88 mV/V. The output voltage variation rate according to the load current change (load regulation) was 3.3367 mV/mA, and a PSRR of −42 dB was obtained.

A novel robust reset controller implemented through field programmable gate array for oxygen ratio regulation of proton exchange membrane fuel cell

This paper considers the nonlinear proton exchange membrane fuel cell model to precisely describe the system dynamics and presents a robust reset control method for regulating oxygen rate and optimizing the operation of the fuel cell system during fast load variations. The proposed reset law eliminates overshoot, shortens settling time, and thus improves the behavior of the closed-loop system, while achieving these goals is impossible by any linear controller. Due to the ability of field programmable gate array (FPGA) in providing high speed and efficient processing through software as well as near-real-time performance verification, the proposed control method is implemented through FPGA to confirm operational capability and high speed flexibility of controller. The results of the implementation of the proposed method and comparison with the hybrid fuzzy proportional integral derivative method exhibit smooth dynamic response, error reduction in terms of various criteria and better capability in tracking the desired oxygen rate despite the drastic changes in load current.

A push-pull FVF based LDO voltage regulator with slew rate enhancement at the gate of power transistor

A low-dropout (LDO) voltage regulator based on a push-pull flipped voltage follower cell with slew rate improvement at the gate of power transistor is presented. The proposed three-stage regulator exploits two separate signal paths by cross-coupled common-gate cells to improve the transient response and loop stability with low power consumption. Moreover, a slew rate enhancement technique is employed at the gate of power transistor by adding a new current signal path which also improves the small-signal behavior. It is simulated in Cadence with a 90 nm CMOS process, 2.1 μW minimum power dissipation, and 150 mV dropout voltage for 0.9–1.2 V input voltage. It is stable over a range of 40 μA–100 mA load currents and 100 pF load capacitor. The achieved settling time is about 1.2 μs when the load current changes from 40 μA to 100 mA with 200 ns rise time. The obtained line and load regulations are 0.4 mV/V and 6 μV/mA, respectively.

Elaboration of the Calculation Algorithm for the Load Diagram of a Thermoelectric Generator that Applies the Temperature Dependent Thermoelectric Layer Properties

The aim of the work is the development of the algorithm for the working parameters calculation of a marine waste heat thermoelectric generator, where the thermoelectric layer properties are considered as temperature dependent. The marine thermoelectric generator must have an extensive operational profile that includes a number of modes with a different power demand and different magnitudes of the waste heat parameters. The working mode alteration involves the change in the thermoelectric properties. To achieve the goal a mathematical model was offered for a load diagram calculation. The load diagram represents the generator parameters alteration with respect to the load current change. The most important result was the proposed new order of calculation that differs from the present models with offered variables, an approach to constructional thermal resistances application and a specific electrical power implementation. Mean temperature and load factor are taken as variables with the load factor being accepted as a relation between the electrical resistances of a load and a generator. Constructional thermal resistances were combined into two complex parameters – the thermal resistances of a hot and cold sides. The significance of the obtained results is determined by shaping a versatile approach to the generator`s working parameters calculation. The methodology is independent of the scheme of the calculated generator`s thermal resistances, which could be transformed into the complex parameters. The specific power calculation allows defining the performance per a cross-sectional unit area. The optimal selection of variables reduces the computational time.

Analysis on the Method of Enhanced Transient State of DLDO

As an important unit of power management system, traditional analog low-dropout regulator (ALDO) is widely used in System-on-Chip (SoC) design to provide stable and pure power for each sub-circuit block. However, in ultra-low-power design applications, low quiescent current greatly affects the loop gain of ALDO. Digital low-dropout regulator (DLDO) has good low-voltage working ability, process scalability and diversified control schemes, which is more suitable for low-power SoC design. However, a large number of digital circuits with fast switching devices will produce large load current changes, so DLDO needs fast transient response speed to adjust load changes. In recent years, DLDO can be divided into synchronous DLDO and asynchronous DLDO according to different control methods. Among them, the design structure of synchronous DLDO is relatively simple. It depends on an independent global clock, and there is a tradeoff between speed, accuracy and power consumption. When the clock frequency increases, the system needs fast transient response, but the power consumption will increase proportionally, and the current efficiency and loop stability will decrease. Using large output capacitor to deal with load transient is not conducive to improve chip integration. Although asynchronous DLDO can improve the response speed based on the advantages of asynchronous control scheme, the stability of DLDO will face greater risks. Therefore, this paper will introduce several transient response enhancement technologies that do not sacrifice system power consumption, accuracy or stability. It includes adaptive frequency technology and fast response algorithm to improve the transient response speed of synchronous DLDO, event-driven solution and coarse and fine adjustment technology to improve the transient response speed of asynchronous DLDO. On this basis, a typical DLDO structure with excellent performance in the recent 10 years is given.

Failure Region Estimation of Linear Voltage Regulator using Model-based Virtual Sensing and Non-invasive Stability Measurement

Voltage regulator (VR) stability plays an essential role in ensuring maximum power delivery and long-lasting electronic lifespan. Capacitor with a specific equivalent series resistance (ESR) range is typically connected at the VR output terminal to compensate for instability of the VR due to sudden changes in load current. The stability of VR can be measured by analyzing output voltage during load transient tests. However, the optimum ESR range obtained from the ESR tunnel graph in its datasheet can only be characterized by testing a set of data points consisting of ESR and load currents. Characterization process is performed manually by changing the value of ESR and load current for each operating point. However, the inefficient process of estimating the critical value of ESR must be improved given that it requires a large amount of time and expertise. Furthermore, the stability analysis is currently conducted on the basis of the number of oscillation counts of VR output voltage signal. Therefore, a model-based virtual sensing approach that mainly focuses on black-box modeling through system identification method and training neural network on the basis of estimated transfer function coefficients is introduced in this study. The proposed approach is used to estimate the internal model of the VR and reduce the number of data points that need to be acquired. In addition, the VR stability is analyzed using noninvasive stability measurement method, which can measure phase margin from the frequency response of the VR circuit in closed-loop conditions. Results showed that the proposed method reduces the time it takes to produce an ESR tunnel graph by 84% with reasonable accuracy (MSE of 5×10−6, RMSE of 2.24×10−3, MAE of 1×10−3, and R2 of 0.99). Therefore, efficiency and effectiveness of ESR characterization and stability analysis of the VR circuit is improved.

A New Improved Ultra-Fast-Response Low-Transient-Voltage Buck Converter With Transient-Acceleration Loops and V-Cubic Techniques

This paper presents a new improved ultra-fast-response low-transient-voltage buck converter with transient-acceleration loops and V-cubic techniques. Firstly, the proposed buck converter is based on optimum-damping control, so it is necessary to add a slope-compensation circuit to accelerate the transient response and decrease the transient voltage. Secondly, the proposed converter utilized the adaptive on-time controlled and V-cubic techniques to stabilize the switching frequency and promote the conversion efficiency. Thirdly, we utilized a rail-to-rail operational transconductance amplifier, which was used as a current-sensing circuit, to reach the feature of wide input range, so that it can directly sense the voltage without voltage dividing resistors. The rapid transient response and small transient voltage can be obtained when the load current changes. The proposed converter is fabricated with TSMC <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> 1P6M process. The switching frequency is 3 MHz. The total area of the chip is 1.44 mm² (with PADs). The measured results are as follows. When the load current varies between 50 mA and 500 mA, the fastest recovery time is only <inline-formula> <tex-math notation="LaTeX">$1.6 ~\mu \text{s}$ </tex-math></inline-formula>, and the overshoot and undershoot are both 20 mV. The maximum efficiency is 90.1&#x0025;.

Dynamic characteristics of proton exchange membrane fuel cell on a multiple time scale

The current research on the dynamic performance of the proton exchange fuel cell is mostly aimed at the influence of operating parameters on the system, but does not involve with the dynamic characteristics of the cell on a multiple time scale nor the study of the corresponding multiple time scale model. In order to detect the dynamic changes of the proton exchange membrane fuel cell, the effects of various factors in the system on the output performance on different time scales are investigated. The effective partial pressure of oxygen and hydrogen are obtained by the mass diffusion equation and the ideal gas state equation, and the dynamic model is established according to the law of conservation of energy, the law of thermodynamics, and the electrochemical reaction equation. By setting the load mutations with a large/medium/small time scale dynamic duration of 0.6 s, 165 s, and16 min, respectively, the mechanism with which voltage suddenly changes when the load current changes abruptly is studied. Starting from the long time constant during which the dynamic performance takes effect, the control variable is used to analyze the double-layer charge. The influences of layer effect capacitance &lt;i&gt;C&lt;/i&gt;, fuel oxidant delay time constant &lt;i&gt;τ&lt;/i&gt;&lt;sub&gt;e&lt;/sub&gt;, and thermodynamic characteristics (temperature &lt;i&gt;T&lt;/i&gt;) on the dynamic performance ( initial values of variables: &lt;i&gt;C&lt;/i&gt; = 4 F, &lt;i&gt;τ&lt;/i&gt;&lt;sub&gt;e&lt;/sub&gt; = 80 s, and &lt;i&gt;T&lt;/i&gt; = 307.7 K) clarify the action intensities on different time scales. With the help of Matlab/Sumlink platform the simulation results are obtained and the correctness and effectiveness of the built model are verified. The simulation results show that the sudden change in voltage is due to the open circuit voltage and Ohmic polarization resistance, and the Ohmic resistance is dominant (the Ohmic overvoltage change value is 2 V, and the open circuit voltage change is 0.05 V), and the &lt;i&gt;C&lt;/i&gt; pair dynamics on a small time scale (ms). The performance plays a leading role. Specifically, &lt;i&gt;τ&lt;/i&gt;&lt;sub&gt;e&lt;/sub&gt; has a greater effect on the dynamic characteristics on a medium time scale (s), and &lt;i&gt;T&lt;/i&gt; has a stronger effect on a large time scale (10&lt;sup&gt;2&lt;/sup&gt;–10&lt;sup&gt;3&lt;/sup&gt; s). Based on the above deduction, a multi-time scale model of the battery is derived. The research provides the reference and theoretical support for subsequent battery energy management, evaluation of dynamic performance, and precise control.

Voltage stabilization of a controlled autonomous magnetoelectric generator with a magnetic shunt and permanent magnet excitation

The paper presents the results of testing and research of the characteristics of a controlled autonomous magnetoelectric synchronous generator with a magnetic shunt. Structurally, the studied generator is a modified asynchronous machine in which the rotor is made with permanent magnets and an additional system in the form of a magnetic shunt. By adjusting the winding current of the magnetic shunt, the output voltage of the generator is regulated. The following characteristics were investigated: the no-load characteristic during operation with permanent magnets and when the winding current of the magnetic shunt changes with forward and reverse polarity. Also, the external characteristic for active and active-inductive loads; the control characteristic when the load current changes at a constant generator voltage. Analysis of the obtained characteristics makes it possible to determine the limits of regulation of the external characteristic, which is ≈40 % relative to the main magnetic flux. The obtained regulation depth allows maintaining the stability of the external characteristic for power factors not exceeding 0.9, which is the usual passport value for autonomous power plants based on synchronous generators. Comparison of the data of research conducted on the experimental setup shows sufficient convergence for engineering and practical tasks. The maximum quantitative difference is 9.3 %, which suggests the adequacy of the previously developed mathematical model. The control characteristic, constructed experimentally at constant generator voltage, is the control law of the magnetic shunt winding for the studied generator. The investigated version of a synchronous generator with a magnetic shunt should be used for autonomous power plants, renewable energy systems, and autonomous power supply systems.

Air-flow control in fuel cells using delay-based load governor and feedforward augmented dynamic inversion

The frequent and sudden increase of load in electric vehicles depletes oxygen from the fuel cell cathode, leading possibly to oxygen starvation. This paper presents the design of an air flow controller for fuel cell systems (FCS) that aims to replenish the depleted oxygen. A dynamic inversion is used as the feed-forward compensation for the disturbance effect coming from the load current change. However, the inverted dynamics have negative relative degree (improper) and not physically realizable. To make it proper, an augmentation by delay is done, with the same delay added into demand current. The current-dependent time delay introduced in the demand current gives the FCS the opportunity to prepare a sufficient air flow that can withstand the dip in oxygen excess ratio (OER). Besides, the FCS plant is linearized at various operating points, and the dynamic feedforward controller is designed at several operating points with interpolation applied for in-between values. The simulation results show a considerable improvement in the OER response where the constraint is met and the recovery time is reduced.