Linear Phase Detector Research Articles

A 4 GHz ΔΣ Fractional-N Frequency Synthesizer

A 4 GHz ΔΣ fractional-N frequency synthesizer for wireless communications applications is implemented in a 0.35 μm BiCMOS process. The synthesizer achieves a close-in phase noise of −66 dBc/Hz. The key building blocks are an ECL multiple-modulus prescaler employing the phase-switching architecture to minimize the power dissipation, a digital third-order MASH ΔΣ-modulator that controls the modulus of the prescaler, a very linear phase detector that enables the synthesizer to achieve a low close-in phase noise, and a chargepump providing a constant output current over a large output voltage range. The power dissipation of the synthesizer chip is 27.7 mW from a 2.7 V supply.

Linear phase demodulation in photorefractive crystals with nonlocal response

On the basis of the vectorial theory of light diffraction in cubic photorefractive crystals, we derive analytical expressions to describe the output intensities and polarization states of two coherent beams coupled via a dynamic index grating and subjected at the input to a fast phase modulation. It is shown that the linear transformation of fast phase excursions into intensity modulation can be achieved in the case of a nonlocal ac response by means of proper polarization filtering. Theoretical results are supported by the data obtained in experiments with Bi12TiO20 crystals of different orientations. The polarization technique is used for the evaluation of the space-charge fields created in different crystals.

A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector

A 10-Gb/s phase-locked clock and data recovery circuit incorporates an interpolating voltage-controlled oscillator and a half-rate phase detector. The phase detector provides a linear characteristic while retiming and demultiplexing the data with no systematic phase offset. Fabricated in a 0.18-/spl mu/m CMOS technology in an area of 1.1/spl times/0.9 mm/sup 2/, the circuit exhibits an RMS jitter of 1 ps, a peak-to-peak jitter of 14.5 ps in the recovered clock, and a bit-error rate of 1.28/spl times/10/sup -6/, with random data input of length 2/sup 23/-1. The power dissipation is 72 mW from a 2.5-V supply.

A CMOS clock recovery circuit for 2.5-Gb/s NRZ data

This paper describes a phase-locked clock recovery circuit that operates at 2.5 Gb/s in a 0.4-/spl mu/m digital CMOS technology. To achieve a high speed with low power dissipation, a two-stage ring oscillator is introduced that employs an excess phase technique to operate reliably across a wide range. A sample-and-hold phase detector is also described that combines the advantages of linear and nonlinear phase detectors. The recovered clock exhibits an rms jitter of 10.8 ps for a PRBS sequence of length 2/sup 7/-1 and a phase noise of -80 dBc/Hz at a 5-MHz offset. The core circuit dissipates a total power of 33.5 mW from a 3.3-V supply and occupies an area of 0.8/spl times/0.4 mm/sup 2/.

Edge density profile measurements in TdeV using amplitude modulation reflectometry

A single channel AM reflectometer, operating in the frequency range of 33.0⩽f⩽50.0 GHz, has been developed to provide edge electron density profiles on TdeV. The X-mode cut-off layer, covering densities ne⩽1019 m−3 for 1.5 T operation, is used to measure a portion of the plasma edge region 0.9⩽r/a⩽1.2. Briefly, our design consists in launching a microwave beam amplitude modulated at 201 MHz. The reflected wave is detected and downconverted to 1 MHz to facilitate filtering and phase detection. Finally, a linear phase detector compares the phase of the resulting signal (1 MHz) with that of the reference source. The design and construction of the reflectometer will be described and preliminary results presented.

Linear phase detector in the presence of noise

L’article decrit une methode de mesure de la phase qui permet d’obtenir une mesure precise des signaux fortement bruites. Un circuit comportant deux detecteurs lineaires de la phase donnent une precision meilleure qu’un degre.

Phase detector performance in the presence of harmonic distortion

The influence of harmonic distortion on phase errors is investigated. Linear (saw-tooth), triangular and sinusoidal phase detectors are examined. It is shown that these errors are directly related to the harmonic distortion factors of the input signals. The errors are computed for each phase detector.

Phase ranging of mobile vehicles

The performance of a linear phase detector for variable phase in the presence of noise is investigated. Measurements of the total phase (range increase) are possible by employing this phase detector. An algorithm of such measurements is formulated. The Kalman filter is used in the final estimation of the position.

Transfer characteristic of a linear phase detector for variable phase

The performance of a linear phase detector for noisy signals and variable phase is investigated. It is shown both theoretically and experimentally that in this case the range of phase differences, which can be measured without systematic errors, decreases.

The transfer characteristic of a linear phase detector when its input signal-noise ratio is small

Phase detectors having sawtooth-type transfer characteristics are superior in some respects to those having cosine-type transfer characteristics. However, the superiority exists only for large input signal-noise ratios. It is shown that for small SNR, the sawtooth characteristic degenerates into a cosine characteristic.