Stability guarantees are critical for cycle-by-cycle controlled dc-dc converters in high performance applications including microprocessors and LiDAR. Traditional stability analysis on cycle-by-cycle dc-dc converters is incomplete because the inductor current ramps are considered fixed; however, inductor ramps are dependent on the output voltage in large-signal transients, which results in a previously neglected feedback path that often creates instability. We present a new modeling approach together with large-signal stability theory based on a linear fractional transformation of the feedback system. This analysis reveals analytical stability criteria that are straightforward to ensure in practice; the criteria bound sufficient conditions for two practical time constants that are design parameters familiar to power electronics engineers: <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$L/R$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$RC$ </tex-math></inline-formula> time constants of the dc-dc converter. These time constants determine the amount of coupling between the current ramp and the output voltage. Specifically, we perform the analysis, simulation, and hardware verification on a buck converter, but the theory and modeling methods apply to other hard-switching power converters.