Polycrystalline Silicon Layers Research Articles

Phosphorus redistribution in P-doped polycrystalline silicon/tantalum silicide system during high temperature sintering

We studied redistribution of phosphorus between layers of P-doped polycrystalline silicon and TaSi2 during sintering of the silicide at 900 °C. Because of the loss of phosphorus to the silicide, the sheet resistivity of polysilicon layers is increased. We attempted a systematic study of this effect using polysilicon layers of varying thicknesses (from less than 1000 to more than 6000 Å). The experimental results are in excellent agreement with our model which regards the concentrations of phosphorus in both polysilicon and silicide as dilute solutions and assumes that during sintering of the silicide these solutions come to equilibrium. From the equilibrium condition of uniform chemical potential with respect to the solute, we were able to determine the distribution coefficient of P between the two solvents.

Growth of Si on insulators using electron beams

The use of electron beams for melting and recrystallizing polycrystalline silicon layers in silicon-on-insulator structures is described. The formation of single crystal Si films with low angle grain boundaries or of large parallel grains has been achieved, similar to results for other beam and radiant heat source techniques. However, the electron beam approach has been much less thoroughly investigated than other heating sources. The advantages and disadvantages of electron beams, relative to other heat sources, are discussed, as well as the current state of application.

Influence of carbon and hydrogen segregation on the electrical properties of grain boundaries in polycrystalline silicon sheets

In this article the properties of grain and twin boundaries in polycrystalline silicon layers grown by the ribbon-against-drop process are reported; the thermal diffusion of phosphorus, the electrical activity of these defects and their passivation by hydrogen are discussed. Autoradiography experiments did not evidence any significant intergranular diffusion of phosphorus; crossed electron-beam-induced current (or light-beam-induced current) and autoradiography experiments strongly suggest that the recombination at grain and twin boundaries is dominated by impurities. Finally, it is shown that the hydrogen passivation is associated with retarded diffusion and large segregation effects.

Influence of Carbon Addition on the Electrical and Structural Properties of Phosphorus and Boron Doped Silicon Layers

Phosphorus and boron doped polycrystalline silicon layers grown by chemical vapor deposition were additionally doped with carbon via the introduction of in the gas phase. Addition of carbon to n‐type and p‐type polycrystalline silicon gives rise to characteristic differences in resistivity vs. input pressures, at least at small input pressures of . The difference in resistivity can be explained by a donor activity of carbon or silicon‐carbon complexes or by an asymmetrical energy distribution of grain boundary traps, both at the grain boundaries. It is also shown that the addition of carbon has a strong influence on the morphology of the growing silicon layer. With increasing values of , the size of the grains in the layer decreases, under certain circumstances even amorphous silicon is formed, and this effect is stronger at the lowest temperatures. The decomposition kinetics of has also been discussed. It is concluded that at high input pressures of the deposition rate of carbon is gas phase diffusion controlled. At lower values and temperatures above 850°C, the formation of Si‐C nuclei is rate‐limiting as far as the introduction of carbon is concerned.

Raman microprobe study of recrystallization in ion-implanted and laser-annealed polycrystalline silicon

Implantation-amorphized polycrystalline silicon layers which are directly deposited on single-crystal Si are annealed by a scanning cw laser. The crystallinity of the annealed layers has been examined by a Raman microprobe in combination with polarization measurements. The Raman spectra measured for the specimens annealed at various power levels reveal that the polysilicon layer is regrown liquid epitaxially and is transformed into single crystal at high annealing power levels and that the regrowth at lower power levels is governed by the mixture of solid and liquid epitaxial processes. It is found that for specimens annealed at high power levels the tensile stress in the annealed layer is relaxed to a certain extent, though the weak residual strain still remains. The Raman microprobe spectra from the boundary reigon between the annealed and amorphous layers are recorded by making the probe laser beam traverse the boundary region. This technique enables us to investigate the variation in crystallinity and the regrowth process in the boundary zone which is found to be less than 10 μm width.

Phosphorus distribution in TaSi2 films by diffusion from a polycrystalline silicon layer

Secondary ion mass spectroscopy was used to measure phosphorus concentration profiles in TaSi2 thin films deposited on P doped polycrystalline Si/SiO2/Si wafers by cosputtering. Fast redistribution of P in TaSi2 takes place by its up-diffusion from the polycrystalline Si layer. Radioactive assay of 32P obtained by neutron activation confirmed the fast-diffusion character of P in TaSi2. From preliminary results the temperature dependence of the diffusion coefficients over the temperature range of 664 °C-913 °C can be expressed by the following relations: Dc=6.44×10−10 exp[−0.61/(kT)] and Da=2.0×10−8 exp[−0.76/(kT)], where Dc and Da represent diffusion in the silicide film near and away from the surface, respectively.

Incoherent light annealing of phosphorus-doped polycrystalline silicon

The use of intense incoherent light to anneal chemical vapour deposited polycrystalline silicon layers heavily doped with phosphorus is reported. Pulse duration of 4 to 20 s and light power density ensuring sample heating up to the temperatures of 900 to 1100 °C are employed. An order reduction in the resistivity of the polycrystalline layers while grain size and carrier mobility remain practically unchanged is achieved by light annealing. The results are compared to furnace annealing data at the same temperatures. Diffusion of segregated at grain boundaries phosphorus atoms into crystallites is supposed to be responsible for lowering the resistivity. [Russian Text Ignored].

Comparison of Pulsed Laser and Furnace Annealing of Nitrogen Implanted Silicon

ABSTRACTFormation of buried insulating layers and redistribution of impurities during annealing are important processes in new semiconductor device technologies. We have studied pulsed ruby laser and furnace annealing of high dose (D>1017 N/cm2) 50 KeV nitrogen implanted silicon. Using He Back scattering and channeling, X-ray diffraction, transmission electron microscopy, and infrared transmission spectroscopy, we have compared liquid and solid phase regrowth, diffusion, impurity segregation and nitride formation. As has been previously reported, during furnace annealing at or above 1200C nitrogen redistributes and forms a polycrystalline silicon nitride (Si3N4 ) layer. [1–4] In contrast, pulsed laser annealing produces a buried amorphous silicon nitride layer filled with voids or bubbles below a layer of polycrystalline silicon.

4377605 Method for forming an insulating layer on a polycrystalline silicon layer of a semiconductor device usng a two-step thermal oxidation technique

When an insulating layer is formed on a polycrystalline silicon layer by thermally oxidizing the polycrystalline silicon layer, ambient gas to be used as an oxidizing gas comprises an oxygen gas and an inert gas. It is preferable that the ratio of oxygen partial pressure of the ambient gas is up to 0.35.

TEM AND EBIC INVESTIGATIONS OF POLYCRYSTALLINE SILICON SHEETS GROWN BY THE RAD GROWTH PROCESS

This article reports on results of observations by transmission electron microscopy (TEM) of electrically active (and inactive) grain boundaries in polycrystalline silicon layers grown by the RAD growth process. In samples taken after a pulling length of several meters, the grain boundaries (GB's) are not characterized by exact twin relationships. Precipitates are present in GB's near the free surface.

Grain‐Growth Mechanisms in Polysilicon

The electrical characteristics of polycrystalline silicon layers are closely related to their grain structure. This paper describes a comprehensive study of the grain growth of polysilicon under a wide range of doping and processing conditions. A grain‐growth model has been developed and implemented in the SUPREM process simulator, and the simulated results are compared to those obtained by transmission electron microscopy for As‐, P‐ and B‐doped polysilicon. These results indicate that n‐type dopants increase the growth rate whereas the p‐type dopant has a negligible effect.

Extended cyclability in electrically-alterable read-only-memories

An electrically-alterable read-only-memory using silicon dioxide and silicon-rich silicon dioxide layers capable of being cycled ≳ 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> times by minimizing electron charge trapping in the SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> layers of the device by incorporation of small amounts of silicon is reported for the first time. Charge transfer to and from a floating polycrystalline silicon layer from a control gate electrode is accomplished by means of a modified dual-electron-injector-structure stack. This modified stack has the intervening silicon dioxide layer, which is sandwiched between silicon-rich silicon dioxide injectors, replaced by a slightly off-stoichiometric oxide containing between 1% and 6% excess atomic silicon above the normal 33% found in silicon dioxide. A brief discussion of a physical model which is believed to account for the observed phenomenon is given.

Conductivity enhancement in laser-recrystallized polycrystalline silicon-on-insulator using molecular hydrogen annealing

It is found experimentally that a thermal anneal in molecular hydrogen at 450 °C reduces the sheet resistance of a laser-recrystallized polycrystalline silicon layer supported by a silicon dioxide layer. This effect can be reversed by annealing the polycrystalline silicon in nitrogen. The observed electrical characteristics of the polycrystalline silicon are similar to those treated with an atomic hydrogen plasma where grain-boundary potential barrier lowering is believed to be responsible for the reduction in the resistivity.

Optical properties of phosphorus-doped polycrystalline silicon layers

The index of refraction and the absorption coefficient of low-pressure chemical vapor deposited polycrystalline silicon (poly Si) implanted with various doses of phosphorus were obtained by means of transmittance and reflectance measurements. The refractive index of poly Si is relatively insensitive to doping in the visible region of the spectrum and agrees quite well with published values for single-crystal Si. The absorption coefficient of these films decreases with doping in the visible. Nevertheless, the absorption coefficient corresponding to the highest-doped film (N≊3×1020/cm3) is almost twice the published values for lightly doped single-crystal Si. In the infrared, the index of refraction decreases systematically and the absorption coefficient increases systematically with doping. This dependence of the optical parameters on doping is attributed to the presence of free carriers. A free-carrier dispersion/absorption model is applied to the measured refractive index in the region 1.2–1.8 μm and to the reflectance measurements in the region 2.5–7.5 μm. The model gives carrier concentrations for the two types of measurements which differ by 50%. Possible explanations for this difference are discussed. The carrier concentrations and mobilities obtained from optical and Hall-effect measurements are compared.

Single Crystal Silicon‐on‐Oxide by a Scanning CW Laser Induced Lateral Seeding Process

A 1 μm thick layer of silicon dioxide is grown on selected areas of a {100} silicon wafer such that the resulting silicon dioxide surface is coplanar with the surface of the silicon wafer. A 0.5 μm thick layer of polycrystalline silicon is deposited onto the silicon wafer using a low pressure CVD process. By scanning a focused CW argon laser beam onto the area where the polycrystalline silicon is deposited directly on the exposed silicon substrate, the polycrystalline silicon is converted into an epitaxial layer by a liquid phase process. By scanning the laser beam from the epitaxial region to the region where the polycrystalline silicon is deposited on the silicon dioxide layer, the polycrystalline silicon is converted into a single crystal through a zone melting process, where the previously formed epitaxial layer is used as the seed. This process is named “lateral seeding.” It is found that the resulting area of the single crystal on the silicon dioxide layer is dependent on the temperature of the substrate and the crystallographic direction of the edges of the oxide layer. The best results are obtained with a high substrate temperature and with the edges of the oxide layers aligned along a <100> direction. Single crystal regions that extended as much as 80 μm from the epitaxial seed region onto the silicon dioxide region have been obtained. It is inferred from the experimental results that a line‐shaped beam with a flat intensity profile is preferred for improved lateral seeding results.

Electrically-alterable read-only-memory using Si-rich SiO2 injectors and a floating polycrystalline silicon storage layer

Currently, electrically-alterable read-only-memory (EAROM) has become increasingly important for memory and logic operations. A novel EAROM device in a field-effect transistor (FET) configuration, which uses a floating polycrystalline silicon (poly-Si) layer on top of thermal SiO2 and a dual electron injector structure (DEIS) between this floating poly-Si and a control gate poly-Si contact, is described. The DEIS stack consists of sequentially chemically vapor deposited (CVD) layers of Si-rich SiO2 (46% atomic Si), SiO2, and Si-rich SiO2 (46% atomic Si) between the poly-Si layers. Electrons from either poly-Si layer can move to the other poly-Si layer biased at the higher voltage with moderate applied voltages. Thus, the floating poly-Si storage layer can be charged with electrons (’’write’’ operation) or with positive charge (’’erase’’ operation) in milliseconds with negative and positive control gate voltages, respectively. The average electric fields in the intervening CVD SiO2 layer during writing and erasing are 5–6 MV /cm and 4–5 MV/cm, respectively, and voltages from ±10 V to ±40 V can be used depending on the device configuration. The enhanced electron injection in these devices is believed to be controlled by localized electric field distortion at the Si-rich SiO2-SiO2 interface caused by the two phase (Si and SiO2) nature of the Si-rich SiO2. The electrical asymmetry of the DEIS is believed to be due to differences in the interfaces of the bottom and top Si-rich SiO2 injectors with the intervening SiO2 layer. At the low voltages used for the ’’read’’ operation in which the charge state of the floating poly-Si layer is sensed by the FET drain current, no read perturb effects are observed. These structures also show excellent charge retention at low voltages, characteristic of a floating poly-Si storage layer surrounded by SiO2. This excellent retention is due to a characteristic of the Si-rich SiO2 in which it builds up a reversible space-charge layer which collapses the field at the interface with the poly-Si layers and minimizes charge loss or further injection. This field screening phenomenon of the Si-rich SiO2 layers also prevents low-voltage breakdowns (which are believed to be due to irregularities in the field at the cathode) from occurring. These DEIS EAROMs operate at lower power due to the small injected SiO2 currents involved and low applied voltages compared to most commercially available devices which use Si junction avalanche injection which requires large Si currents to charge the floating poly-Si storage layer. These devices are capable of being cycled at least 104 times before pronounced threshold-voltage window collapse due to trapped electron space-charge buildup in the intervening CVD SiO2 layer.

The Nucleation of CVD Silicon on SiO2 and Si3 N 4 Substrates: III . The System at Low Temperatures

The growth of polycrystalline silicon layers on and substrates can be hampered in the early stages of growth by the presence of different species adsorbed on the surface. In this article nucleation experiments with silicon on and are described in the system at temperatures between 600° and 900°C. In this temperature regime (and without addition) the saturation nucleus density of silicon clusters on substrates shows a decrease in density with decreasing temperature, whereas on substrates the opposite occurs. Experiments with nitrogen as a carrier gas, however, give almost the same saturation nucleus densities of silicon clusters on and substrates. Additions of to the system produce a decrease in the nucleus saturation density on and substrates, and the density also decreases with decreasing temperatures below 900°C. It is further shown that selective growth of silicon on partly coated silicon substrates becomes more difficult at lower growth temperatures. Adsorption of different surface species (H, Cl, , and ) on and substrates is discussed and it is concluded that a strong adsorption of atomic hydrogen, notably on surfaces, may explain the difference in nucleus densities on and substrates at temperatures below 900°C.

MOSFETs in laser-recrystallized poly-silicon on quartz

MOSFETs have been fabricated in layers of laser-recrystallized poly-crystalline silicon on bulk, amorphous, fused quartz substrates, with the silicon film formed into device islands either before or after laser recrystallization. Field-effect mobilities as high as 320 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V-sec have been obtained. The recrystallization is influenced by the different light absorption in the transparent substrate and in the absorbing silicon film.

MOS device fabrication using sputter-deposited gate oxide and polycrystalline silicon layers

For applications in the MOS device fabrication the interface properties of sputtered SiO 2 and SiO 2-polycrystalline silicon layers on silicon substrates were investigated and improved to a quality which is equivalent to those of thermally grown SiO 2 with pyrolytical polycrystalline silicon (polySi). For testing these layers as gate oxide and Si electrodes of MOS transistors the well known Si gate process was varied to include sputter deposition and the optimal deposition, annealing and diffusion parameters were integrated. MOS transistors with sputtered SiO 2 and Si gate material layers and for comparison Al gate devices with sputtered SiO 2 have been fabricated and their threshold voltage behavior was tested.

Oxidation of tantalum disilicide on polycrystalline silicon

Oxidation characteristics of the tantalum disilicide films have been investigated in the temperature range of 900°–1050 °C in dry oxygen and steam ambients. The silicide does not oxidize in dry oxygen and oxidizes in steam at a rate lower than that of doped polycrystalline silicon films as long as there is a polycrystalline silicon layer between the silicide and the gate oxide. Under these circumstances, the silicide retains its electrical and mechanical characteristics. The oxide on the silicide has an etch rate (in buffered hydrofluoric acid) similar to that of thermal SiO2 on silicon. Electrical characteristics of the oxide appear to be similar to those of the wet oxide on polycrystalline silicon. In the absence of polycrystalline silicon, between the silicide and the gate oxide, oxidation leads to a loss in the conductivity of the silicide and eventually to a mechanical instability of the film. An oxidation mechanism, which assumes silicon diffusion by substitution through the silicide, has been proposed.