Lateral Solid Phase Epitaxial Growth Research Articles

Solid-phase epitaxy of undoped amorphous silicon by in-situ postannealing

The solid phase epitaxy (SPE) of undoped amorphous Si (a-Si) deposited on SiO2 patterned Si(001) wafers by reduced pressure chemical vapor deposition (RPCVD) using a H2–Si2H6 gas system was investigated. The SPE was performed by applying in-situ postannealing directly after deposition process. By transmission electron microscopy (TEM) and scanning electron microscopy, we studied the lateral SPE (L-SPE) length on sidewall and mask for various postannealing times, temperatures and a-Si thicknesses. We observed an increase in L-SPE growth for longer postannealing times, temperatures and larger Si thicknesses on mask. TEM defect studies revealed that by SPE crystallized epi-Si exhibits a higher defect density on the mask than at the inside of the mask window. By introducing SiO2-cap on the sample with 180nm Si thickness following postannealing at 570°C for 5 h, the crystallization of up to 450nm epi-Si from a-Si is achieved. We demonstrated the possibility to use this technique for SiGe:C heterojunction bipolar transistor (HBT) base layer stack to crystallize Si-buffer layer to widen the monocrystalline region around the bipolar window and to improve base link resistivity of the HBT.

Solid-phase epitaxy of amorphous silicon films by in situ postannealing using RPCVD

Solid-phase epitaxy (SPE) of in situ As-doped amorphous Si (a-Si) deposited on SiO 2/Si 3N 4 patterned Si (1 0 0) wafers by reduced pressure chemical vapour deposition (RPCVD) using a H 2–Si 2H 6 gas system was investigated. The SPE was performed by applying in situ postannealing directly after deposition process. On the one hand, we studied the lateral SPE (L-SPE) length of As-doped Si on mask and their crystal quality by TEM/SEM characterisation for various postannealing temperatures (700–1000 °C for 60 s). We observed increase in L-SPE growth and decrease of dislocation density for higher postannealing temperatures. On the other hand, L-SPE length was also investigated for different postannealing times (0–120 min at 575 °C) and As concentrations. At these conditions the L-SPE length has increased with increasing postannealing time. For both, higher and lower annealing temperature region, crystallization has been inhibited for higher As concentrations. After modifying As-doping level, we were able to crystallize up to 500 nm of a-Si on mask to epi-Si by combination of 575 °C and 1000 °C postannealing.

Influence of Initial Amorphous Layer Deposition Temperature on Lateral solid-Phase Epitaxy of Silicon

The influence of deposition temperature (Td) of initial amorphous layer on the lateral solid-phase epitaxy (L-SPE) of silicon was investigated in a wide deposition temperature range between -20°C and 405°C. Nomarski optical microscopy, scanning electron microscopy (SEM), cross-sectional transmission microscopy (TEM) and microprobe reflection high-energy electron diffraction (µ-RHEED) techniques were used. A hitherto unnoticed markedly strong correlation was found between Td and L-SPE growth where the lowest deposition temperature of Td=-20°C gave the highest growth rate and best film quality. Detailed SEM and TEM observation of amorphous Si (a-Si) films revealed that there were many vertical pores threading through a-Si films. A new L-SPE growth model explaining Td-dependent growth rate was proposed in terms of growth delay induced by the vertical pores. Low-temperature deposition of initial amorphous layers was shown to be an effective way of achieving high-quality films in a short time.

Thin Single Crystal Silicon on Oxide by Lateral Solid Phase Epitaxy of Amorphous Silicon and Silicon Germanium

ABSTRACTThe fabrication of 250 Å thick, undoped, single crystal silicon on insulator by lateral solid phase epitaxial growth from amorphous silicon on oxide patterned (001) silicon substrates is reported. Amorphous silicon was grown by low pressure chemical vapor deposition at 525°C using disilane. Annealing at temperatures between 540 and 570°C is used to accomplish the lateral epitaxial growth. The process makes use of a Si/Si1-xGex/Si stacked structure and selective etching. The thin Si1-xGex etch stop layer (x=0.2) is deposited in the amorphous phase and crystallized simultaneously with the Si layers. The lateral growth distance of the epitaxial region was 2.5 μm from the substrate seed window. This represents a final lateral to vertical aspect ratio of 100:1 for the single crystal silicon over oxide regions after selective etching of the top sacrificial Si layer. The effects of Ge incorporation on the lateral epitaxial growth process are also discussed. The lateral epitaxial growth rate of 20% Ge alloys is enhanced by roughly a factor of three compared to the rate of Si films at an anneal temperature of 555°C. Increased random nucleation rates associated with Ge alloy films are shown to be an important consideration when employing Si1-xGex to enhance lateral growth or as an etch stop layer.

Selective solid phase crystallization for control of grain size and location in Ge thin films on silicon dioxide

Selective solid phase crystallization for control of grain size and location in polycrystalline thin Ge films on amorphous silicon dioxide substrates is described. The approach consists of solid phase crystal nucleation at predefined nucleation sites, which consist of metal islands deposited on top of the amorphous Ge film, followed by lateral solid phase epitaxial growth. Grain sizes as large as 30 μm have been achieved in 50-nm-thick Ge films at temperatures less than 475 °C.

Experimental study of electromigration at bamboo grain boundaries with a new test structure using the single-crystal aluminum interconnection

Electromigration (EM) voids in the bamboo structure interconnect were observed by a new test structure with single-crystal aluminum leads. The new test structure consists of a single grain connected to single-crystal aluminum leads formed by lateral-solid phase epitaxial growth (L-SPE). The grain was formed by suppressing L-SPE of the single-crystal aluminum leads. Since the void nucleation sites were confined to the grain boundaries, the voids were easily located and observed. In addition, the crystal orientation of single-crystal aluminum leads could be controlled by L-SPE, and so the analysis could be performed more accurately than using traditional test structures that have a series of grains with random crystal orientation. The accelerated EM test was carried out under ideal conditions similar to that of real devices, because the temperature gradients around the test site of the bamboo grain boundaries were negligible. In our preliminary experiment, a void was observed in the grain, located next to the positive voltage lead. This seems to be contradictory to general understandings, we think this is because of the grain boundary configuration difference and/or EM induced vacancy fluxes difference.

Controlled Grain Size and Location in GE Thin Films on Silicon Dioxide by Low Temperature Selective Solid Phase Crystallization

AbstractSelective solid phase crystallization for control of grain size and location in polycrystalline thin Ge films on amorphous silicon dioxide substrates is described. The approach consists of selective solid phase crystal nucleation via an alloy reaction at predefined nucleation sites, which consist of metal islands deposited on top of the amorphous Ge film, followed by lateral solid phase epitaxial growth. Grain sizes as large as 30 μm have been achieved in 50 nm thick Ge films at temperatures less than 475 °C.

Stress-Induced Anomalous Growth in Lateral Solid-Phase Epitaxy of Ge-Incorporated Si Films

Lateral solid-phase epitaxy (LSPE) characteristics of Ge-incorporated amorphous Si films which are deposited on SiO2/Si (100) structures with [010] seed openings are investigated. It has been found in P-doped amorphous Si films that the LSPE growth rate at 600° C is enhanced about sixfold by incorporation of 0.5 at.% Ge atoms, and that the maximum growth length is about 21 µ m. It has also been found that the growth in the film with 1 at.% Ge atoms stops for a few hours upon annealing at temperatures lower than 600° C at a length of about 2 µ m from the seed edge and it proceeds again as annealing time is extended. To clarify the origin of the anomalous growth rate, the residual stress in the films has been measured using microprobe Raman spectrometry, and it is concluded that the origin of the enhanced growth is the residual stress in the films. Finally, it is suggested that the Ge-incorporated stress effect may be explained by the critical thickness theory in pseudomorphic growth of Si1-x Gex films on Si substrates.

Lateral Solid Phase Epitaxy of Amorphous Si Films under Ultrahigh Pressure

The effect of hydrostatic pressure on the lateral solid phase epitaxy (L-SPE) of amorphous Si (a-Si) films has been investigated. It has been found from the annealing experiment under ultrahigh pressure up to 2 GPa (20 kbar) that both the L-SPE growth rate and the nucleation rate of polycrystalline grains are increased with increase in pressure, when uncoated a-Si films are used. It has also been found that the nucleation rate is decreased and a greater L-SPE length can be achieved when a-Si films are coated with SiO2 films prior to L-SPE.

Selective Surface Doping Method of P Atoms in Lateral Solid Phase Epitaxy and Its Applications to Device Fabrication

Growth characteristics and device application of the selective surface doping method in lateral solid phase epitaxy (L-SPE) are presented. In this method, P atoms are incorporated near the surface of amorphous Si (a-Si) films to enhance the L-SPE growth and the underlying undoped layers are used for device fabrication. First, the growth characteristics are investigated by changing thicknesses of the a-Si film and the P-doped layer, and a quantitative model to explain the experimental results is presented. Then, it is shown that redistribution of the P atoms during L-SPE annealing is negligibly small, and the P-doped layer is selectively etched by combination of a wet chemical etchant and subsequent reactive ion etching. Finally, metal-oxide-semiconductor field-effect transistors (MOSFETs) with upper and lower gate electrodes are fabricated in the undoped layer and the electrical properties of both the upper and lower channel FETs are investigated.

TEM analysis of voids in UHV-deposited amorphous Si layers used for lateral solid phase epitaxial growth

The characteristic shape of voids in UHV-deposited amorphous Si layers is investigated by TEM analysis. This shape is determined by the deposition temperature and by subsequent UHV annealing leading to densified layers. Amorphous layers with voids shaped as isolated holes can be converted to monocrystalline layers having also isolated holes. The as-deposited amorphous layers appear to be under tensile stress, which increases after UHV annealing. To explain the cracks observed in undensified layers with vertical pores it has to be assumed that the crack resistance is lowest in that case. A way to eliminate defects and cracks in Si layers made by lateral solid phase epitaxial growth is suggested.

Quasi in situ observation of Si lateral solid phase epitaxy

A quasi in situ observation of Si lateral solid phase epitaxy (L-SPE) has been carried out by an anneal-and-observe technique using a transmission electron microscope (TEM). For this observation, 3 mm Ø Si discs, which were thinned physically and chemically, were cut from a non-heated sample which had been prepared by depositing an amorphous Si (a-Si) film on the patterned amorphous insulator substrate. For the L-SPE growth, the thin specimens were heated in a furnace. The same areas of the same sample were repeatedly observed after an additional heating process at each interval. The direct origin of the (111) facet formation during the L-SPE growth has been precisely revealed by this method. Polygrains due to the random nucleation from the a-Si/a-insulator interface have been found to obstruct further L-SPE growth, while the L-SPE growth continued in the adjacent polygrain-free regions. As a result of this non-uniform growth rate, the (111) facets which nucleated at the polygrains grew into V-shaped valleys and finally caused a zig-zag growth front.

Retardation and Enhancement in Lateral Solid Phase Epitaxy of Si on SiO2 by MeV Electron Beam Irradiation

ABSTRACTWe have demonstrated the high energy (MeV) electron beam irradiation effects on lateral solid phase epitaxy (L-SPE) of Si-on-insulator (SOI). Thinned samples were set on a hot stage in a 2 MeV electron microscope and L-SPE growth under 2 MeV electron irradiation conditions was monitored in-situ by using the same microscope. L-SPE growth rate for the irradiation dose of 1021 cm−2 was enhanced by about 1.5 times greater than that under unirradiated condition. For electron beam irradiation doses higher than about 1023 cm−2, L-SPE growth was suppressed. Displacement of Si atoms, contamination effect and ionization effect are discussed as causes for the growth rate retardation and enhancement of L-SPE by electron beam irradiation.

Effect of SiN x coating in lateral solid phase epitaxy of implanted amorphous Si films

The effect of a SiN x coating was investigated in lateral solid phase epitaxy (L-SPE) of implanted amorphous Si (a-Si) films. It was found that the L-SPE growth rate decreased with increasing thickness of the SiN x film. The internal stress of a-Si films derived from the change of the growth rate was on the order of 5 × 10 9 dyn/cm 2. A model to explain these phenomena is presented.

Mechanism of dislocation formation during vertical solid phase epitaxy

In order to improve Si crystal on insulator (SOI) by lateral solid phase epitaxy (L-SPE), the crystallinity of vertical SPE (V-SPE) region as the initial step for L-SPE growth has been investigated using high resolution cross-sectional transmission electron microscopy (HR-XTEM). The cleaning process using Si 2H 6 as a reducer at 850°C caused vertical dislocations in the V-SPE region, due to insufficient removal of native oxide in the seed area. The mechanism of dislocation formation has turned out to be an incoherent merging of crystalline fronts on top of oxide islands after nucleation at the partially cleaned area of the seed region and subsequent climbing up the oxide islands.

Present status of solid phase epitaxy of vacuum-deposited silicon

Results of recent studies of solid phase epitaxy (SPE) of amorphous Si films deposited in ultra-high vacuum are reviewed, including experimental aspects of conducting and investigation of SPE growth, SPE kinetics in intrinsic and doped Si films, application of SPE technique for growing highly-doped epitaxial layers with sharp profiles, and lateral SPE growth over oxide.

Influence of SiO 2 cap layers on lateral solid-phase epitaxy of implanted amorphous Si films

Characteristics of the lateral solid-phase epitaxial (L-SPE) growth of undoped and P-doped amorphous Si (a-Si) films were investigated, in which the a-Si films were covered with SiO 2 cap layeres with thicknesses from 200 nm to 1.8 μm. The Si films were deposited at room temperature in the amorphous state, or they were deposited at elevated temperatures in the polycrystalline state and subsequently amorphized by Si + ion implantation. It was found that L-SPE growth characteristics of a-Si films, such as the saturation L-SPE growth rate, the random polycrystallization time, and the L-SPE growth length from the seed region, were essentially unchanged even in the samples with the SiO 2 cap layers up to 1.8 μm thick, although the fluctuation of such parameters as the polycrystallization time and the initial delay time of L-SPE growth were relatively large particularly in the room-temperature-deposited a-Si films. It is concluded from these results that the L-SPE growth technique is useful for simultaneous growth of multilayered a-Si films separated by SiO 2 layers, which is important in fabrication of the future highly stacked 3-dimensional integrated circuits.

Lateral solid phase epitaxy of amorphous Si films by selective surface doping method of P atoms

Lateral solid phase epitaxy (L-SPE) of amorphous Si (a-Si) films by a selective surface doping method of P atoms was investigated, in which P atoms were doped only in the surface layers of a-Si films. It was found that the L-SPE growth rate and the growth length from the seed region were changed by thickness of the P-doped layer, but they weakly depended on the thickness of the a-Si film. It was also found from cross-sectional transmission electron microscopy that the growth front of L-SPE in the surface P-doped sample was composed of a single facet. In order to explain these experimental results, a L-SPE growth model in the surface P-doped sample is proposed.

Influence of Si film thickness on growth enhancement in Si lateral solid phase epitaxy

Lateral solid phase epitaxial growth (L-SPE) of Si on SiO2 film was investigated as a function of deposited amorphous Si (a-Si) film thickness. Both the L-SPE rate and the annealing time necessary for {111} facet formation increased with film thickness. As a result, a large L-SPE length (9 μm) under {110} facet growth was obtained for a 1.6-μm-thick film sample. Above the critical film thickness (>2 μm), crack formation in a-Si films was observed during deposition. This indicates that intrinsic stresses play an important role in this growth enhancement.

Characterization of roughness and defects at an Si/SiO2 interface formed by lateral solid phase epitaxy using high-resolution electron microscopy

Using high-resolution transmission electron microscopy, we have characterized on an atomic scale the interfacial roughness and the interfacial defects at the Si/SiO2 interface obtained by lateral solid phase epitaxial growth of Si on SiO2. At the matrix/SiO2 interface, the protrusions of Si with 2–3 Si(200) lattice planes make the interface indented. These images can be explained by the pyramid-type or edge-type pseudo Si(100)/SiO2 interface models composed of small {111} facets. Defects, mainly microtwins, are localized only within 50 nm from the interface, and are adjacent to the SiO2. It indicates that microtwins are interface-related and are supposed to form from atomic scale indents of the original a-Si/SiO2 interface.