Lateral PIN Photodiode Research Articles

Lateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafers

It has been verified through numerical simulations calibrated to experimental data the changes that the insertion of a germanium layer can bring to the electrical power generation of a silicon solar cell. The insertion of a germanium layer on top or below a silicon PIN diode designed in SOI technology has been considered. Results showed that different semiconductor characteristics (bandgap, mobility, and absorption coefficients) result in a general improvement in the solar cell performance, being able to reach a power 136% greater than the device without the heterogeneous layer. In the evaluated device the average power was improved from 9.43 nW to 14.92 nW with the Ge layer insertion. Besides that, the analysis has allowed for a better understanding of the phenomena that occur in the photogeneration of a cell with a heterojunction between germanium and silicon.

47‐4: Highly Sensitive Lateral Poly‐Si PIN Photodiode by Blue Laser Annealing of 400 nm Amorphous Si for Near Infrared Light Sensing

We report a novel low‐temperature poly‐Si (LTPS) lateral PIN photodiode fabricated using blue laser annealing (BLA) of amorphous Si. The diode exhibits the low off current density of ~ 2.5×10 ‐5 A/cm 2 in dark and a diode factor of 1.47. Under near‐infrared (850 nm) illumination with a power density of 20 mW/cm 2, the photocurrent increases by 1.5×10 3 times at ‐1 V. In addition, we demonstrate that the generated photocurrent can be effectively amplified by a LTPS oxide (LTPO) operational amplifier, yielding the output signal of 17.60 V. Our results suggest that the proposed LTPS‐based photodiode has a great potential for applications in highly sensitive optoelectronic devices.

Ultra-Low Capacitance Spot PIN Photodiodes

Spot PIN photodiodes were integrated without any process modifications in a high-voltage 0.18 μm CMOS technology. These photodiodes are a combination of vertical and lateral PIN photodiodes using the P+ bulk wafer and a P-type ring at the surface as anodes. Devices with N+ cathode and N+/N-well cathode are compared. A small N+/N-well cathode spot reduces the capacitance to 1.47 fF and the N+ cathode spot leads to a capacitance of 1.07 fF. The light sensitive area of these photodiodes is 707 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Simulated electric field distributions show the full depletion of the spot PIN photodiodes. Responsivities from 0.12 A/W to 0.16 A/W and from 0.50 A/W to 0.52 A/W for 405 nm and 675 nm, respectively, are achieved. The measured bandwidths for 675 nm light are from 520 MHz to 690 MHz at reverse biases from 15 V to 30 V.

TCAD Simulation of Single Event Effects on Electronic Devices

In this paper, lateral bulk PIN photodiodes designed at FEI University and SOI (Silicon-on-Insulator) PIN photodiodes from UCL are analyzed as photodetectors and SEE (Single Event Effects) sensors. Numerical simulations are used for radiation analysis of heavy ion striking the PIN photodiode using the parameters extracted by real measurements in a non-radiation condition. The occurrence of SEE near-Earth natural environment is unpredictable and is a serious threat that can lead to malfunctions of microprocessors, memory banks and devices that are vital to the correct behavior of a low-orbit or avionic mission. Detecting their occurrence and monitoring the energetic particles in radiation environments is vital and this paper investigates the consequence of SEE on lateral PIN photodiodes through experimentally calibrated TCAD numerical simulations.

Filter-free color pixel sensor using gated PIN photodiodes and machine learning techniques

This work addresses the possibility of light wavelength discrimination, using a specially designed Lateral PIN Gated Photodiode and Machine Learning signal processing techniques. The devices were designed at FEI University using IBM BiCMOS 8HP 0.13 μm technology. The terminal gate of the lateral PIN photodiode controls the vertical depletion layer, in order to modulate the capture of the electron-hole pairs generated by different wavelengths along the intrinsic region. The collected data were organized in optical power classes with the corresponding cathode currents. The experimental characterization shows that the terminal gate voltage can be used to discriminate different incident colors. The simulation results allowed the acquisition of a complete dataset to apply machine learning techniques and classify the photodetector captured color. This technique can be extended to photosensors arrays and eliminate the organic color filters. The best result was obtained using the “Linear and Quadratic Discriminant” algorithms, with the average accuracy of 92.46% and 96.82%, respectively.

Temperature and Silicon Film Thickness Influence on the Operation of Lateral SOI PIN Photodiodes for Detection of Short Wavelengths

This work presents an analysis of the temperature influence on the performance of a lateral thin-film SOI PIN photodiodes when illuminated by low wavelengths, in the range of blue and ultra-violet (UV). Experimental measurements performed from 100K to 400K showed that the optical responsitivity of SOI PIN photodetectors is affected by temperature change, being reduced at low and moderately high temperatures. Two-dimensional numerical simulations showed the same trends as in the experimental results, and were used both to investigate the physical phenomena responsible for the observed behavior as a function of the temperature as well as to predict the influence of silicon film thickness downscaling on the photodetector performance.

Temperature, Silicon Thickness and Intrinsic Length Influence on the Operation of Lateral SOI PIN Photodiodes

This work presents an analysis of the influence of the intrinsic length region (Li) and the thickness of the silicon film (tSi) on the performance of lateral thin-film SOI PIN photodiodes when illuminated by low wavelengths, in the blue and ultraviolet (UV) range. The experimental measurements performed with the wavelengths of 396 nm, 413 nm, and 460 nm in a temperature range of 100 K to 400 K showed that the optical responsivity of the SOI PIN photodetectors has larger dependence on the incident wavelength than on temperatures variation. Two-dimensional numerical simulations showed the same trends as the experimental results as a function of temperature and as a function of wavelength. Numerical simulations were used to investigate the responsivity and total quantum efficiency of PIN SOI photodetectors with intrinsic length region ranging from 5 µm to 30 µm and silicon film thickness ranging between 40 nm to 500 nm. From the results can be concluded that by properly choosing Li and tSi it is possible to optimize PIN SOI photodiodes performance for detecting specific wavelengths.

Enhanced ultraviolet photoresponse in a graphene-gated ultra-thin Si-based photodiode

We present an ultra-thin lateral SOI PIN photodiode with transferred monolayer graphene as the transparent gate, to provide enhanced ultraviolet (UV) performance and mechanical flexibility beyond standard Si-based devices. The device dark current shows intact characteristics after the post-CMOS thinning and graphene transfer processing steps. The device responsivity presents high potential in UV and visible wavelength detections (i.e. within the 200–900 nm range) under monochromatic light illumination. A maximum responsivity of 0.18 A W−1 has been experimentally achieved at 390 nm wavelength and validated by simulation, for a diode with intrinsic length Li of 20 μm. Additionally, the ~5 μm-thick device chip with direct board assembly paves the way towards the development of hybrid flexible electronics.

Design of a New Terahertz Nanowaveguide Amplifier

A novel amplifier is proposed based on a nanostructured waveguide supporting terahertz waves. A lateral pin photodiode structure, biased with a dc voltage and illuminated by a continuous-wave light, serves as an amplifying medium whereby drifting light-generated electrons provide energy required for amplification. Interaction between the propagating terahertz guided wave and the drifting electron stream is analyzed, and a dispersion equation is derived. Real life parameters of silicon are used to demonstrate and illustrate the achievable performance. Doubling of the wave power over only one micrometer is shown to be feasible even when all loss mechanisms are considered.

Study of Total Quantum Efficiency of Lateral SOI PIN Photodiodes with Back-Gate Bias, Intrinsic Length and Temperature Variation

: This paper addresses, for the first time, an analysis of the total quantum efficiency of lateral SOI PIN photodiodes with different intrinsic lengths in the 300 to 500 K range simultaneously considering back-gate bias and temperature influences. Introduction: The detection of ultra-violet is used in many applications fields [1,2] with operating temperatures of up 500K. The use of SOI PIN Photodiodes is required to provide high quantum efficiency [3]. These devices consist of a highly-doped P and N regions separated by an intrinsic region (with light P-type residual doping) with length LI (Figure 1). The characterized devices follow the 0.13μm technology from ST described in [6]. They consist of five devices with different intrinsic lengths (LI), but keeping the same total area by changing the numbers of fingers (m), i.e. when LI=1 μm, m=105, when LI= 2μm, m=75, and so on. Experimental Measurements: In Figure 2 the higher temperature is shown to produce an increase in the ITOTAL (UV illumination with λ=387nm and optical power of 0.57μW) mainly due to the thermal generation of carriers [4]. The variation of VBG modifies the operation mode (accumation, depletion or inversion) of the silicon film [5], the accum. mode is obtained for VBG < -10V, the depletion mode occurs when increasing VBG and the current abruptly raises, and then the inv. mode is achieved for VBG>3V. Since the total current can be approximated by the sum of diffusion and generation (drift) currents [7], if the device is operating at lower temp., the generation will dominate, and then the current will be composed by minority carriers which are the electrons. However, for higher temp., the diffusion current dominates, because of the strong thermal generation of carries. Moreover, the diffusion component is composed of majority carriers, which are the holes. This change in the component that dictates the current has an influence when comparing the ratio between the accum. and inv. currents that can be seen in Figure 3. The devices with shorter LI present the higher variations, showing to be more susceptible than the longer ones. So far, only total current was analysed, however Figure 4 shows the dark current as a function of LI for T=375K, and it is possible to see that when the mode of operation is accum., IDARK decreases with LI, while in inv., it increases. This fact can be explained as follows: IDARK is proportional to the size of the depletion region of each device. In accum., there is only the presence of a lateral depletion formed between the intrinsic and N+ region, which is not affected by the LI, but rather by the numbers of fingers. Thus, as the LI increases, m decreases, which results in a decreased total depletion region, so, reducing IDARK level. On the other hand, in inv., beyond the lateral depletion, there is also a vertical depletion region, in the second interface, caused by the VBG, which is highly influenced by LI. This means that, by increasing the intrinsic length, there is a raise in the vertical depletion size, thereby enhancing IDARK. Again, the more negative VD, the higher the current level. Although Figure 4 shows the case for temp. of 375 K, similar behaviour was observed for the other temp. The quantum efficiency (QE) as a function of LI is ploted in Figure 5. The QE is defined as the ratio between the photocurrent and the maximum current that would be generated if there was no kind of loss [8]. It presented almost no variation with VBG for T=300K. Besides that, the maximum QE of 33% was achieved for the device with LI=5μm at room temp. However, for T=500K, the efficiency is affected by VBG in a way that for inv. mode, the QE is inversely proportional to LI, while for accum. mode, it is directly proportional to LI (except for LI=100μ), this last one has the same trend as when T=300K. Still for T=500K, a maximum QE of 56.2% was obtained for LI=1μm in inv. mode and 21.7% for LI=10μm in accum. Conclusions: It was shown that when the device requires operation at higher temp., the best technological choices are the devices with smaller intrinsic lengths in inv. mode of operation because that can achieve 56.2% of QE. While at room temp., the higher QE was found to be 33% for LI=5μm independently of the mode of operation. Figure 1

Study of Total Quantum Efficiency of Lateral SOI PIN Photodiodes with Back-Gate Bias, Intrinsic Length and Temperature Variation

This paper addresses, for the first time, an analysis of the total quantum efficiency of lateral SOI PIN photodiodes with different intrinsic lengths in the 300 to 500 K range simultaneously considering back-gate bias and temperature influences. Experimental results showed that the mode of operation changes the behavior of the devices concerning dark and photocurrents, while the temperature variation produces different trades in quantum efficiency related to the absorption length and the diffusion length variation.

(Invited) Waveguide Germanium PIN Photodiodes for Optical Communication Applications

Silicon photonics has generated in recent years a strong interest for a large range of applications from optical telecommunications to microelectronics. The main advantages of this technology are the reduction of photonic system costs and the increase of the number of functionalities on the same chip, notably by combining photonics and electronics. Numerous advances in silicon photonics have occurred, with the demonstration of high speed Si modulators, Ge photodetectors and hybrid laser on silicon [1].The photodetector is one of the main building blocks for the implementation of fast silicon photonics integrated circuits. The required considerations for the design of such a device are the bandwidth, the power consumption and the responsivity. Germanium is now considered as the ideal candidate for fully integrated receivers on SOI substrates and based on CMOS-like processes. High speed and high responsivity Ge photodetectors have already reported on literature [2-4]. However, they suffer from relatively high dark currents as compared to their III-V homologues. The increase of bias voltage directly leads to higher bandwidth but also to a higher dark current mainly through tunneling, as a consequence of Ge low band-gap. Furthermore, Ge on Si suffers from crystal defects due to the lattice mismatch between Si and Ge. In this paper, we report on lateral pin photodiodes with thick Ge layers as the active media. Germanium is then integrated at the end of the Si waveguide, using the butt-coupling configuration to totally absorb light after few microns propagation at wavelength ranging from 1.3µm to 1.55µm (fig.1). Reliable detection characteristics have been obtained, including a bandwidth over 50GHz under zero-bias (fig.1), an internal responsivity higher than 0.5A/W at a wavelength of 1.55 µm and a dark current of about 10nA under -1V. 40Gb/s open eye diagrams were also obtained under zero-bias, showing the possibility of fabricating Ge-based low power and ultra-fast receivers. Some recent demonstrations of multiple-wavelength circuits and 40Gbit/s optical link, fabricated on a 300-mm microelectronics pilot line will also be presented {4]. Fig. 1: Schematic view of lateral Ge photodetector integrated in Si waveguide. SEM view of Ge photodetector cross-section.Normalized optical response as a function of frequency for lateral pin Ge photodiode under zero-bias.

Illuminated to dark ratio improvement in lateral SOI PIN photodiodes at high temperatures

This work presents a study of the illuminated to dark ratio (IDR) of lateral SOI PIN photodiodes. Measurements performed on fabricated devices show a fivefold improvement of the IDR when the devices are biased in accumulation mode and under high temperatures of operation, independently of the anode voltage. The obtained results show that the doping concentration of the intrinsic region has influence on the sensitivity of the diodes: the larger the doping concentration, the smaller the IDR. Furthermore, the photocurrent and dark current present lower values as the silicon film thickness is decreased, resulting in a further increase in the illuminated to dark ratio.

Study On Frequency Characteristics in Lateral PIN Photodiode Gated by Transparent Electrode Fabricated on Fully-Depleted Silicon-on-Insulator Film

Study On Frequency Characteristics in Lateral PIN Photodiode Gated by Transparent Electrode Fabricated on Fully-Depleted Silicon-on-Insulator Film

Single-Grain Si Thin-Film Transistors for Monolithic 3D-ICs and Flexible Electronics

We review our recent achievements in monolithic 3D-ICs and flexible electronics based on single-grain Si TFTs that are fabricated inside a single-grain with a low-temperature process. Based on pulsed-laser crystallization and submicron sized cavities made in the substrate, amorphous-Si precursor film was converted into poly-Si having grains that are formed on predetermined positions. Using the method called µ-Czochralski process and LPCVD a-Si precursor film, two layers of the SG Si TFT layers with the grains having a diameter of 6µm were vertically stacked with a maximum process temperature of 550°C. Mobility for electrons and holes were 600cm2/Vs and 200cm2/Vs, respectively. As a demonstration of monolithic 3D-ICs, the two SG-TFT layers were successfully implemented into CMOS inverter, 3D 6T-SRAM and single-grain lateral PIN photo-diode with in-pixel amplifier. The SG Si TFTs were applied to flexible electronics. In this case, the a-Si precursor was prepared by doctor-blade coating of liquid-Si based on pure cyclopentasilane (CPS) on a polyimide (PI) substrate with maximum process temperature of 350°C. The µ-Czochralski process provided location-controlled Si grains with a diameter of 3µm and mobilities of 460 and 121cm2/Vs for electrons and holes, respectively, were obtained. The devices on PI were transferred to a plastic foil which can operate with a bending diameter of 6mm. Those results indicate that the SG TFTs are attractive for their use in both monolithic 3D-ICs and flexible electronics.

High performance silicon lateral PIN photodiode

Start Photodetectors with high responsivity in Si-related processes are required for high speed optoelectronic applications such as fiber optic data communication systems. In this paper, the performance of a virtual lateral PIN photodiode with intensity response in the 200–1000 nm wavelength range was demonstrated. The results obtained for responsivity, total quantum efficiency and frequency response were 0.62 A/W and 13.1 GHz respectively for design parameters of intrinsic region length of 6 μm, photoabsorption layer thickness of 50 μm, incident optical power of 1 mW/cm2 and bias voltage of 3 V. As a conclusion, the decrease in device size enabled the realization of a high performance lateral p-i-n photodiode.

Operation of Lateral SOI PIN Photodiodes with Back-Gate Bias and Intrinsic Length Variation

This paper presents an analysis of the operation of lateral thin-film SOI PIN photodiodes for the detection of short wavelengths. Experimental measurements were done varying the back-gate bias in order to point out the behavior of the device. The temperature influence was also analyzed in 300K to 500K range. In addition, by using two-dimensional numerical simulations, the intrinsic length (LI) was changed, with the purpose of predicting the performance of this photodetector in more advanced technologies.

Operation of Lateral SOI PIN Photodiodes with Back-Gate Bias and Intrinsic Length Variation

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Monolithic 3D-ICs with single grain Si thin film transistors

Monolithic 3D integration is the ultimate approach in 3D-ICs as it provides high-density and submicron vertical interconnects and hence transistor level integration. Here, high-quality Si layer formation at a low temperature is a key challenge. We review our recent achievements in monolithic 3D-ICs based on single-grain Si TFTs that are fabricated inside a single-grain with a low-temperature process. With the μ-Czochralski process based on a pulsed-laser crystallization, Si grains with a diameter of 6μm are successfully formed on predetermined positions. Single-grain (SG) Si TFTs are fabricated inside the single-grain with mobility for electron and holes of 600cm2/Vs and 200cm2/Vs, respectively. Two layers of the SG Si TFT were vertically stacked and successfully implemented into CMOS inverter, 3D 6T-SRAM and single-grain lateral PIN photo-diode with in-pixel amplifier. Those results indicate that the SG TFTs are attractive for use in monolithic 3D-ICs on an arbitrary substrate including a glass and even a plastic for applications such as ultra-high-density memories, logic-to-logic integration, CPU integrated display, and high-definition image sensor for artificial retina.

Analysis and simulation of lateral PIN photodiode gated by transparent electrode fabricated on fully-depleted SOI film

A novel device, lateral PIN photodiode gated by transparent electrode (LPIN PD-GTE) fabricated on fully-depleted SOI film was proposed. ITO film was adopted in the device as gate electrode to reduce the light absorption. Thin Si film was fully depleted under gate voltage to achieve low dark current and high photo-to-dark current ratio. The model of gate voltage was obtained and the numerical simulations were presented by ATLAS. Current-voltage characteristics of LPIN PD-GTE obtained in dark (dark current) and under 570 nm illumination (photo current) were studied to achieve the greatest photo-to-dark current ratio for active channel length from 2 to 12 μm. The results show that the photo-to-dark current ratio is 2.0×107, with dark current of around 5×10−4 pA under VGK=0.6 V, PIN=5 mW/cm2, for a total area of 10 μm×10 μm in fully depleted SOI technology. Thus, the LPIN PD-GTE can be suitable for high-grade photoelectric systems such as blue DVD.