Large Voltage Swing Research Articles

Full two-dimensional ambipolar CFET-like architecture for switchable logic circuits

As the scaling of integrated circuits based on silicon semiconductors becomes increasingly challenging due to the minimum feature size being close to the physical limit, the urgent demand for alternative strategies has fuelled the rapid growth of techniques and material innovations. Here, we report on the fabrication of vertically stacked ambipolar complementary field-effect transistor that is fully composed of two-dimensional materials of WSe2/h-BN/graphene/h-BN/WSe2 heterostructures. The ambipolar feature of the top and bottom WSe2 FET enables a switchable inverter behavior with a favorable voltage gain of up to 75, which can work in both the first and third quadrants. Based on the switchable characteristics, a large voltage swing circuit for single photon avalanche detectors is proposed without any bulky negative-voltage components. This work could open a new pathway for future two-dimensional electronics and ultimate monolithic 3D high-density integration circuits.

Model Predictive Control of Grid-Connected Battery Systems to avoid PV-induced Overvoltage

Photovoltaic (PV) power plants are currently built at a high rate, both small ones for single family houses and large-scale plants with a power output in the MW range. This development accelerated even more since the beginning of the energy crisis in 2021. Due to intermittent energy production, large voltage swings may result in the electrical grid, which are challenging for grid and operators. We are considering the problem of overvoltage in times of excessive PV production, which is well documented in the literature. To avoid overvoltage, without PV-curtailment or grid expansion, grid-connected battery systems are proposed. The research focus is on advanced control strategies for such systems which charge and discharge at appropriate times to reduce the overvoltage in the grid while simultaneously minimizing the required battery capacity. The work presented extends a previous contribution of the authors. The analysis was done in a simulation environment (MATLAB/Simulink).

AlN/GaN/InGaN coupling-channel HEMTs with steep subthreshold swing of sub-60 mV/decade

This work reports an AlN/GaN/InGaN high electron mobility transistor (HEMT) with a steep subthreshold swing (SS) of sub-60 mV/dec utilizing a coupling-channel architecture. The fabricated transistors show a negligible hysteresis, a SS of 39 mV/dec, a large gate voltage swing of >4.2 V, and achieving an excellent quality factor Q = gm/SS of 6.3 μS-dec/μm-mV. The negative differential resistance effect was found in the subthreshold region in the gate current–voltage (Ig–VGS) curve. The hot carrier transfer mechanism that occurred in the turn-on/pinch-off progress of the CC-HEMT under the dual-directional sweep, proved by the VDS- and Lg-dependent bi-directional transfer I–V characteristics, can be responsible for these excellent device performances. This work is believed to encourage further study of the AlN/GaN platform to power the future group III-nitrides CMOS technology.

A Fast Tracking and Wide Swing CMOS Peak Detector for On-Chip Q-Factor Measurement

In this paper, a CMOS peak detector is proposed in order to satisfy the requirement of an on-chip time-domain quality factor (Q-factor) measurement. Unlike a conventional peak detector in which an Operational Trans-conductance Amplifier (OTA) is used as the core circuit, a high-speed comparator is deployed as the core circuit within the proposed peak detector. As a result, the proposed peak detector can offer a fast peak tracking with a high dynamic range and over a large voltage swing while still covering a wide frequency span with an excellent linearity and accuracy, which are key features required by on-chip Q-factor measurement. The proposed circuit was implemented in a CMOS 0.35μm technology under 5V. The experimental results have shown an output swing almost 4Vpp for an input signal amplitude ranging from 0.02V to 1.9V with a maximum signal dynamic ratio of 50 (Vmax/Vmin), an excellent linearity with a relative error <0.2%, a peak tracking accuracy less than 0.7% for 1MHz and a fast peak tracking with only one period delay in the worst case. The experimental results show that the operating frequency spans from 100 kHz to 5MHz and power consumption is around 9mW within this frequency range.

Pulse Bursting Phenomenon in Constant On-time Controlled Boost Converter

Constant on-time (COT) is a pulse frequency modulation based control method, which is widely used for the controller of switching mode power supplies due to the advantages of simple implementation, low cost and good performances. In fact, like hysteretic control, COT is also a ripple-based control, and its loop stability is very dependent on the output voltage ripple characteristic. COT controlled buck converter is mainly concerned in nowadays. For boost converter, the output voltage ripple characteristic is quite different with that of buck converter. Thus, the stability of COT controlled boost converter is necessary to be investigated. In this paper, with particular theoretical analysis, the unique pulse bursting phenomenon in COT controlled boost converter appears when the time constant of the output capacitor is relatively small, which results in large inductor current and output voltage swing. The quantitative relationship between the time constant and the other circuit parameters such as input voltage, output current and inductance is deduced, which is very different with that of COT controlled buck converter. Simulation and ex-perimental results are provided to verify the theoretical analysis results. The investigation presented in this paper gives an im-portant guideline for the circuit parameter design of COT con-trolled boost converter.

Low-voltage surface-normal electroabsorption modulators.

Surface-normal electroabsorption modulators (SNEAMs) are appealing for short-reach communication systems because of their outstanding properties, such as ultrawide bandwidth and polarization-insensitive response; however, due to their small active volumes, large voltage swings are typically required to obtain the best performance. Here we propose and demonstrate a novel, to the best of our knowledge, design that dramatically reduces the voltage needed by SNEAMs and significantly increases their extinction ratio. By shrinking the multiple quantum well stack of SNEAMs to the minimum and by optimizing their reflectivity with dielectric coatings of suitable refractive index and thickness, we obtain modulators that require drive voltages of only 1-2Vpp. We show that these novel devices largely outperform conventional SNEAMs.

Coordinated power control of electrochemical energy storage for mitigating subsequent commutation failures of HVDC

Commutation failure is one of the most common faults in high voltage direct current (HVDC) transmission system. Subsequent commutation failures (SCFs) caused by commutation failure will cause large voltage and current swing. Several SCFs may cause DC transmission power interruption, which seriously threatens the safe and stable operation of AC/DC hybrid power grid. With the construction and commissioning of grid-side electrochemical energy storage (EES), it is possible to mitigate SCFs of adjacent HVDC transmission lines using EES with fast power response characteristics. In this paper, the influence mechanism of active and reactive power output of EES on commutation conditions is studied by combining the evolution of cascading outages and SCFs. It is found that reactive power mainly affects AC voltage and active power mainly affects DC current. Based on the mechanism analysis, a coordinated power control strategy for EES is presented. This strategy, combined with EES capacity constraints, can control EES active and reactive power output instructions adaptively according to the degree of AC failure at different stages of SCFs to fully release the transient support capacity of EES. Case studies are undertaken on the Henan multi-infeed UHVDC system and CIGRE-HVDC standard test system, respectively. The simulation results verify the correctness of the proposed EES power control strategy and the effectiveness of the strategy for SCFs mitigation in different systems, different fault types, and different fault degrees.

Magnetic background field-tolerant SQIF-based current sensors

We report on the development of magnetic background field-tolerant superconducting quantum interference filter (SQIF) based on low-capacitance sub-micrometer sized cross-type Josephson junctions either as current sensing amplifiers—even on chip—for advanced superconducting quantum interference device (SQUID) readout circuits or as magnetic field sensor in flux transformer configuration especially for geophysical measurement systems. Their very small parasitic magnetic sensitive areas enable them to operate in the Earth magnetic field and allow for magnetically unshielded cool-down. The careful consideration of magnetic sensitive areas inside each SQUID in the SQIF in all three dimensions result in developed SQIFs with 28 SQUIDs in series exhibiting large voltage swing and transfer function of more than 2 mV and , respectively. We report on the electrical parameters and field stability as well as on the noise performance of the devices under investigation. SQIFs and devices with additional on-chip flux-transformers show input referred current noise levels of and , respectively. We furthermore demonstrate their potential as SQIF-based magnetometers using them in addition with thin-film pickup loops resulting in a white magnetic field noise of . The implemented SQIFs are thus highly compatible with state-of-the-art single SQUID-devices offering beneficial features such as a unique working point, making them excellent suited for implementation of e.g. geophysical instruments.

A data‐independent 9T SRAM cell with enhanced ION/IOFF ratio and RBL voltage swing in near threshold and sub‐threshold region

SummaryThe conventional 8T SRAM cell with isolated read port is suggested as an alternative to overcome the read‐write conflicts associated with 6T SRAM cell. However, in near threshold and sub‐threshold regions, 8T cell performance is limited by reduced ION/IOFF ratio, deteriorated RBL voltage swing, data dependency, and higher read failures, although the existing SRAM cells address some of these issues but still suffer from degraded performance due to the trade‐off between leakage and read currents. In this paper, a 9T SRAM cell with novel read port is proposed that aims for low and data‐independent leakages, high ION/IOFF ratio, and large RBL voltage swing in near threshold and sub‐threshold regions. The performance of the proposed cell is compared with 7T, 8T, 9T, and 10T cells at 32 nm technology node by simulating a column of 128 cells to demonstrate its versatility over others. The proposed cell shows enhanced ION/IOFF ratio (71.2X), large RBL voltage swing and data‐independent leakages at VDD = 0.3 V in comparison to the conventional 8T SRAM cell. The results at different PVT corners are also captured to validate the impeccable performance of the proposed cell irrespective of operating conditions.

A 2.4-GHz Quadrature Local Oscillator Buffer Insensitive to Frequency-Dependent Loads for Bluetooth Low Energy Applications

In this letter, a 2.4-GHz quadrature local oscillator (LO) buffer insensitive to frequency-dependent loads is presented for Bluetooth low energy (BLE) applications. An LC tank is used as a load in the proposed buffer to provide a sufficient voltage gain and large voltage swing at the operating frequencies of BLE. Furthermore, the effect of the frequency-dependent impedance of the LC tank on the gain and phase mismatches is reduced by adding compensating transistors. The proposed buffer can provide accurate quadrature signals without additional circuitry in the LO path, minimizing the current consumption of the receiver. It is implemented in 65-nm CMOS technology. It achieved a voltage gain of 5.6 dB, a gain mismatch less than 0.3 dB, a phase mismatch less than 1.1°, and an output ${P} _{{1dB}}$ of 3 dBm. It draws an average current of 3.8 mA from a supply voltage of 0.8 V. The active die area is 0.55 mm2.

Wafer-Scale Si–GaN Monolithic Integrated E-Mode Cascode FET Realized by Transfer Printing and Self-Aligned Etching Technology

In this article, Si (100) inks’ array is integrated on SiN/AlGaN/GaN substrate to demonstrate a zero deviation and wafer-scale Si–GaN monolithic integration by transfer printing and self-aligned etching technology. During the heterogeneous integration process, it does not depend on any equipment, such as metal–organic chemical vapor deposition (MOCVD) (epitaxial growth) and wafer bonding machine (wafer bonding) which are costly. The transferred Si and SiN/AlGaN/GaN substrates show an excellent interface morphology. Based on this material system, the monolithic integrated E-mode cascode FETs are demonstrated with good uniformity. The ${I}_{GS}$ is below 10−5 mA/mm within a large gate voltage swing of ±18 V. Threshold voltages of a series of cascode FETs are extracted as 2.2 V (±0.2 V). This novel low-cost technology shows great potential in monolithic heterogeneous integration.

A new low-voltage operational transconductance amplifier with push-pull CMFB scheme for low-pass filter applications

This paper proposes a new common-mode feedback (CMFB) scheme for a fully differential operational transconductance amplifier (OTA) with enhanced linearity and large voltage swing. The main feature is that the common-mode feedback circuit output with push-pull scheme, which is parallel to the high-side PMOS and low-side NMOS of the output stage, to stabilize the common-mode state quickly and to maximize the output voltage swing. In addition, the third-order Butterworth low-pass transconductance–capacitance filter based on linear transformation techniques is also implemented in the TSMC 0.18 µm 1P6M CMOS process. The power dissipation of the designed transconductance cell is only 161 μW and the average power consumption of this chip is 1.4 mW under 1.2 V supply voltage. The filter core occupies a silicon area of 0.044 mm2.

A highly linear 10 Gb/s MOS current mode logic driver with large output voltage swing based on an active inductor

A highly linear 10 Gb/s MOS current mode logic driver with large output voltage swing based on an active inductor

Capacitively Coupled Instrumentation amplifier with optimized feedback pseudo-resistor for wet-gel based electrodes

Different types of electrodes are used for stable monitoring of physiological signals. Commonly used Silver-silver chloride (Ag/AgCl) metal gel-based electrodes and gold metal electrodes used for ECG and EEG respectively introduce substantial noise component and offer very high contact impedance to the subsequent amplifier. A Capacitively Coupled Instrumentation Amplifier (CCIA) is extensively used for low noise amplification of the acquired bio-potential signal. Amplification of low-frequency bio-potential signals while discarding the DC-offset requires a distinct low-frequency high-pass pole, which is implemented using pseudo-resistors in feedback of CCIA. However, pseudo-resistors exhibit the non-linearity due to large voltage swing at the output. This also makes the high-pass pole of the system time-variable. In this paper, different structures of non-tunable and tunable pseudo-resistor are simulated using Cadence spectre simulator with 0.18 µm technology. The structures having equivalent resistance ∼1 TΩ over ±1 V range are the employed across the feedback of current mirror based CCIA. The simulation results show the improvement in the lower cut-off frequency and performance metrics of CCIA using different pseudo-resistor structures.

Gate driver IC for enhancement mode GaN power transistors with senseFET reverse conduction detection circuit

Dead-times are necessary in switching output stage to avoid shoot-through current between the high side (HS) and the low side (LS) power transistors. However, excessively long dead-times can lead to unwanted reverse conduction and power loss. Sensing the duration of reverse conductions are especially difficult for high-voltage enhancement mode (e-mode) gallium nitride (GaN) HEMTs due to their fast switching speed. High-precision sensing circuits are required for dead-time correction as the load current changes and to withstand large voltage swings. Traditional CMOS-based sensing circuits (e.g. standard logic gates) are not suitable for GaN-based converters as they can only handle limited voltage ranges. In addition, severe undershoots (up to −4 V) may damage the sensing circuit. Here, a gate driver IC for e-mode GaN power output stages capable of detecting the presence of reverse conduction with a best resolution of 0.66 ns, a dead-time adjustment resolution of 0.33 ns, and with on-chip closed-loop control is presented. In addition, a novel reverse conduction sensing circuit that can accommodate the large voltage swings at the switching node (SW) is also described.

Linearity and RF Power Handling on Capacitive RF MEMS Switches

Linearity characteristics of capacitive tuners under large radio frequency (RF) power have become an important issue for today’s cellphone industry. The use of these devices as antenna tuners has become critically important due to the RF spectrum opening in the low-frequency range. Capacitive tuners connected directly to the antenna to change the RF voltage/current pattern and tune lower frequencies are subjected to suffer large voltage swings, especially in the isolation state or minimum capacitance. In this article, we analyze the effects of the large RF power or equivalent rms voltage to capacitive micro-electromechanical systems (MEMS) switches. The theoretical analysis combined with Coventor MEMS+ simulations will allow us to study the capacitance change and MEMS mechanical frequency response. This article evaluates two types of measurement setups to investigate the RF power effects on nominal capacitance and mechanical frequency response. Measurements up to 6 W were completed with two capacitive MEMS tuner products, confirming the modeling predictions and demonstrating the robustness of this technology under large RF power or voltage swings.

Lithium Ion Batteries and Next Generation Energy Storage Technology - Adoption to Aircraft and Aerospace

Lithium ion batteries provide a high energy to weight ratio making the technology attractive for aircraft and aerospace applications. Introducing lithium ion battery technology, as with other types of battery chemistries, can prove challenging for a variety of reasons. As electrical load demands for aircraft increase controlling and harnessing high energy dense solutions will become more critical. The presentation will begin with a basic introduction of lithium ion battery chemistry and evolve into a discussion on the role various aspects play in safely implementing lithium ion batteries on aircraft including the key design drivers and issues that influence system safety. The presentation will also cover key operational modes, applied to aircraft in general, that can drive risk and effect a prudent power system design (cell overheating, voltage “sag” below minimums at low temperatures, etc.) in the integration of battery technologies to an aircraft. Battery design features and attributes that relate to typical operating modes in an airborne platform will also be discussed in some detail. The presentation will next evolve into a narrative on next generation energy storage technologies and supercapacitors (electric double layer devices) and their potential role in evolving airborne applications. Implementation of higher surge supportable energy storage designs, again driven by considerations at cold temperature conditions, will also be discussed, and of specific interest for Space applications. Energy and power density "road mapping targets" for evolving applications will be highlighted along with issues that influence nominal values including, but not limited to, operating temperature (cold and hot temperature extremes) typical of battery installations in harsher Aerospace environments. An illustration will be provided in the presentation of what the ideal aircraft battery looks like including the ability to float on an unregulated aircraft bus (without Batter Management Electronics) with large voltage swings, ripple content as well as other “nice to haves” (including higher packaged battery system Whrs and kilo-Watts per kilo gram than existing). A final summary will wrap up the discussion with an overview of the presentation material.

Experimental Evaluation of Capacitors for Power Buffering in Single-Phase Power Converters

Single-phase inverters and rectifiers require the use of an energy buffer to absorb twice-line-frequency power ripple. Historically, this challenge has been addressed by the use of large electrolytic capacitors. Lifetime constraints and the need for improved system performance have motivated designers to seek other capacitor technologies, such as ceramic and film, which are frequently used in conjunction with active filtering converters to reduce the capacitance required. Active filtering converters cycle the capacitor voltage over a wide voltage range while maintaining a constant dc bus voltage. This large-swing operation demands different capacitor qualities than most other filtering applications, and the data sheet parameters available for commercial capacitors may be ineffective or require special care for calculating characteristics, such as efficiency and energy storage capability. This work presents an experimental setup for evaluating capacitor performance under a large voltage swing along with detailed experimental results. Energy storage data for a number of capacitors in the 50–630 V range from several manufacturers are included. The approach and findings of this paper can serve as an aid to power electronics designers for the selection and evaluation of capacitors in energy buffering applications.

Lithium Ion Batteries and Next Generation Energy Storage Technology - Adoption to Aircraft and Aerospace

Lithium ion batteries provide a high energy to weight ratio making the technology attractive for aircraft and aerospace applications. Introducing lithium ion battery technology, as with other types of battery chemistries, can prove challenging for a variety of reasons. As electrical load demands for aircraft increase controlling and harnessing high energy dense solutions will become more critical. The presentation will begin with a basic introduction of lithium ion battery chemistry and evolve into a discussion on the role various aspects play in safely implementing lithium ion batteries on aircraft including the key design drivers and issues that influence system safety. The presentation will also cover key operational modes, applied to aircraft in general, that can drive risk and effect a prudent power system design (cell overheating, voltage “sag” below minimums at low temperatures, etc.) in the integration of battery technologies to an aircraft. Battery design features and attributes that relate to typical operating modes in an airborne platform will also be discussed in some detail. The presentation will next evolve into a narrative on next generation energy storage technologies and supercapacitors (electric double layer devices) and their potential role in evolving airborne applications. Implementation of higher surge supportable energy storage designs, again driven by considerations at cold temperature conditions, will also be discussed. Energy and power density "road mapping targets" for evolving applications will be highlighted along with issues that influence nominal values including, but not limited to, operating temperature (cold and hot temperature extremes) typical of battery installations in harsher Aerospace environments. An illustration will be provided in the presentation of what the ideal aircraft battery looks like including the ability to float on an unregulated aircraft bus (without Batter Management Electronics) with large voltage swings, ripple content as well as other “nice to haves” (including higher packaged battery system Whrs and kilo-Watts per kilo gram than existing). A final summary will wrap up the discussion with an overview of the presentation material.

Design of Single-Topology Continuously Scalable-Conversion-Ratio Switched- Capacitor DC–DC Converters

This paper introduces a fundamentally different type of switched-capacitor dc–dc converter with large voltage swing flying capacitors, which is made efficient using advanced multiphasing soft charging. A single-capacitor topology is derived that behaves like a gyrator and achieves a continuously scalable-conversion-ratio with high efficiency. A circuit fabricated in a 28-nm CMOS process demonstrates the working principle of the presented topology and advances the state of the art by achieving a peak efficiency of 93%, and a single-topology 0.9–2.03-V output voltage range with more than 90% efficiency at an input voltage of 2 V.