Large-signal Transient Response Research Articles

A 600-mA, Fast-Transient Low-Dropout Regulator With Pseudo-ESR Technique in 0.18-$\mu$ m CMOS Process

In this article, a dual loop-compensated, fast-transient, low-dropout regulator (LDO) is proposed for battery-powered applications. It is successfully implemented in a 0.18- $\mu \text{m}$ CMOS process with a total silicon area of $210\,\,\mu \text{m}\,\,\times 593\,\,\mu \text{m}$ . The proposed LDO is composed of two feedback loops. The fast feedback loop (FFL) employs direct output voltage spike detection through capacitive coupling, resulting in significantly improved, large signal transient response and loop bandwidth at the same time. Its voltage spike is 15 mV for a load step of 600 mA. The proposed LDO has a loop bandwidth of 2.3 MHz at a load current of 600 mA with a 30- $\mu \text{A}$ no-load bias current. A power transistor with pseudo-equivalent series resistance (ESR) technique is proposed for loop stability improvement. It enables the usage of the low-cost, multilayer ceramic capacitors in mobile applications. The constant biased voltage feedback loop (VFL) has a loop gain larger than 60 dB under all load conditions, which enables a good line and load regulation.

23 × 12 μm three‐stage amplifier using sub‐threshold active cascode compensation capable of driving very‐large‐load with no‐upper‐limit

An ultra-area-efficient three-stage amplifier is proposed by using sub-threshold active cascade compensation, which is able to drive very-large or ultra-large capacitive loads without sacrificing stability and power. Besides, external feed-forward path and slew-rate enhancer can significantly improve the large-signal transient response of the circuit. Designed and verified in 28 nm CMOS technology, the proposed amplifier occupies die area of 0.00028 mm 2 and consumes a power of 16.5 μW from 1.05 V supply. In addition, it can provide over 85 dB DC gain and is stable for any load larger than 4 nF, while the size of the entailed compensation capacitance is only 40 fF.

High-Performance Three-Stage Single-Miller CMOS OTA With No Upper Limit of <inline-formula> <tex-math notation="LaTeX">${C}_{L}$ </tex-math> </inline-formula>

This brief presents a low-power, area-efficient three-stage CMOS operational transconductance amplifier (OTA) suitable for very large capacitive loads, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> . A single Miller capacitor and an inverting current buffer embedded in the input stage are exploited to implement the frequency compensation network. An additional feed-forward path and a slew rate enhancer are also utilized to improve the large-signal transient response. Detailed small-signal analysis reveals that the proposed OTA does not exhibit an upper limit of drivable C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> . The OTA is fabricated in a standard 0.35-μm technology and occupies 0.0027 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area. Under 1.4-V supply and 6.36-μA quiescent current consumption, it provides a dc gain greater than 110 dB and is stable for any C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> larger than 5 nF. Comparison with the state of the art shows remarkable improvement of both small- and large-signal performance.

A hybrid-mode bulk-driven folded cascode OTA with enhanced unity-gain bandwidth and slew rate

A hybrid-mode bulk-driven folded cascode OTA with the enhanced unity-gain bandwidth and slew rate is presented in this paper. To achieve a faster large-signal transient response, a hybrid-mode output stage composed of a traditional folded cascode and an additional current mirror output stage is proposed. The proposed hybrid-mode output stage activates the additional current mirror output stage to produce a large transient charge/discharge current when slewing happens, overcoming the issue of limitation of folded current source in traditional folded cascode structure. By the combination of super bulk-driven input stage and proposed hybrid-mode output stage, not only does the bulk-driven folded cascode OTA achieve a large unity-gain bandwidth and high dc gain, but also the large-signal transient response is significantly improved. Designed under SMIC 0.18 μm process, simulation results demonstrate that the proposed bulk-driven OTA achieves 2 times the unity-gain bandwidth and 12 times the slew rate of conventional counterpart at the same power dissipation.

Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs

This paper introduces a new effective single-Miller capacitor compensation topology for three-stage amplifiers with very large capacitive loads, realized through an active-feedback capacitor together with an inner half-feedforward stage. Moreover, an optimized design strategy which profitably exploits the two left half-plane zeros is presented. To improve the amplifier large signal transient response, the topology also includes an external feedforward path, that only marginally affects the frequency compensation, and a novel slew-rate enhancer section. To validate the solutions presented, a three-stage OTA driving a 10-nF load has been designed and implemented in a standard 0.35-μm CMOS technology. The amplifier occupies less than 0.003-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of die area, provides 2.7-MHz gain-bandwidth product and 0.55-V/μs average slew-rate, while consuming only 25-μA quiescent current.

Stochastic Analysis of Switched-Capacitor Circuits for Sampled Data Converters

This paper describes an original simulation-based method to derive the stochastic properties of the output noise of switched-capacitor circuits which are used in sampled-data converters. The method relies on a linear time-varying approximation of the large-signal transient response of the switched circuits. It is shown how switched-capacitor-circuit noise and quantization noise, due to the presence of harsh comparators, can be analyzed in a unified frame where the data converter is modeled as a discrete-time system.

Design of Monolithic CMOS LDO Regulator With ${\rm D} ^{2}$ Coupling and Adaptive Transmission Control for Adaptive Wireless Powered Bio-Implants

This paper presents a monolithic CMOS low drop-out regulator for adaptive wireless powered bio-implants. A dual-loop control scheme is proposed to enhance load/DVS transient response, without a filter capacitor. The inner loop employs a direct dynamic coupling technique to improve transient response by directly detecting voltage variations through a capacitive coupling high-pass filter. Meanwhile, the outer loop adopts an adaptive transmission control to improve the regulator's large-signal transient response. The regulator is intrinsically stabilized without frequency compensation. Both small-signal and large-signal analysis are provided as design guidelines. The proposed regulator was fabricated with a 0.35-μm CMOS process, with an active die area of 0.35 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Experimental results demonstrate a 1.6-μs/V down-tracking and 2.2- μs/V up-tracking speed for DVS reference tracking, with undershoot/overshoot voltages controlled below 90 mV. Without a filter capacitor, the output voltage of the regulator recovers within 2.0 μs for 100-mA load change, with less than 90-mV variation. The current/power efficiency stays above 93/78% over the entire interested load current range, with a peak value of 99.96/91.1%, respectively.

Design Optimization of On-Chip Inductive Peaking Structures for 0.13-$\mu{\hbox {m}}$ CMOS 40-Gb/s Transmitter Circuits

This paper describes design methodologies for the optimal inductive peaking structures used for the 40-Gb/s serializing transmitter circuits presented in. The implemented transmitter had more than 400 on-chip inductors and transformers in order to achieve the bandwidth required for the 38.4-Gb/s operation demonstrated in a 0.13-μm CMOS process. A bridged T-coil network with inverted mutual coupling was found more effective than the conventional T-coil with sizeable driver-side capacitance. An iterative refinement procedure that directly optimizes the circuit's large-signal transient response at the presence of the inductor parasitics and device nonlinearities via HSPICE-ASITIC joint-simulation is described. The procedure resulted in more than 3 × improvement in bandwidth for the CML buffer, multiplexer, and latch circuits. It is shown that the area and the achievable bandwidth of the optimal inductive peaking structures will scale favorably with the CMOS technology trends.

Performance comparison of gain-coupled and index-coupled DFB semiconductor lasers

Comprehensive numerical simulations with the transmission-line laser model (TLLM) are used to compare the behavior of gain-coupled DFB lasers with index-coupled DFB lasers fabricated from identical materials. These simulations compare slope efficiency, threshold current, spectra, small-signal modulation bandwidth, maximum-intrinsic modulation bandwidth, large-signal transient response and chirp, relative-intensity-noise (RIN) spectra, and feedback sensitivity for coherence collapse. In most cases gain-coupled lasers with additional index coupling have better performance than index-coupled lasers for a given material. However, high-coupling factor index-coupled lasers do have lower threshold currents, lower RIN levels, and lower sensitivity to external feedback than gain-coupled lasers, although spatial hole burning in these devices can be disadvantageous.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A refined nonlinear averaged model for constant frequency current mode controlled PWM converters

A refined, duo-mode model for current programmed buck power converters is presented. The refined model uses a form of the current mode control law which is truly invariant with respect to operating conditions. That is, it is valid for both transient and steady-state operating conditions regardless of the converter operating mode, which could be either continuous conduction mode (CCM) or discontinuous conduction mode (DCM). The large-signal transient response predicted using the refined average model is shown to be virtually indistinguishable, in an average sense, from that predicted using a pulse-by-pulse simulation. The refined model is shown to exhibit improved high-frequency accuracy in both time and frequency domains. The model has been implemented in SPICE 2G6 and runs with default analysis options. >

Role of structure sizes in determining the characteristics of the resonant tunneling diode

Using the Wigner function formalism, we study the effects of structural parameters on the DC I-V characteristics and on the large-signal transient response of the resonant tunneling diode. We model two types of structures of GaAs/Al xGa 1-xAs; first, with symmetric barriers ranging from 3 to 8 nanometers in thickness separated by a 5 nanometer well, and second with a well varying from 3 to 8 nanometers between 3 nanometer barriers. Experimental variation of the barrier thickness and height changes the peak-to-valley ratio in the I-V curve, as predicted by elementary models of tunneling structures. This stems directly from the changes in tunneling probabilities. For the DC studies, we show that the peak-to-valley ratio in the I-V curve is a function of the resonance width, which depends both on the well and barrier thickness. The location of the peak on the I-V curve depends on the location of the resonant energy, which is a function of the well width. Transient switching behavior is compared to earlier numerical studies of tunneling times of wave packets. Charge storage stabilizes the position of the resonant state, thus damping the transients. Consequently, wider barriers yield faster transient settling times, in agreement with the tunneling time results which predicted longer charge storage times for thicker barriers.

The effects of oxide traps on the large-signal transient response of analog MOS circuits

Hysteresis in the threshold voltage of MOSFETs due to oxide traps is discussed, which can impose serious limitations on the accuracy and speed of analog circuits. The measured magnitude of the input-referred hysteresis ranges from 100 mu V to more than 1 mV in NMOS devices stressed with positive gate-source voltages ranging from 1 to 5 V on microsecond-to-millisecond time scales. This hysteresis is explained by a model in which electrons tunnel to oxide traps close to the interface.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The Dynamic Performance of an Electrohydraulic Servovalve/Motor System With Transmission Line Effects

The transient response of an electrohydraulic servovalve coupled to an axial piston ball motor is analyzed. In particular, the effect of long lines between the servovalve and motor is studied together with coulomb friction effects at the motor. The dynamic characteristics of the basic system with short lines is first established via frequency response measurements coupled with a small signal linearized analysis. Longer lines are then added and the method of characteristics, coupled with a quasi-analytical solution for the motor-end equations, is used to predict the large signal transient response. The importance of coulomb friction damping is established together with damping due to servovalve dynamics.

Optical correlation measurement of switching transients in high-speed semiconductor lasers

Measurement of the large-signal transient response of a high-speed InGaAsP laser to an ultrashort rise time current pulse is reported. For complete time resolution, a measurement system which uses optical correlation techniques is implemented. Comparison is made between the optical correlation measurement and conventional electronic measurement using the fastest available detector and oscilloscope.

Modeling of High-Speed, Large-Signal Transistor Switching Transients from s-Parameter Measurements

A new technique has been developed to derive the large-signal transient response of semiconductor devices from small-signal frequency response data. The large-signal switching response can be calculated for an arbitrary input signal voltage and rise time. The new technique utilizes the Fourier transformation to combine arrays of small-signal data to compute the response waveform. The input waveform is decomposed into a superposition of small pulses. The response to each pulse is obtained by Fourier transformation techniques, using s-parameter data at appropriate bias points. The sum of these responses approximates the overall transient response. Simulations were performed for a GaAs MESFET for step inputs with the rise times of 8 ns and 150 ps. Good agreement was obtained between simulated waveforms and measured output waveforms in rise time, magnitude, and waveform shape. This algorithm is general and will work for other measured small-signal transfer parameters as functions of frequency and bias.

Modeling of high-speed, large-signal transistor switching transients from s-parameter measurements

A new technique has been developed to derive the large-signal transient response of semiconductor devices from small-signal frequency response data. The large-signal switching response can be calculated for an arbitrary input signal voltage and rise time. This new technique utilizes the Fourier transformation to combine arrays of small-signal data to compute the response waveform. The input waveform is decomposed into a superposition of small pulses. The response to each pulse is obtained by Fourier transformation techniques, using s-parameter data at appropriate bias points. The sum of these responses approximates the overall transient response. Simulations were performed for a GaAs MESFET for step inputs with the rise times of 8 ns and 150 ps. Good agreement was obtained between simulated waveforms and measured output waveforms in rise time, magnitude, and waveform shape. This algorithm is general and will work for other measured small-signal transfer parameters as functions of frequency and bias.

A nonlinear indefinite admittance matrix for modeling electronic devices

An approach is proposed that yields equivalent-circuit models for the large-signal transient response of all electronic devices described by charge control. Its relation to the indefinite admittance matrix of circuit theory offers advantages in the modeling of devices having more than three terminals.

On discrete-time AGC amplifiers

Continuous automatic gain control (AGC) amplifiers have received much attention in the past due to their widespread usage in radar, sonar, communications, and other electronic systems. A reexamination of the AGC problem for the discrete-time counterpart is presented in this paper. It is shown that the appealing notion of merely equating the response with the sampled response of an analogous continuous model is often not satisfactory, especially when the response time is of the order of the sampling time. A general solution to the large-signal response of the discrete AGC amplifier involves a nonlinear difference equation and is solved by using a discrete Volterra series representation. Several functions that have received attention in the past for continuous AGC amplifiers are considered: exponential, p th-law, and linear. In addition, a new configuration called geometric feedback is introduced that has certain desirable properties, namely, the function can be tailored to give the desired large-signal transient response while the small-signal bandwidth remains independent of input level.

Transient 2-dimensional simulation of a submicrometre gate-length m.e.s.f.e.t.

The large-signal transient step response of a 0.4 μm-gate-length GaAs m.e.s.f.e.t. has been computed with a full 2-dimensional simulation. The falltime is saturated drift velocity limited. Details of this transient calculation and the use of a higher order [O(h4)] finite-element method are described.

Nonlinear Hydro Governing Model and Improved Calculation for Determining Temporary Droop

The linear governing equations of L. M. Hovey are extended to describe the major nonlinearities of a hydro electric generating set. The resultant nonlinear governing model can be used to simulate the small and large signal transient response of an isolated generating set under any loading condition, and comparisons of such simulations with test results are given. The analysis of the paper demonstrates that Hovey's method of calculating temporary droop from a closed dashpot step response transient is inaccurate, and a corrected method is presented.