Large-signal Equivalent Circuit Research Articles

Large-Signal Equivalent Circuit for Datacom VCSELs – Including Intensity Noise

Optical interconnects (OIs) continue to require more and more sophisticated driver and receiver electronics as higher baud rates are pushed in datacom, mainly due to the bandwidth stagnation of the optoelectronic components such as the vertical-cavity surface-emitting laser (VCSEL) in the transmitter as well as the photodetector (PD) in the receiver. Another important focus is maintaining high energy efficiency for the OIs. For both cases, a reliable equivalent circuit model for high-speed VCSELs is required for link optimization. This work is an extension of our previously presented large-signal VCSEL equivalent circuit model, where noise is added to the physical processes that the VCSEL model is based on. Thus, a new step is taken in the strive of developing an even more accurate physics-based large-signal VCSEL equivalent circuit model for datacom applications. Following a detailed description of the VCSEL noise modelling, a presentation is given on simulated results of VCSEL relative intensity noise (RIN) spectrum and eye diagrams under 28 Gbaud on-off keying (OOK) and pulse-amplitude 4 (PAM4) modulation, and that are compared with corresponding measurement results. Good agreement is found over a wide range of VCSEL driving conditions and temperatures. A 28-GHz-bandwidth VCSEL is applied for the demonstration, and the presented noise extended VCSEL equivalent circuit model was implemented in Verilog-A, and the simulations were performed using Cadence Spectre.

An Extensive Large Signal Equivalent Circuit Model of GaAs-PIN Photodiode

Based on the variation trend of the depletion layer of GaAs-PIN photodiode (PD) under different optical power and reverse bias voltages, an extensive large-signal equivalent circuit model that characterizes PD in non-punch-through and punch-through states is proposed in this article. According to the analysis of the PD’s depletion layer variation, the nonlinear parameters of the model are described by exponential function and Gaussian function. To verify the reliability of equivalent circuit model, on-chip measurements were performed on PIN-PD fabricated by commercial GaAs process, and the measured <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}$ </tex-math></inline-formula> - <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}$ </tex-math></inline-formula> and reflection coefficient agree with the proposed model simulation results well. Furthermore, using the proposed model for simulation with CAD tools shows that reducing junction capacitance has potential in improving PD output power and gain flatness. At the same time, the model provides a certain reference for selecting bias condition in the design of the PD matching network and fabricating PD with high power output.

An Improved Large-Signal Equivalent Circuit Model for Partially Depleted Silicon-on-Insulator MOSFET

In this article, a nonlinear capacitance model for a large-signal compact model of partially depleted (PD) silicon-on-insulator (SOI) transistors is proposed. When the transistors are operated in the saturation and triode region, the gate-source capacitance ( C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> ) and the gate-drain capacitance ( C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gd</sub> ) change with the gate-source voltage ( V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> ) nonlinearly. C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> will emerge a significant compression phenomenon in the triode region. This capacitance model adds a hyperbolic tangent function to the conventional model's function to characterize this phenomenon. Besides, the nonlinear drain current model is obtained on the basis of a unified empirical model. To validate this improved large-signal equivalent circuit model, two different transistors are manufactured in a commercial 180-nm body-contact (BC) PD-SOI process. On-wafer measurement is implemented to obtain the experimental data. Then the calculated results of the model are compared with the measurement data. The relative root-mean-square-error (RRMSE) is less than 6.59% for output power, 9.03% for power-added efficiency (PAE), and 2.72% for the gain respectively.

Large-Signal Equivalent Circuit for Datacom VCSELs

Increasing the baud rate in optical interconnects (OIs) will require the use of more sophisticated driver and receiver electronics. This will help overcome the stagnated bandwidth of the Vertical-Cavity Surface-Emitting Laser (VCSEL) and the pin-photodetector. Next generation OIs operating at single lane rates of 50+ Gbaud will therefore require careful co-optimization of the electronics and the optoelectronics. To facilitate this work there is a need of an accurate equivalent circuit for the optoelectronic components, functioning over a broad drive current and ambient temperature range. The VCSEL is the most important and complex to model due to its non-linear behavior and strongly varying characteristics with drive current and ambient temperature. For this purpose, a large-signal equivalent circuit dedicated for high-speed datacom VCSELs has been developed and is presented here. The distributed electrical parasitics in the device layout are carefully considered, the intrinsic speed limitation from carrier transport effects in the Separate-Confinement-Heterostructure (SCH) and the carrier-photon interaction in the Quantum Wells (QWs) are included, and self-heating effects in the device are monitored. The circuit is purposely based on physical instead of empirical models so that it can provide usable feedback to VCSEL designers. For circuit demonstration, it is implemented in Keysight's Advanced Design System (ADS) software and thereafter applied to replicate the performance of a state-of-the-art 28-GHz-bandwidth VCSEL at different temperatures and drive currents. Comparison is made between simulated and measured steady-state characteristics, small-signal behavior, and large-signal response under 28 Gbaud On-Off-Keying (OOK) and Pulse-Amplitude-Modulation 4 (PAM4) modulation, showing good agreement.

On the Mechanisms of Linearity Peak Modeling in Common-Emitter SiGe HBTs Using Mextram 505

An important aspect of compact modeling for RF application is to accurately model the biasing current at which transistor linearity is maximized, i.e. where the third order intercept point, IP3, peaks. We have shown recently that for common-emitter SiGe HBTs, Mextram 504.12 has problem modeling the IP3 peak behavior at high injection [1]. We have further developed a couple of new modeling options in Mextram 505 [2] for CB junction depletion capacitance intended to improve IP3 peak modeling [1]. However, the detailed mechanisms of how these improved CB junction depletion capacitance models translate into IP3 peak modeling improvement remains unclear and require further investigation.For instance, the collector current, which is the output current, consists of the transistor main current In that flows from the collector to the emitter, and the CB junction capacitance discharging current that flows from the collector to the base. With the change of CB junction depletion capacitance model, which distortion current is dominant, In or the CB discharging current, in determining IP3 peak? Through detailed analysis of the harmonic components of the individual branch currents at the collector node of the Mextram large signal equivalent circuit, we find that the In distortion current dominates in determining IP3 peak behavior.The next logic question is if the In distortion current improvement with the Mextram 505 CB depletion capacitance models is directly due to the normalized base hole charge term, q1I in Mextram terminology, that goes directly into the In expression, or indirectly due to propagation of the CB discharging current induced distortion to IN, through circuit interactions. We will show that it is the later rather than the former with carefully designed custom Verilog-A codes of Mextram, by using separate CB depletion capacitance models in the main current equation formulation and the CB depletion charge equations. Changing the CB depletion capacitance model used in the main current equation leads to no visible changes in IP3, while changing the CB depletion capacitance model used in the CB depletion charge equation leads to obvious changes in third order output current and hence IP3. This proves that the observed third order distortion current improvement in In responsible for the improved IP3 peak modeling in Mextram 505 fundamentally results from the CB depletion charge term, despite the small values of third order distortion in the CB depletion charge current itself.We will then further examine how reducing the CB junction depletion capacitance might affect IP3 and how the partition between extrinsic and intrinsic CB junction capacitance affects IP3 peak behavior. Interestingly, simply making all CB depletion capacitance extrinsic gets rid of the IP3 peak modeling problem in Mextram 504, implying that the high injection related increase of the intrinsic CB junction depletion charge control voltage Vjunc and its related smooth limiting parameter Vch are the root problems. A reduction of CB depletion capacitance, intrinsic or extrinsic, is found to be beneficial for IP3 peak improvement.[1] G. Niu, H. Zhang, Y. Li, X. Ding, M. Willemsen, and A. Scholten, “Physics and Compact Modeling of SiGe HBT Linearity Using Mextram,” ECS Transactions, 86 (7), pp. 145-154, 2018.[2] G. Niu, R. van der Toorn, J. C. J. Paasschens, W. J. Kloosterman, The Mextram Bipolar Transistor Model, 505.10, Model Definition Document, Auburn University, 2019.

A novel model of avalanche current generation in the GaN HEMT equivalent circuit

We consider the large-signal equivalent circuit of a field-effect transistor (FET) with characteristics and parameters calculated using a two-dimensional (2D) quasi-hydrodynamic model while taking into account the electron velocity overshoot. In accordance with this equivalent circuit when applied to an AlGaN/GaN high-electron-mobility transistor (HEMT), the avalanche current (in the feedback branch) is zero at all operating points. However, this contradicts the significant difference seen between the results of time-domain simulations of a radiofrequency (RF) amplifier in which the transistor is simulated using a 2D model that does versus does not include the avalanche multiplication of the charge carriers. We propose a new model for the avalanche current generation, based on such simulations including the avalanche multiplication and on the theory of impact-ionization avalanche transit-time (IMPATT) diodes. This model allows the synthesis of amplifiers with high power-added efficiency (PAE).

Using Sampled-Data Modeling Method to Derive Equivalent Circuit and Linearized Control Method for Dual-Active-Bridge Converter

In this article, based on sampled-data modeling technique, a second-order equivalent circuit that can describe the global dynamic characteristics of dual active bridge (DAB) converter is developed. The proposed technique can characterize the dynamics of the ac current through the transformer and the output voltage. Afterward, by using a sensitive-based tool, named participation factor, it is identified which state variables are critical for system stability and which state variables provide negligible effects. On this basis, the large-signal equivalent circuit is simplified, meanwhile, the parasitic resistance is still taken into account by an intuitive “loss branch.” This model can be used to comprehensively investigate the relationship of the DAB converter stability versus circuit parameters, controller gain, input/reference voltage, and the load conditions, and these results can be expressed analytically. Furthermore, a linearized control method is proposed to eliminate the nonlinear terms in the equivalent circuit model. It facilitates to reduce the sensitivity of system stability to the load condition and reference voltage and helps to enlarge the stable region. Finally, the proposed model is validated by comparing the results obtained by the model with the simulations and experimental results. The effectiveness of the linearized control method is also demonstrated.

Modeling and Control of Double-Sided LCC Compensation Topology with Semi-Bridgeless Active Rectifier for Inductive Power Transfer System

This paper proposes the modeling and design of a controller for an inductive power transfer (IPT) system with a semi-bridgeless active rectifier (S-BAR). This system consists of a double-sided Inductor-Capacitor-Capacitor (LCC) compensation network and an S-BAR, and maintains a constant output voltage under load variation through the operation of the rectifier switches. Accurate modeling is essential to design a controller with good performance. However, most of the researches on S-BAR have focused on the control scheme for the rectifier switches and steady-state analysis. Therefore, modeling based on the extended describing function is proposed for an accurate dynamic analysis of an IPT system with an S-BAR. Detailed mathematical analyses of the large-signal model, steady-state operating solution, and small-signal model are provided. Nonlinear large-signal equivalent circuit and linearized small-signal equivalent circuit are presented for intuitive understanding. In addition, worst case condition is selected under various load conditions and a controller design process is provided. To demonstrate the effectiveness of the proposed modeling, experimental results using a 100 W prototype are presented.

A Nonlinear Lumped Equivalent Circuit Model for a Single Uncollapsed Square CMUT Cell.

An accurate nonlinear lumped equivalent circuit model is used for modeling of capacitive micromachined ultrasonic transducers (CMUTs). Finite-element analysis (FEA) is a powerful tool for the analysis of CMUT arrays with a small number of cells while with the harmonic balance (HB) analysis of the lumped equivalent circuit model, the entire behavior of a large-scale arbitrary CMUT array can be modeled in a very short time. Recently, an accurate nonlinear equivalent circuit model for uncollapsed single circular CMUT cells has been developed. However, the need for an accurate large-signal circuit model for CMUT cells with square membranes motivated us to produce a new nonlinear large-signal equivalent circuit model for uncollapsed CMUT cells. In this paper, using analytical calculations and FEA as the tuning tool, a precise large signal equivalent circuit model of square CMUT dynamics was developed and showed excellent agreement with finite-element modeling (FEM) results. Then, different CMUT single cells with square and circular membranes were fabricated using a standard sacrificial release process. Model predictions of resonance frequencies and displacements closely matched experimental vibrometer measurements. The framework presented here may prove valuable for future design and modeling of CMUT arrays with square membranes for ultrasound imaging and therapy applications.

Power Supply- and Temperature-Aware I/O Buffer Model for Signal-Power Integrity Simulation

This paper presents the development and evaluation of a large-signal equivalent circuit model that accounts for the power supply fluctuation and temperature variation of I/O buffers circuit designed based on the fully depleted silicon on insulator (FDSOI) 28 nm process for signal-power integrity (SPI) simulation. A solid electrical analysis based on the working mechanisms of the nominal I/O buffer information specification- (IBIS-) like model is presented to support the derivation of an accurate and computationally efficient behavioral model that captures the essential effects of the power supply bouncing under temperature variation. The formulation and extraction of the Lagrange interpolating polynomial are investigated to extend the nominal equivalent circuit model. The generated behavioral model is implemented using the Newton-Neville’s formula and validated in simultaneous switching output buffers (SSO) scenario under temperature variation. The numerical results show a good prediction accuracy of the time domain voltage and current waveforms as well as the eye diagram of the high-speed communication I/O link while speeding-up the transient simulation compared to the transistor level model.

Method for simulating efficient RF operation of HEMTs

For estimating the potential of an AlGaN/GaN HEMT, we simulate a model amplifier with this transistor in the time domain. The base of this simulation is the earlier proposed two-dimensional model of electron-hole plasma in HEMTs, which takes into account the effects of electron velocity overshoot and avalanche multiplication of charge carriers due to impact ionization. The matching elements of the amplifier are obtained by means of the intrinsic transistor large-signal equivalent circuit. Using the time domain simulations, we calculate the power-added efficiency and other amplifier parameters as functions of the maximum available power of the input RF generator at a frequency of 18 GHz. The maximum power-added efficiency of 35% is one of our results.

A compact D-band monolithic APDP-based sub-harmonic mixer

The paper presents a compact D-band monolithic sub-harmonic mixer (SHM) with 3μm planar hyperabrupt schottky-varactor diodes offered by 70nm GaAs mHEMT technology. According to empirical equivalent-circuit models, a wide-band large signal equivalent circuit model of the diode is proposed. Based on the extracted model, the mixer is implemented and optimized with a shunt-mounted anti-parallel diode pair (APDP) to fulfill the sub-harmonic mixing mechanism. Furthermore, a modified asymmetric three-transmission-line coupler is devised to achieve high-level coupling and minimize the chip size. The measured results show that the conversion gain varies between −13.9dB and −17.5dB from 110GHz to 145GHz, with a local oscillator (LO) power level of 14dBm and an intermediate frequency (IF) of 1GHz. The total chip size including probe GSG pads is 0.57×0.68mm2. In conclusion, the mixer exhibits outstanding figure-of-merits.

Generic tool for the simulation of electrochemical fuel cell monitoring techniques

Within this paper, the development and parameterization of multipurpose dynamic large-signal equivalent circuits (dLSEC) analogues of fuel cells (FC), which are capable of describing polarization curves, electrochemical impedance spectra, current steps and harmonic distortion experiments, is presented. The differences of these equivalent circuits compared to commonly applied small signal equivalent circuits in electrochemistry are discussed. The proposed electrochemical analogues, which serve as multipurpose dLSEC building blocks for complete FC analogues, are explained in detail. Furthermore, an in-house manufactured membrane electrode assembly is tested in a custom FC in order to validate the exemplary model and the proposed fitting procedure thereof. Electrochemical impedance spectroscopy data at different operating points i.e. current densities, the open circuit voltage and a differential evolution algorithm are applied to parameterize the analogue. Finally, the parameterized model is applied to simulate experimental results, and compared to real measurements, which were not used for the parameterization procedure itself.

A Large-Signal Statistical Model and Yield Estimation of GaN HEMTs Based on Response Surface Methodology

A novel nonlinear large-signal equivalent circuit statistical model of GaN HEMTs based on response surface methodology (RSM) is proposed in this letter. Thirty-four GaN HEMTs from 10 batches are measured and all the parameters in the large-signal equivalent circuit model are extracted by an in-house parameters extraction program. We choose the four most sensitive parameters of the drain-source current model and the gate charge model. The statistical method is modeled by using response surface methodology to change the range of the four parameters. The statistical model is implemented in Agilent-ADS and three S-band GaN HEMT power amplifier are designed by using the established statistical model for validation. The results show that good accuracy has been achieved by comparing measured and simulated output power (Pout) and power added efficiency (PAE). This method is simple and accurate for GaN HEMT power amplifier design and yield estimation.

An improved temperature-dependent large signal model of microwave GaN HEMTs**Project supported by the National Natural Science Foundation of China (No. 61106115).

Accurate modeling of the electrothermal effects of GaN electronic devices is critical for reliability design and assessment. In this paper, an improved temperature-dependent model for large signal equivalent circuit modeling of GaN HEMTs is proposed. To accurately describe the thermal effects, a modified nonlinear thermal sub-circuit which is related not only to power dissipation, but also ambient temperature is used to calculate the variations of channel temperature of the device; the temperature-dependent parasitic and intrinsic elements are also taken into account in this model. The parameters of the thermal sub-circuit are extracted by using the numerical finite element method. The results show that better performance can be achieved by using the proposed large signal model in the range of −55 to 125 °C compared with the conventional model with a linear thermal sub-circuit.

Mathematical simulation for estimating the potential of the hydrogen-terminated diamond FET in the mm-wave range

The estimation is based on the intrinsic transistor large-signal lumped-element equivalent circuit with the parameters and spline characteristics calculated by means of a two-dimensional model of the transistor active region. This model includes the quasi-hydrodynamic model of hole transport (with very low mobility on the surface), equations of the electric field, and dipole model of the hydrogen-terminated diamond surface. The object of simulation is the structure of a real 100-nm-long gate single-crystal diamond transistor, which is recovered by fitting the simulated output current---voltage characteristics to the experimental. Using the frequency-domain simulation of a power amplifier with such a transistor, a number of RF parameters (power-added efficiency, output power, and others) are calculated as functions of the maximum available power of the RF generator at frequencies of 30 and 60 GHz.

An Electrothermal Model for Empirical Large- Signal Modeling of AlGaN/GaN HEMTs Including Self-Heating and Ambient Temperature Effects

Accurate modeling of electrothermal effects of GaN electronic devices is critical for reliability design and assessment. In this paper, an electrothermal model for large signal equivalent circuit modeling of AlGaN/GaN HEMTs including self-heating and ambient temperature effects is presented. To accurately describe the effect of ambient temperature, two separate electrothermal networks (I diss , R diss , and C diss for self-heating, and I amb , R amb , and C amb for ambient temperature effect) are used to describe drain-source current slump due to self-heating and ambient temperature effects, respectively. A temperature-dependent thermal resistance and thermal capacitance model is proposed and implemented in the electrothermal network. The extraction of the thermal parameters is fulfilled by using numerical finite-element method. Single tone on wafer load-pull measurements at two operating frequencies (3 and 14 GHz) are carried out for verification purposes. The results show that good agreements on fundamental output power, the second and third harmonics output power, and power added efficiency have been achieved between simulations and measurements over a wide range of -55 °C to 175 °C.

Planar Schottky varactor diode and corresponding large signal model for millimeter-wave applications

A GaAs-based planar Schottky varactor diode (PSVD) is successfully developed to meet the demand of millimeter-wave harmonic generation. Based on the measured S-parameter, I–V and C–V characteristics, an accurate and reliable extraction method of the millimeter-wave large signal equivalent circuit model of the PSVD is proposed and used to extract the model parameters of two PSVDs with Schottky contact areas of 160 μm2 and 49 μm2, respectively. The simulated S-parameter, I–V and C–V performances of the proposed physics-based model are in good agreement with the measured one over the frequency range from 0.1 to 40 GHz for wide operation bias range from −10 to 0.6 V for these two PSVDs. The proposed equivalent large signal circuit model of this PSVD has been proven to be reliable and can potentially be used to design microwave circuits., planar Schottky varactor diode

A Straightforward Methodology to Modeling High Power Factor AC–DC Converters

In this paper, a straightforward methodology to modeling high power factor (HPF) ac-dc converters is presented. The proposed methodology is based on the averaging technique directly applied to the converter under modeling. An averaged large-signal equivalent circuit is thus generated, which is useful to perform extremely fast simulations. From the large-signal model, both a steady-state and a small-signal analysis can be carried out to completely model the converter, achieving any desired steady-state characteristic and small-signal transfer function. The presented methodology is very intuitive and allows designers to achieve a natural understanding of the converter behavior. The methodology is illustrated with a HPF buck-boost converter operating in discontinuous conduction mode. Simulation and experimental results are provided to validate the proposed methodology.

An improved lumped element nonlinear circuit model for a circular CMUT cell

This paper describes a correction and an extension in the previously published large signal equivalent circuit model for a circular capacitive micromachined ultrasonic transducer (CMUT) cell. The force model is rederived so that the energy and power is preserved in the equivalent circuit model. The model is able to predict the entire behavior of CMUT until the membrane touches the substrate. Many intrinsic properties of the CMUT cell, such as the collapse condition, collapse voltage, the voltage-displacement interrelation and the force equilibrium before and after collapse voltage in the presence of external static force, are obtained as a direct consequence of the model. The small signal equivalent circuit for any bias condition is obtained from the large signal model. The model can be implemented in circuit simulation tools and model predictions are in excellent agreement with finite element method simulations.