Large Power Consumption Research Articles

ITAP

Graphics Processing Units (GPUs) are widely used as the accelerator of choice for applications with massively data-parallel tasks. However, recent studies show that GPUs suffer heavily from resource underutilization, which, combined with their large static power consumption, imposes a significant power overhead. One of the most power-hungry components of a GPU—the execution units—frequently experience idleness when (1) an underutilized warp is issued to the execution units, leading to partial lane idleness, and (2) there is no active warp to be issued for the execution due to warp stalls (e.g., waiting for memory access and synchronization). Although large in total, the idle time of execution units actually comes from short but frequent stalls, leaving little potential for common power saving techniques, such as power-gating. In this article, we propose ITAP , a novel idle-time-aware power management technique, which aims to effectively reduce the static energy consumption of GPU execution units. By taking advantage of different power management techniques (i.e., power-gating and different levels of voltage scaling), ITAP employs three static power reduction modes with different overheads and capabilities of static power reduction. ITAP estimates the idle period length of execution units using prediction and peek-ahead techniques in a synergistic way and then applies the most appropriate static power reduction mode based on the estimated idle period length. We design ITAP to be power-aggressive or performance-aggressive, not both at the same time. Our experimental results on several workloads show that the power-aggressive design of ITAP outperforms the state-of-the-art solution by an average of 27.6% in terms of static energy savings, with less than 2.1% performance overhead. However, the performance-aggressive design of ITAP improves the static energy savings by an average of 16.9%, while keeping the GPU performance almost unaffected (i.e., up to 0.4% performance overhead) compared to the state-of-the-art static energy savings mechanism.

Interface Engineering via MoS2 Insertion Layer for Improving Resistive Switching of Conductive‐Bridging Random Access Memory

AbstractConductive‐bridging random access memory (CBRAM), dominated by conductive filament (CF) formation/rupture, has received much attention due to its simple structure and outstanding performances for nonvolatile memory, neuromorphic computing, digital logic, and analog circuit. However, the negative‐SET behavior can degrade device reliability and parameter uniformity. And large RESET current increases power consumption for memory applications. By inserting 2D material, molybdenum disulfide (MoS2), for interface engineering with the device configuration of Ag/ZrO2/MoS2/Pt, the negative‐SET behavior is eliminated, and the RESET current is reduced simultaneously. With the ion barrier property of MoS2, the CF can probably not penetrate the MoS2 layer, thus eliminating the negative‐SET behavior. And with the low thermal conductivity of MoS2, the internal temperature of the device would be relatively high at RESET, accelerating probably redox reactions. As a result, the RESET current is reduced by an order of magnitude. This interface engineering opens up a way in improving the resistive switching performances of CBRAM, and can be of great benefit to the potential applications of MoS2 in next‐generation data storage.

Performance analysis and small signal identification of time-resolved stand-off Raman spectroscopy system

Over the last decade, the time-resolved stand-off Raman spectroscopy has attracted considerable attention due to its daytime measurement model and fluorescent suppression. Suffering from the small Raman scattering efficiency, this system perusing large detection distance requires both large power consumption and optical system, which blocks its applications. In order to seek for high signal collection efficient, in this work, we designed a 2-inch refractive telescope system, and obtained 20 m detection distance using a frequency-doubled 532 nm Nd: YAG laser with pulse energy of 30 mJ. By adjusting the excitation energy through a variable attenuator, we investigate the interrelations of input power, the signal and the noise consisting of the internal and signal-induced noises. For both main peak and sub peak, the signal-induced noises are subject to a power function of the signal intensity, and can be filtered and smoothed by the norm-distribution-function weighted moving average method (WMAM) without the loss of the signal information. After transforming the correlation spectrum, defined by the multiplication of the noise and signal spectrum, iteratively by WMAM, we can identify the small signal of about 1 count beyond the internal noise limitation. With help of the iteration method, the requirement of integration time as well as the excitation energy can be greatly reduced.

Application of PVStorage System in Typical Industrial Users

The power consumption of industrial enterprises is characterized by large power consumption and high reliability requirement, so the cost of electricity consumption is relatively high. Distributed photovoltaic power generation is clean and environmentally friendly, making full use of the roof area to generate electricity. Based on the characteristics of distributed photovoltaic and energy storage, this paper constructs the distributed optical storage model and operation strategy. In addition, this paper takes an industry as an example to carry out relevant verification and analysis.

Design of an electronic label for logistics temperature monitoring with low power consumption

There are many problems when traditional temperature sensing radio frequency identification (RFID) tags are applied to logistics temperature monitoring, such as inconvenient data reading, large power consumption, and low bandwidth. Therefore, a low-dissipation electronic tag is designed in this paper to solve the above problems. The electronic tag and the portable temperature recorder were placed in the same position in the same refrigeration unit, and the temperature of the same space was recorded at the same time. The data measured by the designed electronic tag was used as the measured value, and the data measured by the portable temperature recorder was used as the standard value. The correlation coefficient between the two was calculated to be 0.866 9, the root mean square error (RMSE) was 0.796 7 °C, and the average relative deviation (ARD) was 16.21%. Therefore, the electronic tag designed in this study can meet the requirements of users for temperature monitoring and recording. The temperature control switch designed in this study can disconnect the power supply to single chip microcomputer (SCM) and other modules when the temperature is in the range of normal threshold, so that the power consumption is further reduced and the cost is reduced. The results of this study laid a foundation for the development of low-cost and easy-to-use temperature monitoring technology in the logistics process.

Preamble Design for UAV Communications Over Cellular Networks

Unmanned aerial vehicle (UAV) communications over cellular networks are currently gaining increased interest because it can enable real-time control of UAVs and wide-area coverage. We discuss various challenges for future UAV cellular networks, where cellular networks with down-tilted antennas optimized for terrestrial users can extend terrestrial cellular services to aerial users. To overcome challenges such as large channel variation and UAV power consumption in UAV cellular networks, we propose a technique of preamble design for these networks using scalable sequences. Specifically, three types of scalable sequences are proposed for efficient use of battery power in UAVs, namely, maximum-length scalable sequence, Zadoff–Chu scalable sequence, and linear frequency modulated (LFM) scalable sequence. The properties of these scalable sequences are analyzed and compared through simulations in different channel environments.

Architecture and Circuit Choices for 5G Millimeter-Wave Beamforming Transceivers

As 5G takes advantage of the vast amount of available spectrum in the mmWave bands, system and circuit designers face new challenges to create efficient, high-performance phased array transceivers. This article covers scaled CMOS circuit and system tradeoffs for large mmWave power consumers including the PA, LO generation, and LO distribution, in the context of mobile link requirements and beamforming system architectures. We survey a selection of published mmWave transceivers relevant to 5G communications and provide insight into tradeoffs made in practice. Finally, we discuss the application of these concepts toward E-band 71-76 GHz circuit blocks in the Intel 22FFL FinFET process with measurement results.

Systematic approach to evaluating environmental and ecological technologies for wastewater treatment

Evaluating the performance of wastewater treatment represents a challenging and complex task as it usually involves engineering, environmental and economic (3E) factors. In this study, we developed an 3E triangle model to evaluate the performance of environmental technologies (i.e., anaerobic-anoxic-oxic reactors, oxidation ditches, and membrane bioreactors) and ecological technologies (i.e., stabilization ponds, constructed wetlands, and slow-rate systems) for wastewater treatment. A total of 17 key performance indicators, such as energy consumption, pollutant removal, global warming potential and wastewater treatment fees, were considered in the 3E triangle model. The results indicated that, in terms of engineering performance, both the membrane bioreactors and constructed wetlands were stable, effective and reliable during their operating periods. When the environmental impacts of wastewater treatment technologies were compared via a life cycle assessment, the ecological technologies showed superior performance, in terms of environmental impacts, especially for the global warming potential and eutrophication potential. In general, environmental technologies exhibited higher treatment fees and unit construction costs because of their large power consumption and equipment costs. In contrast, ecological technologies had higher unit land use due to their large area requirements and low treatment capacity. In overall, both the membrane bioreactors and constructed wetlands showed excellent overall performance in the 3E triangle model. Wastewater treatment plant are typical case studies for addressing the interactions of water and energy elements. Reducing energy consumption is a hotspot for the research field of membrane bioreactors, while constructed wetlands are continually improved and optimized to have broad applications for rural wastewater treatment.

TSV-integrated thermoelectric cooling by holey silicon for hot spot thermal management

The trends toward higher power, higher frequency, and smaller scale electronics are making heat dissipation ever more challenging. Passive thermal management based on high thermal conductivity materials or through-silicon vias (TSVs) may not provide sufficient cooling for hot spots reaching 1 kW cm−2, and active thermal management by thermoelectric cooling (TEC) may require large power consumption or suffer from a large off-state thermal resistance of thermoelectric materials. Here we address these issues by integrating a holey silicon-based TEC with a TSV that directly draws heat from a hot spot to combine active and passive cooling approaches. Our simulations of the TSV-integrated TEC demonstrate exceptional cooling performance, which reduces the hot spot temperature from 154 °C to 68 °C while dissipating a heat flux of 1 k W cm−2 and consuming 0.5 W for TEC operation. The off-state hot spot temperature, 154 °C, is 24 °C lower than that of the same TEC with no TSV, and the on-state hot spot temperature, 68 °C, is 67 °C lower than that of the same TEC with no TSV. We also investigate the cooling prospects of metal-filled holey silicon by modeling the electron–phonon coupling and size dependent transport phenomena, which can further increase the thermal conductivity anisotropy and improve the TEC performance depending on the metal-to-silicon interfacial resistance. These results show the combined passive and active cooling in TSV-integrated TEC offers effective hot spot thermal management solutions for advanced electronics.

A Split-Gate Positive Feedback Device With an Integrate-and-Fire Capability for a High-Density Low-Power Neuron Circuit

Hardware-based spiking neural networks (SNNs) to mimic biological neurons have been reported. However, conventional neuron circuits in SNNs have a large area and high power consumption. In this work, a split-gate floating-body positive feedback (PF) device with a charge trapping capability is proposed as a new neuron device that imitates the integrate-and-fire function. Because of the PF characteristic, the subthreshold swing (SS) of the device is less than 0.04 mV/dec. The super-steep SS of the device leads to a low energy consumption of ∼0.25 pJ/spike for a neuron circuit (PF neuron) with the PF device, which is ∼100 times smaller than that of a conventional neuron circuit. The charge storage properties of the device mimic the integrate function of biological neurons without a large membrane capacitor, reducing the PF neuron area by about 17 times compared to that of a conventional neuron. We demonstrate the successful operation of a dense multiple PF neuron system with reset and lateral inhibition using a common self-controller in a neuron layer through simulation. With the multiple PF neuron system and the synapse array, on-line unsupervised pattern learning and recognition are successfully performed to demonstrate the feasibility of our PF device in a neural network.

Price-Sensitivity Aware Load Balancing for Geographically Distributed Internet Data Centers in Smart Grid Environment

In this paper, we investigate the problem of developing a geographical load balancing (GLB) scheme for distributed Internet data centers (IDCs) when they are price-makers in the deregulated electricity markets, i.e., GLB may impose impact on electricity prices in IDC locations due to the large power consumption of IDCs. Taking into account the dynamic characteristics (e.g., time-varying power demands and generation outputs) and actual physical constraints (e.g., active/reactive power flow balancing, transmission congestion, and network loss) of smart grids, it is difficult to obtain price impact models with analytical expressions accurately. As a result, it is challenging to design an efficient GLB scheme without requiring price impact models. To overcome the above challenge, we propose a price-sensitivity aware GLB scheme. The key idea of the proposed scheme is to impose proper limits on the workloads allocated to the IDC locations with high price-sensitivity coefficients by exploiting a number of interactive information between IDCs and main grids, so that the sudden increase in the total cost could be avoided. Here, the price-sensitivity coefficient is defined as the ratio of the percentage change in price to the percentage change in IDC power demand. Extensive simulation results show the effectiveness of the proposed GLB scheme.

Complementary Logic with Voltage Zero‐Loss and Nano‐Watt Power via Configurable MoS2/WSe2 Gate

AbstractDue to the development of 2D material transistors research and preparation process, many fundamental logic units, like inverter and NAND gate, have been achieved to promote large‐scale integration. However, there are critical challenges like voltage loss and large dynamic power consumption for integrated circuits based on 2D semiconductors. Here high‐performance logic devices via different MoS2‐WSe2 configurations, a MoS2‐WSe2 complementary logic transmission gate with the ability to transport electrical level without any voltage loss and a MoS2‐WSe2 complementary logic inverter with small dynamic power consumption and maximum voltage gain of 18 are demonstrated. Furthermore, an essential logic unit like Schmidt flip‐flop is put forward by combining MoS2‐WSe2 inverter and graphene floating gate. The realization of various logics achieved by different MoS2‐WSe2 configurations makes it much easier to fabricate multifunctional system on a chip, which has a significant meaning for the development of high density integrated circuits.

Laser methane sensor and its field application in coal mine safety

Based on the principle of laser absorption spectroscopy, a laser methane sensor for mine use has been developed. The design of the sensor system is discussed and its practical application for methane detection in coal mines is considered. A control system coupled to the sensor has been developed and the results obtained show the high quality of the performance of the laser methane sensor over the traditional catalytic combustion sensor and infrared sensor in many performance aspects, such as large range, high precision and low power consumption

Reducing the Power Consumption of a Shape Memory Alloy Wire Actuator Drive by Numerical Analysis and Experiment

The use of shape memory alloy (SMA) wire actuators for a moving body has some advantages over other conventional actuators because of the high specific power, small size, and simplicity of these actuators. However, the large power consumption of SMA wire actuators prevents its practical use. This paper shows how to optimize the input voltage of SMA wire actuators. First, a numerical actuator model is created from the measured data. Next, input voltage waves are optimized for three evaluation functions using multiobjective optimization: maximum input voltage, time-averaged actuators power consumption, and time-averaged bending moment (the output of actuator). The obtained numerical results show that a high maximum input voltage achieves efficient drive of SMA wire actuators. We also verified the tradeoff relations of the consumed power, maximum input voltage, and output from the SMA wire actuator under one condition of the multiobjective optimization. Experimental data also partially supported the tradeoff relations obtained by the multiobjective optimization and the numerical simulation.

A single chip electron spin resonance detector based on a single high electron mobility transistor

Single-chip microwave oscillators are promising devices for inductive electron spin resonance spectroscopy (ESR) experiments on nanoliter and subnanoliter samples. Two major problems of the previously reported designs were the large minimum microwave magnetic field (0.1–0.7 mT) and large power consumption (0.5–200 mW), severely limiting their use for the investigation of samples having long relaxation times and for operation at low temperatures. Here we report on the design and characterization of a single-chip ESR detector operating with a microwave magnetic field and a power consumption orders of magnitude lower compared with previous designs. These significant improvements are mainly due to the use of a high electron mobility transistor (HEMT) technology instead of a complementary metal-oxide semiconductor (CMOS) technology. The realized single-chip ESR detector, which operates at 11.2 GHz, consists of an LC Colpitts oscillator realized with a single high-electron mobility transistor and a co-integrated single turn planar coil having a diameter of 440 μm. The realized detector operates from 300 K down to 1.4 K, at least. Its minimum microwave magnetic field is 0.4 μT at 300 K and 0.06 μT at 1.4 K, whereas its power consumption is 90 μW at 300 K and 4 μW at 1.4 K, respectively. The experimental spin sensitivity on a sensitive volume of about 30 nL, as measured with a single crystal of α,γ-bisdiphenylene-β-phenylallyl (BDPA)/benzene complex, is of 8 × 1010 spins/Hz1/2 at 300 K and 2 × 109 spins/Hz1/2 at 10 K, respectively. In a volume of about 100 pL, located in proximity to the coil wire, the spin sensitivity improves by two orders of magnitude.

Noise‐enhanced field emission current from a carbon nanotube cantilever

Field emission current is widely used to measure various characteristics of nanoscale. In this Letter, a cantilever of a carbon nanotube is focused and the amplification of the current is discussed. Increasing the voltage which induces the current gives the amplification; however, this method results in the large power consumption. This Letter provides the alternative solution with the use of the surrounding noise. Exploiting the non-linear behaviour of the current and introducing a signal processing of time-averaging, the amplification is observed. The theoretical discussion provides the concrete theory of the amplification: essentially such an effect is obtained by the modulation of the probability density of the noisy voltage. The numerical results demonstrate the effectiveness of the method.

Survey: Performance Analysis of FIR Filter Design Using Modified Truncation Multiplier with SQRT based Carry Select Adder

A recent years of technology development in Signal processing application a FIR (Finite impulse response) filter design will have a highly compactable with high performance and low power in all digital signal processing application, such as audio processing, signal processing, software define radio and so on. Now a days in our environment will have more signal noises, and fluctuation due to technology development, here the Filter design is mainly configuring the priority to reduce the signal noises and fluctuation in all type of gadgets. In this project, the design contains Transpose form of high performance and high speed filter design using finite impulse response (FIR) filter with technique of pipelined inherently and supported multiple constant multiplication (MCM) in significant with saving power computation. In digital signal processing, the multiplier is a highly required thing, the example of parallel multiplier provide a high-speed and highly reliable method for multiplication, but this parallel multiplier will take large area and also power consumption. In the FIR filter design, multiplier and adders is the maximum priority will take to give the performance, but this MCM multiplier and Adders tree architecture will take large area and maximum power consumption in signal processing. So our Proposed approach of this work, will have replace the MCM multiplier to Truncated Multiplier and using the technique of Truncated based both Signed and Unsigned Operation with SQRT based Carry Select Adder (CSLA), and also replace the normal adders in FIR Filter to SQRT based Carry Select Adder (CSLA). In the proposed system of FIR Filter design results to be analysis with signed and unsigned Truncation using modified technique of HSCG-SCS based SQRT-CSLA and hence proved its more efficient than existing design, such as FIR filter for Truncation multiplier with SQRT-CSLA based Adders, FIR filter for Truncation multiplier with BEC based Adders, FIR filter for Truncation multiplier with RCA, and FIR filter for Truncation multiplier with Common Boolean logic based RCA, and finally implemented this design on VHDL with help of Xilinx FPGA-S6LX9 and shown the performance of proposed design in terms of delay, area, and power.

High-performance field-effect transistors based on gadolinium doped indium oxide nanofibers and their application in logic gate

One-dimensional metal oxide nanofibers have been regarded as promising building blocks for large area low cost electronic devices. As one of the representative metal oxide semiconducting materials, In2O3 based materials have attracted much interest due to their excellent electrical and optical properties. However, most of the field-effect transistors (FETs) based on In2O3 nanofibers usually operate in a depletion mode, which lead to large power consumption and a complicated integrated circuit design. In this report, gadolinium (Gd) doped In2O3 (InGdO) nanofibers were fabricated by electrospinning and applied as channels in the FETs. By optimizing the doping concentration and the nanofiber density, the device performance could be precisely manipulated. It was found that the FETs based on InGdO nanofibers, with a Gd doping concentration of 3% and a nanofiber density of 2.9 μm−1, exhibited the best device performance, including a field-effect mobility (μFE) of 2.83 cm2/V s, an on/off current ratio of ∼4 × 108, a threshold voltage (VTH) of 5.8 V, and a subthreshold swing (SS) of 2.4 V/decade. By employing the high-k ZrOx thin films as the gate dielectrics in the FETs, the μFE, VTH and SS can be further improved to be 17.4 cm2/V s, 0.7 V and 160 mV/decade, respectively. Finally, an inverter based on the InGdO nanofibers/ZrOx FETs was constructed and a gain of ∼11 was achieved.

A Novel Algorithm for Enhancement of Energy Efficient Zone Based Routing Protocol for MANET

Mobile Ad-hoc Network (MANET) is a group of self-sustaining movable nodes which are communicating to other nodes in the networks through wireless connections. The motile nodes within the communication range can directly communicate with each other, whereas other nodes require the support of neighbouring nodes by using routing protocols. Most routing protocols are utilizing the rebroadcasting techniques to reduce the path overhead. An energy efficient zone based routing protocols are developed to reduce the redundant broadcasting through on-demand parallel collision guided broadcasting. Nevertheless, the broadcast storm is occurring due to transmit of simultaneous collision guided broadcasting which causes larger power consumption. Hence, this paper deals with a novel algorithm to increase the energy efficient zone based routing protocols which control the network topology by estimating node die out rate. Furthermore, a game theory approach with energy efficient zone based routing protocol to improve QoS routing for MANET. Finally, the experimental outcomes proved the efficiency of the proposed algorithm compared with other routing algorithms.

A Novel Architecture of Radix-3 Singlepath Delay Feedback (R3SDF) FFT Using MCSLA

Fast Fourier transform (FFT) is widely used in digital signal processing and telecommunications, particularly in orthogonal frequency division multiplexing systems, to overcome the problems associated with orthogonal subcarriers. A new algorithm of radix-3 FFT has been introduced in this work. The DFT of length N can be realized from three DFT sequences; each of length N/3.Radix-3 algorithm reduces the number of multiplications required for realizing DFT.A novel design of Radix-3pipelined Single path Delay Feedback (R3SDF) FFT using MCSLA has been proposed in this paper. First, the pipelined radix-3 SDF FFT method has been designed. It has less area and large power consumption and delay. In order to overcome these problems, modified carry select adder structure is used to perform the adder operation for reducing the power consumption and delay. Finally, the MCSLA is integrated into radix-3 SDF FFT processor. The hardware complexity and execution time for implementing radix-3 FFT algorithm can be reduced than other FFTs.