Purpose This study aims to propose a new connection technique of bypass diode (BD) in photovoltaic (PV) array, which reduces the circulating current (CC) within PV modules as well as conduction loss in partial shaded condition (PSC). Design/methodology/approach Linearized circuit model of PV panel is proposed for calculating the CC and power loss of novel BD arrangements in PV array. From the analysis the best BD arrangement is applied in series parallel, TCT and honeycomb (HC) PV array structure for simulation and hardware verification. The hardware verification is performed in a 3 × 3 PV array, where individual panel capacity is 200 W. Findings The proposed BD arrangement reduces the power loss due to CC under PSC by almost 3% compared to conventional BD structure in a PV array. Originality/value The proposed BD arrangement is simple and useful in large PV power plants to reduce the CC-based extra power loss under PSC.
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