Large Memory Capacity Research Articles

E-Passport Threats

The International Civil Aviation Organization (ICAO) standardized e-passports by specifying how to implement and protect machine-readable travel documents. E-passports have embedded contactless chips that can be read by radio from tip to a few centimeters away. The ICAO chose this technology over magnetic strips and 2D barcodes because it provides reliable connection, large memory capacity, random access, and rewritable memory. As with many other RFID devices, the chip in e-passports uses a 32-bit number for collision avoidance. Every country maintains its own public-key infrastructure (PKI) and exchanges root certificates with other countries via diplomatic means. Agencies issuing e-passports have their own public keys and certificates from the PKI. In this way, a passive authentication mechanism verifies every data group's digest. With today's e-passports, private information is limited to the MRZ and a digital picture, but the goal is to eventually add more biometrics at some point, along with a digitized handwritten signature.

Multiple modular very long instruction word processors based on field programmable gate arrays

Modern field programmable gate array (FPGA) chips, with their large memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high-density FPGAs, it is now possible to implement a high-performance very long instruction word (VLIW) processor core in an FPGA. This paper describes research results about enabling the DSP TMS320 C6201 model for real-time image processing applications by exploiting FPGA technology. We present a modular DSP C6201 VHDL model with a variable instruction set. We call this new development a minimum mandatory modules (M3) approach. Our goals are to keep the flexibility of DSP in order to shorten the development cycle and to use the totality of the powerful FPGA resources in order to increase real-time performance. Some common algorithms of image processing and a face tracking in video sequences application were created and validated on an FPGA VirtexII-2000 multimedia board using the development cycle proposed. Our results demonstrate that an algorithm can easily be, in an optimal manner, specified and then automatically converted to VHDL language and implemented on an FPGA device with system-level software. This makes our approach suitable for developing co-design environments. Our approach applies some criteria for co-design tools: flexibility, modularity, performance, and reusability. In this paper, the target VLIW processor is the DSP TMS320C6x. Nonetheless, our design cycle can be generalized to other DSP processors.

Mobile computing in critical care

Handheld computing devices are increasingly used by health care workers, and offer a mobile platform for point-of-care information access. Improved technology, with larger memory capacity, higher screen resolution, faster processors, and wireless connectivity has broadened the potential roles for these devices in critical care. In addition to the personal information management functions, handheld computers have been used to access reference information, management guidelines and pharmacopoeias as well as to track the educational experience of trainees. They can act as an interface with a clinical information system, providing rapid access to patient information. Despite their popularity, these devices have limitations related to their small size, and acceptance by physicians has not been uniform. In the critical care environment, the risk of transmitting microorganisms by such a portable device should always be considered.

Dynamic Role of Postsynaptic Caspase-3 and BIRC4 in Zebra Finch Song-Response Habituation

Activation of the protease caspase-3 is commonly thought to cause apoptotic cell death. Here, we show that caspase-3 activity is regulated at postsynaptic sites in brain following stimuli associated with memory (neural activation and subsequent response habituation) instead of cell death. In the zebra finch auditory forebrain, the concentration of caspase-3 active sites increases briefly within minutes after exposure to tape-recorded birdsong. With confocal and immunoelectron microscopy, we localize the activated enzyme to dendritic spines. The activated caspase-3 protein is present even in unstimulated brain but bound to an endogenous inhibitor, BIRC4 (xIAP), suggesting a mechanism for rapid release and sequestering at specific synaptic sites. Caspase-3 activity is necessary to consolidate a persistent physiological trace of the song stimulus, as demonstrated using pharmacological interference and the zenk gene habituation assay. Thus, the brain appears to have adapted a core component of cell death machinery to serve a unique role in learning and memory.

Evidence for large long-term memory capacities in baboons and pigeons and its implications for learning and the evolution of cognition

Previous research has shown that birds and primates have a rich repertoire of behavioral and cognitive skills, but the mechanisms underlying these abilities are not well understood. A common hypothesis is that these adaptations are mediated by an efficient long-term memory, allowing animals to remember specific external events and associate appropriate behaviors to these events. Because earlier studies have not sufficiently challenged memory capacity in animals, our comparative research examined with equivalent procedures the size and mechanisms of long-term memory in baboons and pigeons. Findings revealed very large, but different, capacities in both species to learn and remember picture-response associations. Pigeons could maximally memorize between 800 and 1,200 picture-response associations before reaching the limit of their performance. In contrast, baboons minimally memorized 3,500-5,000 items and had not reached their limit after more than 3 years of testing. No differences were detected in how these associations were retained or otherwise processed by these species. These results demonstrate that pigeons and monkeys have sufficient memory resources to develop memory-based exemplar or feature learning strategies in many test situations. They further suggest that the evolution of cognition and behavior importantly may have involved the gradual enlargement of the long-term memory capacities of the brain.

A temporal phase unwrapping algorithm for photoelastic stress analysis

Photoelastic stress analysis is a full-field optical technique for experimental stress analysis whose automation has received considerable research attention over the last 15 years. The latest developments have been made possible largely due to the availability of powerful calculators with large memory capacity and colour, high resolution, cameras. A further stimulus is provided by the photoelastic resins now used for rapid prototyping. However, one critical aspect which still deserves attention is phase unwrapping. The algorithms most commonly used for this purpose have been developed in other scientific areas (classical interferometry, profilometry, moiré, etc.) for solving different problems. In this article a new algorithm is proposed for temporal phase unwrapping, which offers several advantages over those used today.

Capacity and limits of associative memory in pigeons

How much information can a brain store over a lifetime's experience? The answer to this important, but little researched, question was investigated by looking at the long-term visual memory capacity of 2 pigeons. Over 700 sessions, the pigeons were tested with an increasingly larger pool of pictorial stimuli in a two-alternative discrimination task (incremented in sets of 20 or 30 pictures). Each picture was randomly assigned to either a right or a left choice response, forcing the pigeons to memorize each picture and its associated response. At the end of testing, 1 pigeon was performing at 73% accuracy with a memory set of over 1,800 pictures, and the 2nd was at 76% accuracy with a memory set of over 1,600 pictures. Adjusted for guessing, models of the birds' performance suggested that the birds had access, on average, to approximately 830 memorized picture-response associations and that these were retained for months at a time. Reaction time analyses suggested that access to these memories was parallel in nature. Over the last 6 months of testing, this capacity estimate was stable for both birds, despite their learning increasingly more items, suggesting some limit on the number of picture-response associations that could be discriminated and retained in the long-term memory portion of this task. This represents the first empirically established limit on long-term memory use for any vertebrate species. The existence of this large exemplar-specific memory capacity has important implications for the evolution of stimulus control and for current theories of avian and human cognition.

Control freaks [induction furnace logic controller

The induction furnace has been used in a massive range of applications from heating, melting and welding to shrink-fitting, forming, soldering and even plasma physics. Furnaces operate at frequencies between 10 Hz to 60 MHz, and as a result, different power supplies - operating at different frequencies - have also been developed. Induction steel heating furnaces (ISHF) have several advantages in practical applications. However, when a material is heated within an ISHF, its resistivity and magnetic permeability fluctuate, which proves detrimental to the control of power within the furnace. One way to improve power control within an ISHF is to use a programmable logic controller (PLC). Indeed, modern PLCs are modular, affordable, have large memory capacities, and also have special functions such as pulse wave modulation (PWM) and data communication. Using a PLC not only eases position, temperature and pressure control within the ISHF, but also provides overvoltage and overcurrent protection. A new PLC control system design allows heating to take place at constant power while maintaining a steady resonance frequency. The article introduces the system.

21.2: Full‐Functional System Liquid Crystal Display Using CG‐Silicon Technology

AbstractWe developed a system panel where a CPU, a graphic controller, memories, and an audio circuit are monolithically formed on a glass substrate forming an LCD, by using CG‐Silicon technology. The logic circuit comprises approximately 120,000 TFTs. This is the world first full‐functional system panel on which all the circuits required for system operations are mounted except large capacity memories.

Generation of Steam Tables Using Artificial Neural Networks

The industrial formulations for the thermodynamic properties of water/steam, which are approximations of the scientific one, are intended to be used in applications where computational speed is of importance, such as in power plant modelling and control. The traditional methods for implementing these tables in software imply either the use of polynomial algorithms, which demand long iteration times, or look-up tables, which require a large memory capacity. On the other hand, there is a group of useful tools, called Artificial Neural Networks (ANNs), that have been successfully applied for pattern recognition and function approximation tasks in, for instance, the areas of medicine, engineering, and economics. This paper aims to show the potential of ANNs for generating the water/steam tables. ANNs enable the production of user-friendly software, which furthermore increases the computational speed while sustaining good accuracy. This new approach avoids the limitations of the traditional methods and can be advantageously implemented in heat and mass balance programs to speed up calculations. Promising results obtained with this technique are highlighted in the present paper, demonstrating the reliability of using ANNs in lieu of polynomials algorithms and look-up tables.

Study on Mechanism of Domain Inversion in LiNbO3 and LiTaO3 and Its Application of Memory-nm Size Domain Inversion by EB Irradiation-

The ferroelectric large capacity memory that made direction of the spontaneous polarization of domain inversion correspond to binary values of a memory can be considered as one of the new devices adapting domain inversion technology. This paper describes the feature of LiNbO3 (LN) and LiTaO3 (LT) crystals investigated mainly for the purpose of memory application, the mechanism of domain inversion control, and its applicability in large capacity memory. LT crystal is considered to be a suitable material for nm-size polarization control memory, and this paper describes that the electron beam polarization controlling method is one of the methods effective for nm-size polarization control. Specifically, if thin LT crystal layer with a thickness of 1 μm can be formed, very small polarization structure with a diameter of less than 3 nm could be realizable. If polarization control of 1 dot is carried out into 10 nm × 10 nm region, a super-large capacity memory with a density of 1 T bit/cm2 may be realized.

Application of the Precise Time Integration Method to Unsteady Heat Conduction Problems (Study of Accuracy and Practicality of the Precise Time Integration Method)

A new numerical scheme, precise time integration (PTI) method was applied to unsteady heat conduction problems. The algorithm of the PTI method and the way to create coefficient matrices and vectors for the unsteady heat conduction problems were described in detail in this paper. The comparison between the PTI and the ordinary finite difference methods showed that the PTI method's solutions for one and two-dimensional heat conduction problems were more accurate than those of ordinary methods for a wide range of mesh Fourier number f. The comparison also showed that the PTI method needed larger memory capacity and longer time for calculations than the ordinary methods did.

The neural basis of executive function in working memory: an fMRI study based on individual differences

Using fMRI, neural substrates of the executive system were investigated with respect to differences in working memory capacity. To explore the executive control processes, reading span test (RST) and read conditions were performed. Two subject groups were selected: those with large working memory capacities, labeled high-span subjects (HSS) according to the reading span test, and those with small working memory capacities, labeled low-span subjects (LSS). Significant activation was found mainly in three regions in comparison with the control: anterior cingulate cortex (ACC), left inferior frontal gyrus (IFG), visual association cortex (VAC) and superior parietal lobule (SPL). For both groups, the fMRI signal intensity increased in ACC and IFG during the RST condition compared to that under the read condition. A group difference was also found in the ACC and IFG region, specifically a significant increase in signal intensity was observed only for the HSS group but not for the LSS group. Behavioral data also showed that the performance was better in HSS than in LSS. Moreover, the cross correlation of signal change between ACC and IFG was higher in HSS than in LSS, indicating that the network system between ACC and IFG was more activated in HSS compared to that of LSS. These results suggest that executive function, that is, working attention controlling system is more active in HSS than in LSS. Moreover, the results confirmed our hypothesis that there is a general neural basis for the central executive function in both RST and previous LST (listening span test) tasks despite differences in modality-specific buffers.

Protein circuitry

A new research project is underway in Japan. Matsushita Electric Industrial Co, the Tokyo Institute of Technology, the Nara Institute of Science and Technology and Osaka University have joined forces to develop a large-capacity memory device that uses protein circuitry. Proteins aggregate in predictable ways under certain conditions. The research team will exploit this. The memory of the planned device will be comparable to that of top-level silicon devices which can store 8Gb/cm2 of data. However, protein circuitry will consume just 1% of the power requirement of the silicon memory device. The Japanese Government is funding the research effort with ¥4bn over five years. Visit www.three-fives.com for the latest advanced semiconductor industry news

Human visual object categorization can be described by models with low memory capacity

Studies of high-level models of visual object categorization have left unresolved issues of neurobiological relevance, including how features are extracted from the image and the role played by memory capacity in categorization performance. We compared the ability of a comprehensive set of models to match the categorization performance of human observers while explicitly accounting for the models’ numbers of free parameters. The most successful models did not require a large memory capacity, suggesting that a sparse, abstracted representation of category properties may underlie categorization performance. This type of representation––different from classical prototype abstraction––could also be extracted directly from two-dimensional images via a biologically plausible early-vision model, rather than relying on experimenter-imposed features.

The neural basis of individual differences in working memory capacity: an fMRI study

Using fMRI, neural substrates of verbal working memory were investigated with respect to differences in working memory capacity. Listening-span test (LST), Listen, and Remember conditions were performed. Two subjects groups were selected: those who had large working memory capacities, labeled high-span subjects (HSS) according to the working memory span test, and those who had small working memory capacities, labeled low-span subjects (LSS). Significant activation was found mainly in three regions in comparison with resting control: left prefrontal cortex (PFC), anterior cingulate cortex (ACC) and temporal language area. For both groups, fMRI signal intensity increased in PFC during the LST condition compared to the Listen condition. A group difference was found in the ACC region; specifically, a significant increase in signal intensity was observed in ACC only for the HSS group and not for the LSS group. Behavioral data also showed that the performance was better in HSS than in LSS. These results indicate that the attention controlling system, supported by ACC, is more effective in HSS compared to that of LSS.

Multiple user recording system

A customized album recording system is under the control of a central microprocessor or mini-computer. A master library or storage medium is filled with a repertoire of recorded information items (such as musical selections) which may originate with any suitable source, such as phonograph records, tapes, sound tracks, compact discs, or the like. Each information item is stored in the library under its own address. On read out, an operator keys in the addresses identifying the selected items which are read out of the library medium and stored in a large capacity memory, usually to provide about forty-five minutes of total listening time. Then, all of the music is read out of that large capacity memory and recorded at a high speed onto a suitable album size medium, such as a tape cassette, for example. The source music and the customized album music are usually recorded in an analog form. The music which is processed within the system is in a digital form. Thus, the various transfers of music from the master storage to the recorded album, may be accomplished at a high speed of digital transmission. In an alternative embodiment, instead of reading out an entire album amount of recorded information items, the central computer successively reads out limited amounts of data on a demand and fetch basis. A computer provides both the analog-to-digital and the digital-to-analog conversions in order to improve fidelity.

A network switch for supporting high‐performance parallel processing by computers distributed in local areas

AbstractThe authors have developed a communications architecture called RHiNET that is capable of high‐performance parallel processing by interconnecting PCs and WSs. RHiNET uses not only computers concentrated in one place but also computers used for daily business within buildings and within floors for parallel processing. Networks used by RHiNET should have high effective bandwidths and small latencies for high‐efficiency computing, as well as link lengths for connecting the computers within buildings and floors and a free topology. The former requirements are not satisfied sufficiently by the conventional LANs, while the latter is not satisfied by SANs which are used in cluster systems. RHiNET satisfies both conditions by using a switch having a large memory capacity. In this paper, the architecture and implementation of the RHiNET/SW1 switch used by RHiNET networks are discussed. A scheme called virtual cache is used in RHiNET/SW1 such that a large‐capacity packet buffer is installed by SRAM outside the switch ASIC. In addition, the performance of the switch is evaluated by a simulator. © 2001 Scripta Technica, Syst Comp Jpn, 32(14): 24–33, 2001

Objective Monitoring of Physical Activity Using Motion Sensors and Heart Rate

Although neither motion sensors nor heart rate are perfect markers of physical activity, they certainly eliminate subjectivity of obtaining physical activity information. The objective method of choice depends on how the measurement will be used. For example, if walking behavior is the desired outcome, then a pedometer may be sufficient. If patterns and intensity of activity over longer periods of times such as a week or longer are needed, then an accelerometer with large memory capacity should be selected. In the future, efforts should be directed towards developing an objective motion sensor as inexpensive as a pedometer but with the data acquisition capabilities of the CSA or Tritrac accelerometer. Providing simultaneous heart rate with motion is also recommended to further verify that elevated heart rate does in fact represent a physical activity response. As the cost of the electronic components continues to decrease, these activity monitor configurations may become possible.

A Chaos Associative Memory with a Skew-Tent Activation Function

We find that a chaos neural network (CNN) model with a time-dependent skew-tent activation function shows ∼10–20 times larger memory capacity than CNN with the sigmoidal activation function. Our model exhibits complete association with a certain noise involved in an input key vector beyond the time-invariant tent model.