Large Cache Research Articles

Performance evaluation of the random replacement policy for networks of caches

Caching is a key component for Content Distribution Networks and new Information-Centric Network architectures. In this paper, we address performance issues of caching networks running the RND replacement policy. We first prove that when the popularity distribution follows a general power-law with decay exponent α > 1, the miss probability is asymptotic to O( C 1-α ) for large cache size C. We further evaluate network of caches under RND policy for homogeneous tree networks and extend the analysis to tandem cache networks where caches employ either LRU or RND policies.

Compiler-assisted preferred caching for embedded systems with STT-RAM based hybrid cache

As technology scales down, energy consumption is becoming a big problem for traditional SRAM-based cache hierarchies. The emerging Spin-Torque Transfer RAM (STT-RAM) is a promising replacement for large on-chip cache due to its ultra low leakage power and high storage density. However, write operations on STT-RAM suffer from considerably higher energy consumption and longer latency than SRAM. Hybrid cache consisting of both SRAM and STT-RAM has been proposed recently for both performance and energy efficiency. Most management strategies for hybrid caches employ migration-based techniques to dynamically move write-intensive data from STT-RAM to SRAM. These techniques lead to extra overheads. In this paper, we propose a compiler-assisted approach, preferred caching, to significantly reduce the migration overhead by giving migration-intensive memory blocks the preference for the SRAM part of the hybrid cache. Furthermore, a data assignment technique is proposed to improve the efficiency of preferred caching. The reduction of migration overhead can in turn improve the performance and energy efficiency of STT-RAM based hybrid cache. The experimental results show that, with the proposed techniques, on average, the number of migrations is reduced by 21.3%, the total latency is reduced by 8.0% and the total dynamic energy is reduced by 10.8%.

Book Review: Poisoning the Press: Richard Nixon, Jack Anderson, and the Rise of Washington’s Scandal Culture by Mark Feldstein

Poisoning Press: Richard Nixon, Jack Anderson, and Rise of Washington's Scandal Culture. Mark Feldstein. New York: Farrar, Straus and Giroux, 2010. 462 pp. $30 hbk.This book richly deserved AEJMC's 2011 Frank Luther Mott/Kappa Tau Alpha Research Award for 2010's best book on journalism and mass communication based on original research published. It is a modern Greek tragedy, forces of evil and goodness battling each other to death, with evil ultimately winning. It's a page-turner, reading more like a novel than carefully researched work of history that it is.(Full disclosure: Feldstein is now a professor at University of Maryland, but as a professor emeritus there myself, I have not met him. I should also note that as a young journalist in Washington, I regarded Jack and Drew Pearson as heroes-the only real investigative reporters in town; later did guest lecturing in my classes. I was also a victim of an abusive investigation by Nixon FBI. So I'm not exactly objective about two main characters in this book.)That said, as I was reading, it seemed to me that Feldstein was too even handed in dealing with (once a near saint in my estimation) and Nixon (the devil incarnate). But by end of book, poisoning of press in title makes sense.Nixon did approve a plot to assassinate (and poison was weapon of choice), and he would have loved to eliminate investigative journalists altogether. Feldstein makes it clear that Anderson's last twenty years were bizarre, and he became poisoned with money. But I don't think it was who poisoned press, and, in account of Mott award, stoked the toxic sensationalism that contaminates contemporary media discourse. By mid-1980s, was no longer influential in journalism circles (where he was often mocked), and did not inspire media's growing obsession with profits.But in 1960s and early 1970s, landed one great scoop after another, beating large newspapers at their game. In 1972, he won Pulitzer Prize in national reporting for his expose of Nixon administration's tilt toward Pakistan. He also did groundbreaking reporting on Watergate break-in and burglary, though he was upstaged by Woodward and Bernstein, who got glory and Pulitzer.While Anderson's reporting often led way on important stories in sixties and seventies, he was cramped by his format. More than a thousand newspapers carried his Washington Merry-Go-Round at its peak, but column was limited to 750 words, and he was unable to give his work in-depth and extensive coverage available in large news hole of Post, New York Times, and other newspapers.His critics complained constantly about ethics of his news gathering. He didn't hesitate to pay sources for crucial information. He encouraged whistle-blowers to break law to provide him with classified documents. The so-called Anderson Papers, based on a large cache of classified material leaked to him by a fellow Mormon and Navy yeoman who had typed many of documents, exposing Pakistan affair, were in some quarters considered as important as Pentagon Papers. …

Supporting Very Large DRAM Caches with Compound-Access Scheduling and MissMap

This work efficiently enables conventional block sizes for very large die-stacked DRAM caches with two innovations: it makes hits faster with compound-access scheduling and misses faster with a MissMap. The combination of these mechanisms enables the new organization to deliver performance comparable to that of an idealistic DRAM cache that employs an impractically large SRAM-based on-chip tag array.

Exploiting modern cannabinoid pharmacology for therapeutic gain?

An excavation of the 2700-year-old Yanghai tombs near Turpan, Xinjiang-Uighur Autonomous Region in China, revealed the grave of a shaman whose accoutrements included a large cache of Cannabis sativa (the hemp plant), suggesting that cannabis was used as a pharmacological agent, whether with recreational, religious or therapeutic intent, in this pre-Silk Road culture [1]. Despite a long history of recreational use, however, cannabis has contributed relatively little to therapeutics, because of legal restrictions and because of its adverse effects. Nabiximols (USAN, trade name Sativex, synonym dronabinol/cannabidiol) is a cannabis extract formulated as an oromucosal spray and developed for symptoms such as neuropathic pain, spasticity and overactive bladder in patients with multiple sclerosis. Clinical trials to date have demonstrated modest and variable efficacy (http://en.wikipedia.org/wiki/Nabiximols accessed 11 March 2012). Nabilone is a synthethic cannabinoid licensed for use as an anti-emetic in patients with nausea and vomiting caused by cytotoxic chemotherapy and unresponsive to other anti-emetics. In contrast to the modest data supporting clinical utility, massive strides were made during the latter years of the twentieth century in the science of cannabis pharmacology. We hope that this will lead to new and more successful therapeutic applications and the purpose of this editors' view is to set this scene. Δ9-tetrahydrocannabinol (THC, dronabinol) was identified as the main psychoactive component of cannabis in the 1960s (appropriately enough). It produces a mixture of depressant and psychotomimetic effects, including relaxation and a sense of well-being, coupled with sharpened sensory awareness – sights and sounds seem more intense and fantastic [2]. Measurable effects include impaired memory, learning and motor performance, hypothermia, analgesia, anti-emetic action and increased appetite. Various centrally mediated autonomic effects include tachycardia, vasodilatation (especially of the scleral and conjunctival vessels), reduced intraocular pressure and bronchodilatation. Tolerance and some degree of physical dependence can occur in heavy cannabis users with abstinence symptoms being qualitatively similar to withdrawal from ethanol or opiates, but less intense.

Virtualization challenges

Server consolidation, by running multiple virtual machines on top of a single platform with virtualization, provides an efficient solu-tion to parallelism and utilization of modern multi-core processors system. However, the performance and scalability of server con-solidation solution on modern massive advanced server is not well addressed. In this paper, we conduct a comprehensive study of Xen per-formance and scalability characterization running SPECvirt_sc2010, and identify that large memory and cache footprint, due to the unnecessary high frequent context switch, introduce additional challenges to the system performance and scalability. We propose two optimizations (dynamically-allocable tasklets and context-switch rate controller) to improve the performance. The results show the improved memory and cache efficiency with a reduction of the overall CPI, resulting in an improvement of server consolidation capability by 15% in SPECvirt_sc2010. In the meantime, our optimization achieves an up to 50% acceleration of service response, which greatly improves the QoS of Xen virtualization solution.

Accurate and Simplified Prediction of L2 Cache Vulnerability for Cost-Efficient Soft Error Protection

Soft errors caused by energetic particle strikes in on-chip cache memories have become a critical challenge for microprocessor design. Architectural vulnerability factor (AVF), which is defined as the probability that a transient fault in the structure would result in a visible error in the final output of a program, has been widely employed for accurate soft error rate estimation. Recent studies have found that designing soft error protection techniques with the awareness of AVF is greatly helpful to achieve a tradeoff between performance and reliability for several structures (i.e., issue queue, reorder buffer). Considering large on-chip L2 cache, redundancy-based protection techniques (such as ECC) have been widely employed for L2 cache data integrity with high costs. Protecting caches without accurate knowledge of the vulnerability characteristics may lead to the over-protection, thus incurring high overheads. Therefore, designing AVF-aware protection techniques would be attractive for designers to achieve a cost-efficient protection for caches, especially at early design stage. In this paper, we propose an improved AVF estimation framework for conducing comprehensive characterization of dynamic behavior and predictability of L2 cache vulnerability. We propose to employ Bayesian Additive Regression Trees (BART) method to accurately model the variation of L2 cache AVF and to quantitatively explain the important effects of several key performance metrics on L2 cache AVF. Then we employ bump hunting technique to extract some simple selecting rules based on several key performance metrics for a simplified and fast estimation of L2 cache AVF. Using the simplified L2 cache AVF estimator, we develop an AVF-aware ECC technique as an example to demonstrate the cost-efficient advantages of the AVF prediction based dynamic fault tolerant techniques. Experimental results show that compared with traditional full ECC technique, AVF-aware ECC technique reduces the L2 cache access latency by 16.5% and saves power consumption by 11.4% for SPEC2K benchmarks averagely.

The Earth System Grid Federation: Delivering globally accessible petascale data for CMIP5

The fifth Coupled Model Intercomparison Project (CMIP5) will involve the global production and analysis of petabytes of data. The Program for Climate Model Diagnosis and Intercomparison (PCMDI), with responsibility for archival for CMIP5, has established the global “Earth System Grid Federation” (ESGF) of data producers and data archives to support CMIP5. ESGF will provide a set of globally synchronised views of globally distributed data – including some large cache replicants which will be persisted for (at least) decades. Here we describe the archive requirements and key aspects of the resulting architecture. ESGF will stress international networks, as well as the data archives themselves – but significantly less than would have been the case of a centralised archive. Developing and deploying the ESGF has exploited good will and best efforts, but future developments are likely to require more formalised architecture and management.

Using data envelopment analysis to evaluate the efficiency of web caching object replacement strategies

Since the midst of 1990s, a great variety of strategies have been proposed and analyzed to address the problem of web caching object replacement strategies, with each one outperforming the others in one or more basic performance metrics. In this paper, our objective is to evaluate the principal web caching object replacement strategies in terms of their efficiency, i.e. their ability to demonstrate high performance, while, at the same time, keeping the total cost for their support as low as possible. In our approach, we propose the technique of data envelopment analysis (DEA) as a complementary to simulations tool in order to solve the efficiency problem. Using DEA we show that two strategies – namely gGDSF(1) and LRU-SP – can be considered as (1) efficient solutions for real systems and (2) good benchmarks for future research. Our work also concluded that DEA has demonstrated absolute consistency in seeking for the efficient strategies and that it is able to distinguish the champion strategy that will outperform all the others. Moreover, it has been shown that large cache sizes may subvert the struggle of some strategies to stand out.

Energy-efficient cache design using variable-strength error-correcting codes

Voltage scaling is one of the most effective mechanisms to improve microprocessors' energy efficiency. However, processors cannot operate reliably below a minimum voltage, Vccmin, since hardware structures may fail. Cell failures in large memory arrays (e.g., caches) typically determine Vccmin for the whole processor. We observe that most cache lines exhibit zero or one failures at low voltages. However, a few lines, especially in large caches, exhibit multi-bit failures and increase Vccmin. Previous solutions either significantly reduce cache capacity to enable uniform error correction across all lines, or significantly increase latency and bandwidth overheads when amortizing the cost of error-correcting codes (ECC) over large lines. In this paper, we propose a novel cache architecture that uses variable-strength error-correcting codes (VS-ECC). In the common case, lines with zero or one failures use a simple and fast ECC. A small number of lines with multi-bit failures use a strong multi-bit ECC that requires some additional area and latency. We present a novel dynamic cache characterization mechanism to determine which lines will exhibit multi-bit failures. In particular, we use multi-bit correction to protect a fraction of the cache after switching to low voltage, while dynamically testing the remaining lines for multi-bit failures. Compared to prior multi-bit-correcting proposals, VS-ECC significantly reduces power and energy, avoids significant reductions in cache capacity, incurs little area overhead, and avoids large increases in latency and bandwidth.

Characterizing Web-Based Video Sharing Workloads

Video sharing services that allow ordinary Web users to upload video clips of their choice and watch video clips uploaded by others have recently become very popular. This article identifies invariants in video sharing workloads, through comparison of the workload characteristics of four popular video sharing services. Our traces contain metadata on approximately 1.8 million videos which together have been viewed approximately 6 billion times. Using these traces, we study the similarities and differences in use of several Web 2.0 features such as ratings, comments, favorites, and propensity of uploading content. In general, we find that active contribution, such as video uploading and rating of videos, is much less prevalent than passive use. While uploaders in general are skewed with respect to the number of videos they upload, the fraction of multi-time uploaders is found to differ by a factor of two between two of the sites. The distributions of lifetime measures of video popularity are found to have heavy-tailed forms that are similar across the four sites. Finally, we consider implications for system design of the identified invariants. To gain further insight into caching in video sharing systems, and the relevance to caching of lifetime popularity measures, we gathered an additional dataset tracking views to a set of approximately 1.3 million videos from one of the services, over a twelve-week period. We find that lifetime popularity measures have some relevance for large cache (hot set) sizes (i.e., a hot set defined according to one of these measures is indeed relatively “hot”), but that this relevance substantially decreases as cache size decreases, owing to churn in video popularity.

CHOP: Integrating DRAM Caches for CMP Server Platforms

Integrating large DRAM caches is a promising way to address the memory bandwidth wall issue in the many-core era. However, organizing and implementing a large DRAM cache imposes a trade-off between tag space overhead and memory bandwidth consumption. CHOP (Caching Hot Pages) addresses this trade-off through three filter-based DRAM-caching techniques.

Sora

This paper presents Sora, a fully programmable software radio platform on commodity PC architectures. Sora combines the performance and fidelity of hardware software-defined radio (SDR) platforms with the programmability and flexibility of general-purpose processor (GPP) SDR platforms. Sora uses both hardware and software techniques to address the challenges of using PC architectures for high-speed SDR. The Sora hardware components consist of a radio front-end for reception and transmission, and a radio control board for high-throughput, low-latency data transfer between radio and host memories. Sora makes extensive use of features of contemporary processor architectures to accelerate wireless protocol processing and satisfy protocol timing requirements, including using dedicated CPU cores, large low-latency caches to store lookup tables, and SIMD processor extensions for highly efficient physical layer processing on GPPs. Using the Sora platform, we have developed a few demonstration wireless systems, including SoftWiFi, an 802.11a/b/g implementation that seamlessly interoperates with commercial 802.11 NICs at all modulation rates, and SoftLTE, a 3GPP LTE uplink PHY implementation that supports up to 43.8Mbps data rate.

Later prehistoric settlement and metalworking site at Seafield West, near Inverness, Highland

Construction in 1996 at a major retail development site close to Inverness, Highland (NGR: NH 694 445) resulted in the destruction of two known cropmark sites. One set of cropmarks was found to be associated with a Bronze Age log-boat burial site and the results of the ensuing excavation are published elsewhere (Cressey & Sheridan 2003). The excavation of a second area of cropmarks forms the subject of this publication. The archaeological remains consisted of a series of negative features, post-holes and annular ditches which form parts of at least nine separate structures of a later prehistoric unenclosed settlement. A mould fragment indicated Late Bronze Age sword production in the vicinity. A palisaded enclosure produced a copper-alloy brooch that is a rare find for the region. Evidence of copper-alloy objects and metalworking from a smelting hearth and slags show that the occupants were of some status. Some of the structural and artefactual evidence compellingly points to an in situ ironworking workshop. A large cache of smithing charcoal found in association with a smelting hearth was radiocarbon dated to 180BC–AD70 and represents one of the few dated in situ Iron Age ironworking episodes in Scotland.

A Later Prehistoric Settlement and Metalworking Site at Seafield West, near Inverness, Highland

Construction in 1996 at a major retail development site close to Inverness, Highland resulted in the destruction of two known cropmark sites. One set of cropmarks was found to be associated with a Bronze Age log-boat burial site and the results of the ensuing excavation are published elsewhere (Cressey & Sheridan 2003). The excavation of a second area of cropmarks forms the subject of this publication. The archaeological remains consisted of a series of negative features, post-holes and annular ditches which form parts of at least nine separate structures of a later prehistoric unenclosed settlement. A mould fragment indicated Late Bronze Age sword production in the vicinity. A palisaded enclosure produced a copper-alloy brooch that is a rare find for the region. Evidence of copper-alloy objects and metalworking from a smelting hearth and slags show that the occupants were of some status. Some of the structural and artefactual evidence compellingly points to an in situ ironworking workshop. A large cache of smithing charcoal found in association with a smelting hearth was radiocarbon dated to 180BC-AD70 and represents one of the few dated in situ Iron Age ironworking episodes in Scotland.

Comparing performance of many‐core CPUs and GPUs for static and motion compensated reconstruction of C‐arm CT data

Interventional reconstruction of 3-D volumetric data from C-arm CT projections is a computationally demanding task. Hardware optimization is not an option but mandatory for interventional image processing and, in particular, for image reconstruction due to the high demands on performance. Several groups have published fast analytical 3-D reconstruction on highly parallel hardware such as GPUs to mitigate this issue. The authors show that the performance of modern CPU-based systems is in the same order as current GPUs for static 3-D reconstruction and outperforms them for a recent motion compensated (3-D+time) image reconstruction algorithm. This work investigates two algorithms: Static 3-D reconstruction as well as a recent motion compensated algorithm. The evaluation was performed using a standardized reconstruction benchmark, RABBITCT, to get comparable results and two additional clinical data sets. The authors demonstrate for a parametric B-spline motion estimation scheme that the derivative computation, which requires many write operations to memory, performs poorly on the GPU and can highly benefit from modern CPU architectures with large caches. Moreover, on a 32-core Intel Xeon server system, the authors achieve linear scaling with the number of cores used and reconstruction times almost in the same range as current GPUs. Algorithmic innovations in the field of motion compensated image reconstruction may lead to a shift back to CPUs in the future. For analytical 3-D reconstruction, the authors show that the gap between GPUs and CPUs became smaller. It can be performed in less than 20 s (on-the-fly) using a 32-core server.

Characterization of a polyketide synthase in Aspergillus niger whose product is a precursor for both dihydroxynaphthalene (DHN) melanin and naphtho-γ-pyrone

The genome sequencing of the fungus Aspergillus niger uncovered a large cache of genes encoding enzymes thought to be involved in the production of secondary metabolites yet to be identified. Identification and structural characterization of many of these predicted secondary metabolites are hampered by their low concentration relative to the known A. niger metabolites such as the naphtho-γ-pyrone family of polyketides. We deleted a non-reducing PKS gene in A. niger strain ATCC 11414, a daughter strain of A. niger ATCC strain 1015 whose genome was sequenced by the DOE Joint Genome Institute. This PKS encoding gene we name albA is a predicted ortholog of alb1 from Aspergillus fumigatus which is responsible for production of the naphtho-γ-pyrone precursor for the 1,8-dihydroxynaphthalene (DHN) melanin/spore pigment. Our results show that the A. niger albA PKS is responsible for both the production of the spore pigment precursor and a family of naphtho-γ-pyrones commonly found in significant quantity in A. niger culture extracts. The generation of an A. niger strain devoid of naphtho-γ-pyrones will greatly facilitate the elucidation of cryptic biosynthetic pathways in this organism.

Improving Networked File System Performance Using a Locality-Aware Cooperative Cache Protocol

In a distributed environment, the utilization of file buffer caches in different clients may greatly vary. Cooperative caching has been proposed to increase cache utilization by coordinating the shared usage of distributed caches. It allows clients that would more greatly benefit from larger caches to forward data objects to peer clients with relatively underutilized caches. To support such coordination, global cache utilization must be dynamically evaluated. This, in turn, requires an effective analysis of application data access patterns. Existing coordination protocols are demonstrably suboptimal in this respect, exhibiting inefficient memory utilization and undue interference among clients. We propose a locality-aware cooperative caching protocol, called LAC, that is based on analysis and manipulation of data block reuse distance to effectively predict cache utilization and the probability of data reuse at each client. Using a dynamically adaptive synchronization technique, we keep local information up to date and consistently comparable across clients. The system is highly scalable in the sense that global coordination is achieved without centralized control. We have conducted thorough trace-driven simulation experiments to assess the performance differences between LAC and various existing protocols representative of the general class. Using a realistic and representative cost model, we show that the LAC protocol significantly and consistently outperforms existing cooperative caching protocols, demonstrating high and balanced utilization of caches across all clients. In our experiments, LAC reduces block access time by up to 36 percent, with an average of 31 percent, over the system without peer cache coordination, and reduces block access time by up to 22 percent, with an average of 13 percent, over the best performer of the existing protocols.

Seed dispersal by scatter‐hoarding rodents in arid environments

Summary 1. The seeds of many plants are dispersed by animals, but the nature of these plant–animal mutualisms is often moulded by the abiotic environment. Here, we show that desert peach (Prunus andersonii), with dry fruits and large seeds, relies on scatter‐hoarding rodents for dispersal and that this form of seed dispersal maintains the effectiveness of dispersal while reducing water expenditure. 2. The fruit pulp of desert peach dries and dehisces at maturity in early summer. No vertebrate frugivores consumed the fruits, but rodents quickly harvested the nuts. Nearly 75% of the nut crop was removed from plant canopies by scansorial rodents like white‐tailed antelope squirrels (Ammospermophilus leucurus), which scatter‐hoarded nuts in 1–2 seed caches 10–30 mm deep. Deer mice (Peromyscus maniculatus) also made many shallow one‐nut caches. 3. Heteromyid rodents (Great Basin pocket mouse, Perognathus parvus; Panamint kangaroo rat, Dipodomys panamintinus) primarily larder‐hoarded nuts (c. 60%) in burrows too deep for seedling emergence, but also scatter‐hoarded nuts in a few, large caches 10–40 mm deep. 4. Antelope squirrels were the most effective dispersers and deer mice and Panamint kangaroo rats were less effective. Abiotically dispersed nuts had virtually no recruitment (<1% emergence), but nuts buried in soil to simulate rodent caches had 32% emergence and 5.6% survived after 1 year. Scatter‐hoarding rodents are responsible for virtually all recruitment in desert peach. 5. Synthesis. Desert peach arose from a fleshy‐fruited ancestor that was probably dispersed by endozoochorous frugivores. About 35 species of dry‐fruited Prunus occur in arid environments across North America and Eurasia. The most parsimonious explanation for the evolution of dry‐fruited Prunus is the loss of frugivory in a diplochorous ancestor (i.e. combined frugivore and scatter‐hoarding dispersal) to maintain the effectiveness of seed dispersal while reducing the demand for water in arid environments.

Energy-aware instruction cache design using small trace cache

An instruction cache consumes a significant amount of energy in modern microprocessors. Therefore energy efficiency as well as performance should be considered when designing instruction cache architecture, especially for embedded processors. The authors propose a new instruction cache architecture for reducing dynamic energy consumption with negligible performance degradation, unlike typical architecture-level approaches which reduce dynamic energy consumption by sacrificing performance. The proposed instruction cache is composed of two caches: a large main instruction cache and a small low-power trace cache (LPT-cache). When a request comes into the proposed cache, either main instruction cache or LPT-cache is only accessed by utilising the information from the modified branch target buffer which enables predictions with very high accuracy. The proposed technique reduces the dynamic energy consumption significantly by replacing the accesses to a large main instruction cache with those to a small LPT-cache. Simulation results show that the proposed technique reduces dynamic energy consumption by 14.6% on average with negligible performance degradation over the traditional instruction cache.