L1 Trigger Research Articles

Design of the CMS High Granularity Calorimeter trigger primitive generator system

The High Luminosity phase of the LHC (HL-LHC) is planned to begin data taking in 2029, with the instantaneous luminosity expected to increase to 4 times its current value and the average number of particle interactions per bunch crossing increasing by approximately 3.5 times its current value. The current endcap calorimeters in the CMS detector will be replaced by a novel high granularity calorimeter (HGCAL) that will have fine segmentation in both the transverse and longitudinal directions and will be the first such calorimeter specifically optimised for particle flow reconstruction to operate at a colliding-beam experiment. The Level 1 trigger of the CMS experiment will combine the calorimeter data with tracking information to allow particle-flow techniques to be used. The high granularity of the calorimeter leads to about six million readout channels in total, concentrated in one million trigger cells, sampled for the L1 trigger at a rate of 40 MHz. The trigger data volumes will be an order of magnitude above those currently handled in CMS, posing significant challenges for data manipulation and processing. In addition, the trigger algorithms must be able to efficiently reject the huge background rate in the forward region of the detector due to the high pileup environment. The status of the HGCAL trigger architecture and design, as well as the algorithms developed in order to tackled these major issues, is presented here. The data flow is described from the formation and preselection of trigger cells on detector to the generation of two types of trigger primitives off detector, projective towers of energy in the (η, ϕ) plane and three-dimensional clusters of particles. Particle flow will use these 3D clusters, and their formation is described and followed by recent developments in the optimization of their transverse size.

40 MHz triggerless readout of the CMS Drift Tube muon detector

The Level-1 trigger scouting system of the CMS experiment aims at intercepting the intermediate data produced by the L1 trigger processors before the final trigger decision. This system can be complemented by adding the raw stream of data collected from the detector front-end, whenever the throughput is manageable. In this work, the triggerless readout of the CMS Drift Tubes (DT) detector is presented. This is realized by reading a sector of the DT which has been equipped with the preproduction of Phase-2 upgrade front-end boards. A Xilinx VCU118 acts as a concentrator of the Phase-2 demonstrator lpGBT links and transmits data to a server via 100G TCP/IP. First results coming from a test-stand mimicking the sector demonstrator are shown.

Nanosecond Jet Classification at LHC

We investigate the possibility of using Deep Learning algorithms for jet identification in the L1 trigger at HL-LHC. We perform a survey of architectures (MLP, CNN, Graph Networks) and benchmark their performance and resource consumption on FPGAs using a QKeras for quantization aware training and HLS4ML to convert the neural network model into a FPGA firmware. We use the HLS4ML jet dataset to compare the results obtained in this study to previous literature on Fast Machine Learning applications on FPGAs.

The NA62 level 0 calorimetric trigger fast readout implementation, commissioning and data taking performances

The NA62 experiment at the CERN SPS aims to measure the branching ratio of the very rare kaon decay . The Calorimetric Level 0 Trigger identifies clusters in the electromagnetic and hadronic calorimeters. Along with the trigger data sent to the L0 Trigger Processor, readout data is collected to be sent to the L1 software trigger. In this work we present the novel implementation of the readout data collection and forwarding system in the multiple layers of the calorimetric trigger structure. We will also present the commissioning of the system and the performance evaluation on current data taking.

The CMS Tracker for the High Luminosity LHC

The LHC machine is planning an upgrade program which will smoothly bring the instantaneous luminosity to about 5–7.5 ×1034cm−2s−1, to reach an integrated luminosity of 3000−4000fb−1 by the end of 2039. This High Luminosity LHC scenario, HL-LHC, will require an upgrade program of the LHC detectors known as Phase-2 upgrade. The current CMS Tracker, already running beyond design specifications, and CMS Pixel Detector will not be able to survive HL-LHC radiation conditions and CMS will need completely new devices, in order to fully exploit the HL-LHC data which will be recorded under highly demanding background conditions.The Phase-2 Tracker will be made of two sections, an Inner Tracker and an Outer Tracker. Both detectors will feature increased radiation hardness, higher granularity and capability to handle higher data rate and longer trigger latency in order to ensure at least the same performances of the current detector, in terms of tracking and vertex reconstruction capabilities, at the high pileup (140–200 collisions per bunch crossing) expected at HL-LHC. Moreover the Phase-2 Outer Tracker will have also trigger capabilities since tracking information will be used at L1 trigger stage.This report is focusing on the replacement of the CMS Tracker system, describing new layout and technological choices together with some highlights on research and development activities.

ATLAS ITk tracking and readout performance

The ATLAS Inner Detector will be replaced with a new all-silicon Inner Tracker (ITk) designed for the challenging environment of the High Luminosity LHC (HL-LHC). The ITk layout of the pixel detector was recently successfully optimized to improve tracking performance and object reconstruction. The data rates of the ITk pixel detector have been evaluated to establish that the detector readout system can read out data at the design L0 trigger frequency of 1 MHz.

High-precision luminosity instrumentation for the CMS detector at the HL-LHC

The high-luminosity upgrade of the LHC (HL-LHC) is foreseen to reach an instantaneous luminosity a factor of five to seven times the nominal LHC design value. This creates the need for new high-precision instrumentation at CMS, using radiation-hard detector technologies. This contribution introduces the instrumentation for bunch-by-bunch online luminosity and beam-induced background measurements in CMS. The Tracker Endcap Pixel Detector (TEPX) will be adapted for precision luminometry by implementing a dedicated trigger type and a real-time data processing system performing clustering on FPGA. The innermost ring of the last TEPX layer (D4R1) will be operated independently from the rest of TEPX, enabling beam monitoring during the LHC ramp and during unqualified beam conditions with a dedicated timing and trigger infrastructure. A new standalone luminometer, the Fast Beam Condition Monitor (FBCM), which will be fully independent from the central trigger and data acquisition services and will be able to operate during all times is also introduced. FBCM is foreseen to utilize silicon-pad sensors with sub-bunch-crossing time resolution enabling also the measurement of beam-induced background. The potential of the exploitation of other CMS subsystems such as the outer tracker, the barrel muon detectors and the 40 MHz L1 trigger scouting system using a common histogramming firmware is also discussed.

Probing naturally light singlets with a displaced vertex trigger

We investigate the physics case for a dedicated trigger on a low mass, hadronic displaced vertex at the high luminosity LHC, relying on the CMS phase II track trigger. We estimate the trigger efficiency with a simplified simulation of the CMS track trigger and show that the L1 trigger rate from fake vertices, B meson decays and secondary interactions with the detector material can likely be brought down to the kHz level with a minimal set of cuts. While it would with any doubt be a severe experimental challenge to implement, we conclude that a displaced vertex trigger could open qualitatively new parameter space for exotic Higgs decays, exotic B decays and even direct production of light resonances. We parametrize the physics potential in terms of a singlet scalar mixing with the Standard Model Higgs and an axion-like particle with a coupling to gluons, and review a number or relevant models motivated by the hierarchy and strong CP problems, Dark Matter and baryogenesis.

Single Event Upset rates in the CBC in CMS

The CMS Binary Chip (CBC) is a front-end ASIC to be used by the CMS tracker following its upgrade for High Luminosity LHC operation. It will instrument special silicon microstrip detectors to identify high transverse momentum particles in real time so tracking data can be used in the L1 trigger. The CBC should be robust against Single Event Upsets (SEUs). SEU rates have been measured in a series of tests in a 62 MeV proton beam. Each version of the chip has increased the digital circuitry, and hence the SEU susceptibility, and has also been subject to design improvements which affect SEU tolerance. The relevant design features are explained and SEU measurements reported. The expected SEU rates at the HL-LHC are estimated.

A 3D track finder for the Belle II CDC L1 trigger

Machine learning methods are integrated into the pipelined first level (L1) track trigger of the upgraded flavor physics experiment Belle II at KEK in Tsukuba, Japan. The novel triggering techniques cope with the severe background from events outside the small collision region provided by the new SuperKEKB asymmetric-energy electron-positron collider. Using the precise drift-time information of the central drift chamber which provides axial and stereo wire layers, a neural network L1 trigger estimates the 3D track parameters of tracks, based on input from the axial wire planes provided by a 2D track finder. An extension of this 2D Hough track finder to a 3D finder is proposed, where the single hit representations in the Hough plane are trained using Monte Carlo. This 3D finder improves the track finding efficiency by including the stereo sense wires as input. The estimated polar track angle allows a specialization of the subsequent neural networks to sectors in the polar angle.

L0TP+: the Upgrade of the NA62 Level-0 Trigger Processor

The L0TP+ initiative is aimed at the upgrade of the FPGA-based Level-0 Trigger Processor (L0TP) of the NA62 experiment at CERN for the post-LS2 data taking, which is expected to happen at 100% of design beam intensity, corresponding to about 3.3 × 1012 protons per pulse on the beryllium target used to produce the kaons beam. Although tests performed at the end of 2018 showed a substantial robustness of the L0TP system also at full beam intensity, there are several reasons to motivate such an upgrade: i) avoid FPGA platform obsolescence, ii) make room for improvements in the firmware design leveraging a more capable FPGA device, iii) add new functionalities, iv) support the 4 beam intensity increase foreseen in future experiment upgrades. We singled out the Xilinx Virtex UltraScale+ VCU118 development board as the ideal platform for the project. L0TP+ seamless integration into the current NA62 TDAQ system and exact matching of L0TP functionalities represent the main requirements and focus of the project; nevertheless, the final design will include additional features, such as a PCIe RDMA engine to enable processing on CPU and GPU accelerators, and the partial reconfiguration of trigger firmware starting from a high level language description (C/C++). The latter capability is enabled by modern High Level Synthesis (HLS) tools, but to what extent this methodology can be applied to perform complex tasks in the L0 trigger, with its stringent latency requirements and the limits imposed by single FPGA resources, is currently being investigated. As a test case for this scenario we considered the online reconstruction of the RICH detector rings on an HLS generated module, using a dedicated primitives data stream with PM hits IDs. Besides, the chosen platform supports the Virtex Ultrascale+ FPGA wide I/O capabilities, allowing for straightforward integration of primitive streams from additional sub-detectors in order to improve the performance of the trigger.

Level Zero Trigger Processor for the NA62 experiment

The NA62 experiment is designed to measure the ultra-rare decay K+ arrow π+ ν ν̄ branching ratio with a precision of ∼ 10% at the CERN Super Proton Synchrotron (SPS). The trigger system of NA62 consists in three different levels designed to select events of physics interest in a high beam rate environment. The L0 Trigger Processor (L0TP) is the lowest level system of the trigger chain. It is hardware implemented using programmable logic. The architecture of the NA62 L0TP system is a new approach compared to existing systems used in high-energy physics experiments. It is fully digital, based on a standard gigabit Ethernet communication between detectors and the L0TP Board. The L0TP Board is a commercial development board, mounting a programmable logic device (FPGA). The primitives generated by sub-detectors are sent asynchronously using the UDP protocol to the L0TP during the entire beam spill period. The L0TP realigns in time the primitives coming from seven different sources and performs a data selection based on the characteristics of the event such as energy, multiplicity and topology of hits in the sub-detectors. It guarantees a maximum latency of 1 ms. The maximum input rate is about 10 MHz for each sub-detector, while the design maximum output trigger rate is 1 MHz. A description of the trigger algorithm is presented here.

Cherenkov and scintillation detectors with MCP-PMT and SiPM readout for MPD and BM@N experiments at JINR

Two fast interaction trigger systems based on fast detectors with MCP-PMTs and SiPMs readout have been developed for fixed target experiment Baryonic Matter at Nuclotron and collider experiment Multi-Purpose Detector at Laboratory of High Energy Physics, Joint Institute for Nuclear Research. These detectors provide the effective L0 trigger for nucleus–nucleus collisions and the start pulse T0 for TOF detectors with picosecond time resolution. Important requirement to the detectors is good operation in a strong magnetic field.

An FPGA based track finder for the L1 trigger of the CMS experiment at the High Luminosity LHC

A new tracking detector is under development for use by the CMS experiment at the High-Luminosity LHC (HL-LHC). A crucial requirement of this upgrade is to provide the ability to reconstruct all charged particle tracks with transverse momentum above 2–3 GeV within 4 μs so they can be used in the Level-1 trigger decision. A concept for an FPGA-based track finder using a fully time-multiplexed architecture is presented, where track candidates are reconstructed using a projective binning algorithm based on the Hough Transform, followed by a combinatorial Kalman Filter. A hardware demonstrator using MP7 processing boards has been assembled to prove the entire system functionality, from the output of the tracker readout boards to the reconstruction of tracks with fitted helix parameters. It successfully operates on one eighth of the tracker solid angle acceptance at a time, processing events taken at 40 MHz, each with up to an average of 200 superimposed proton-proton interactions, whilst satisfying the latency requirement. The demonstrated track-reconstruction system, the chosen architecture, the achievements to date and future options for such a system will be discussed.

NA62 Charged Particle Hodoscope. Design and performance in 2016 run

The NA62 experiment at CERN SPS aims to measure the branching ratio of the ultra-rare decay K+ → π+νν̄ with 10% accuracy. The experiment operates with a 75 GeV/c high intensity (750 MHz) secondary beam. A new detector, named Charged Particle Hodoscope (CHOD), designed to produce an input signal to the L0 trigger processor for events with charged particles produced in kaon decays, has been assembled, installed, integrated into NA62 Data Acquisition System (DAQ) and commissioned in 2016. During the whole 2016 run the detector has been in continuous operation. Design and performance features of the detector are presented.

Design of a Compact Hough Transform for a New L1 Trigger Primitives Generator for the Upgrade of the CMS Drift Tubes Muon Detector at the HL-LHC

The operation of the compact muon solenoid drift tubes (DTs) muon detectors at the high-luminosity large hadron collider will be possible only with an upgrade of the current readout and trigger electronics, which are based on very old technology and directly exposed to radiation, hence particularly sensitive to aging. A new level 1 trigger primitive generator, based on the use of an original compact Hough transform (CHT) algorithm, is being designed with the goal of its implementation in the state-of-the-art field programmabla gate array (FPGA) devices. The algorithm can identify the muon track segment parameters and must be combined with a majority mean-timer in order to assign the muon to its parent bunch crossing. The algorithm is expected to be deployed on FPGAs and has a few $\mu \text{s}$ latency for decision taking, with efficiency and resolution equal or higher with respect to the ones provided by the currently running algorithm. The major challenges are parallelization of the algorithm, fast readout of the CHT parameter matrix, the capability of handling data from a large array of DTs in the minimal number of FPGAs, and coping with the latency requirements. These issues will be addressed proposing constructive solutions.

The New Global Muon Trigger of the CMS Experiment

For the 2016 physics data runs, the L1 trigger system of the compact muon solenoid (CMS) experiment underwent a major upgrade to cope with the increasing instantaneous luminosity of the CERN LHC whilst maintaining a high event selection efficiency for the CMS physics program. Most subsystem specific trigger processor boards were replaced with powerful general purpose processor boards, conforming to the MicroTCA standard, whose tasks are performed by firmware on an field-programmable gate array of the Xilinx Virtex 7 family. Furthermore, the muon trigger system moved from a subsystem centered approach, where each of the three muon detector systems provides muon candidates to the global muon trigger (GMT), to a region-based system, where muon track finders (TFs) combine information from the subsystems to generate muon candidates in three detector regions that are then sent to the upgraded GMT. The upgraded GMT receives up to 108 muons from the processors of the muon TFs in the barrel, overlap, and endcap detector regions. The muons are sorted in two steps and duplicates are identified for removal. The first step treats muons from different processors of a TF in one detector region. Muons from TFs in different detector regions are compared in the second step. An isolation variable is calculated, using energy sums from the calorimeter trigger and added to each of the best eight muons before they are sent to the upgraded global trigger (GT) where the final trigger decision is made. The upgraded GMT algorithm is implemented on a general purpose processor board that uses optical links at 10 Gb/s to receive the input data from the muon TFs and the calorimeter energy sums, and to send the selected muon candidates to the upgraded GT.

Implementation of the data acquisition system for the Overlap Muon Track Finder in the CMS experiment

The Overlap Muon Track Finder (OMTF) is the new system developed during the upgrade of the CMS experiment which includes the upgrade of its Level-1 trigger. It uses the novelty approach to finding muon candidates based on data received from three types of detectors: RPC, DT, and CSC . The upgrade of the trigger system requires also upgrade of the associated Data Acquisition (DAQ) system. The OMTF DAQ transmits the data from the connected detectors that were the basis for the Level-1 trigger decision. To increase its diagnostic potential, it may also transmit the data from a few bunch crossings (BXes) preceding or following the BX, in which the L1 trigger was generated. The paper describes the technical concepts and solutions used in the OMTF DAQ system. The system is still under development. However, it successfully passed the first tests.

Operational experience with the ALICE pixel detector

The Silicon Pixel Detector (SPD) constitutes the two innermost layers of the Inner Tracking System of the ALICE experiment and it is the closest detector to the interaction point. As a vertex detector, it has the unique feature of generating a trigger signal that contributes to the L0 trigger of the ALICE experiment. The SPD started collecting data since the very first pp collisions at LHC in 2009 and since then it has taken part in all pp, Pb-Pb and p-Pb data taking campaigns. This contribution will present the main features of the SPD, the detector performance and the operational experience, including calibration and optimization activities from Run 1 to Run 2.

L0 trigger unit prototype for BM@N setup

The BM@N facility is a fixed target experiment based on heavy ion beams of the Nuclotron-M accelerator. The aim of the BM@N is to study nucleus – nucleus collisions at energies up to 4.5 GeV per nucleon. A level 0 trigger processor unit (Trigger L0 unit, T0U) for the BM@N deuterons and carbon ions at Run’2015 has been developed. The T0U is used to generate a BM@N zero level trigger and a TOF detector precise start.T0U generates trigger signal based on beam line and target area detector signals. This module also provides both control and monitoring of the detector front-end electronics power supplies. This article presents a concept, characteristics and test results of the T0U module during the Run 2015.